1 /* 2 * Copyright (c) 2019-2022, Xilinx, Inc. All rights reserved. 3 * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. 4 * 5 * SPDX-License-Identifier: BSD-3-Clause 6 */ 7 8 /* 9 * Top-level SMC handler for Versal power management calls and 10 * IPI setup functions for communication with PMC. 11 */ 12 13 #include <errno.h> 14 #include <stdbool.h> 15 16 #include "../drivers/arm/gic/v3/gicv3_private.h" 17 18 #include <common/runtime_svc.h> 19 #include <drivers/arm/gicv3.h> 20 #include <plat/common/platform.h> 21 22 #include <plat_private.h> 23 #include "pm_api_sys.h" 24 #include "pm_client.h" 25 #include "pm_ipi.h" 26 #include "pm_svc_main.h" 27 28 #define MODE 0x80000000U 29 30 #define XSCUGIC_SGIR_EL1_INITID_SHIFT 24U 31 #define INVALID_SGI 0xFFU 32 #define PM_INIT_SUSPEND_CB (30U) 33 #define PM_NOTIFY_CB (32U) 34 #define EVENT_CPU_PWRDWN (4U) 35 DEFINE_RENAME_SYSREG_RW_FUNCS(icc_asgi1r_el1, S3_0_C12_C11_6) 36 37 /* pm_up = true - UP, pm_up = false - DOWN */ 38 static bool pm_up; 39 static uint32_t sgi = (uint32_t)INVALID_SGI; 40 static bool pwrdwn_req_received; 41 42 static void notify_os(void) 43 { 44 int32_t cpu; 45 uint32_t reg; 46 47 cpu = plat_my_core_pos() + 1U; 48 49 reg = (cpu | (sgi << XSCUGIC_SGIR_EL1_INITID_SHIFT)); 50 write_icc_asgi1r_el1(reg); 51 } 52 53 static uint64_t cpu_pwrdwn_req_handler(uint32_t id, uint32_t flags, 54 void *handle, void *cookie) 55 { 56 uint32_t cpu_id = plat_my_core_pos(); 57 58 VERBOSE("Powering down CPU %d\n", cpu_id); 59 60 /* Deactivate CPU power down SGI */ 61 plat_ic_end_of_interrupt(CPU_PWR_DOWN_REQ_INTR); 62 63 return psci_cpu_off(); 64 } 65 66 static void request_cpu_pwrdwn(void) 67 { 68 VERBOSE("CPU power down request received\n"); 69 pm_ipi_irq_clear(primary_proc); 70 } 71 72 static uint64_t ipi_fiq_handler(uint32_t id, uint32_t flags, void *handle, 73 void *cookie) 74 { 75 uint32_t payload[4] = {0}; 76 enum pm_ret_status ret; 77 78 VERBOSE("Received IPI FIQ from firmware\n"); 79 80 (void)plat_ic_acknowledge_interrupt(); 81 82 ret = pm_get_callbackdata(payload, ARRAY_SIZE(payload), 0, 0); 83 if (ret != PM_RET_SUCCESS) { 84 payload[0] = ret; 85 } 86 87 switch (payload[0]) { 88 case PM_INIT_SUSPEND_CB: 89 if (sgi != INVALID_SGI) { 90 notify_os(); 91 } 92 break; 93 case PM_NOTIFY_CB: 94 if (sgi != INVALID_SGI) { 95 if (payload[2] == EVENT_CPU_PWRDWN) { 96 if (pwrdwn_req_received) { 97 pwrdwn_req_received = false; 98 request_cpu_pwrdwn(); 99 break; 100 } else { 101 pwrdwn_req_received = true; 102 } 103 } 104 notify_os(); 105 } 106 break; 107 case PM_RET_ERROR_INVALID_CRC: 108 pm_ipi_irq_clear(primary_proc); 109 WARN("Invalid CRC in the payload\n"); 110 break; 111 112 default: 113 pm_ipi_irq_clear(primary_proc); 114 WARN("Invalid IPI payload\n"); 115 break; 116 } 117 118 /* Clear FIQ */ 119 plat_ic_end_of_interrupt(id); 120 121 return 0; 122 } 123 124 /** 125 * pm_register_sgi() - PM register the IPI interrupt. 126 * @sgi_num: SGI number to be used for communication. 127 * @reset: Reset to invalid SGI when reset=1. 128 * 129 * Return: On success, the initialization function must return 0. 130 * Any other return value will cause the framework to ignore 131 * the service. 132 * 133 * Update the SGI number to be used. 134 * 135 */ 136 int32_t pm_register_sgi(uint32_t sgi_num, uint32_t reset) 137 { 138 if (reset == 1U) { 139 sgi = INVALID_SGI; 140 return 0; 141 } 142 143 if (sgi != INVALID_SGI) { 144 return -EBUSY; 145 } 146 147 if (sgi_num >= GICV3_MAX_SGI_TARGETS) { 148 return -EINVAL; 149 } 150 151 sgi = (uint32_t)sgi_num; 152 return 0; 153 } 154 155 /** 156 * pm_setup() - PM service setup. 157 * 158 * Return: On success, the initialization function must return 0. 159 * Any other return value will cause the framework to ignore 160 * the service. 161 * 162 * Initialization functions for Versal power management for 163 * communicaton with PMC. 164 * 165 * Called from sip_svc_setup initialization function with the 166 * rt_svc_init signature. 167 * 168 */ 169 int32_t pm_setup(void) 170 { 171 int32_t ret = 0; 172 173 pm_ipi_init(primary_proc); 174 pm_up = true; 175 176 /* register SGI handler for CPU power down request */ 177 ret = request_intr_type_el3(CPU_PWR_DOWN_REQ_INTR, cpu_pwrdwn_req_handler); 178 if (ret != 0) { 179 WARN("BL31: registering SGI interrupt failed\n"); 180 } 181 182 /* 183 * Enable IPI IRQ 184 * assume the rich OS is OK to handle callback IRQs now. 185 * Even if we were wrong, it would not enable the IRQ in 186 * the GIC. 187 */ 188 pm_ipi_irq_enable(primary_proc); 189 190 ret = request_intr_type_el3(PLAT_VERSAL_IPI_IRQ, ipi_fiq_handler); 191 if (ret != 0) { 192 WARN("BL31: registering IPI interrupt failed\n"); 193 } 194 195 gicd_write_irouter(gicv3_driver_data->gicd_base, PLAT_VERSAL_IPI_IRQ, MODE); 196 return ret; 197 } 198 199 /** 200 * eemi_for_compatibility() - EEMI calls handler for deprecated calls. 201 * @api_id: identifier for the API being called. 202 * @pm_arg: pointer to the argument data for the API call. 203 * @handle: Pointer to caller's context structure. 204 * @security_flag: SECURE_FLAG or NON_SECURE_FLAG. 205 * 206 * Return: If EEMI API found then, uintptr_t type address, else 0. 207 * 208 * Some EEMI API's use case needs to be changed in Linux driver, so they 209 * can take advantage of common EEMI handler in TF-A. As of now the old 210 * implementation of these APIs are required to maintain backward compatibility 211 * until their use case in linux driver changes. 212 * 213 */ 214 static uintptr_t eemi_for_compatibility(uint32_t api_id, uint32_t *pm_arg, 215 void *handle, uint32_t security_flag) 216 { 217 enum pm_ret_status ret; 218 219 switch (api_id) { 220 221 case (uint32_t)PM_IOCTL: 222 { 223 uint32_t value = 0U; 224 225 ret = pm_api_ioctl(pm_arg[0], pm_arg[1], pm_arg[2], 226 pm_arg[3], pm_arg[4], 227 &value, security_flag); 228 if (ret == PM_RET_ERROR_NOTSUPPORTED) 229 return (uintptr_t)0; 230 231 SMC_RET1(handle, (uint64_t)ret | ((uint64_t)value) << 32U); 232 } 233 234 case (uint32_t)PM_QUERY_DATA: 235 { 236 uint32_t data[PAYLOAD_ARG_CNT] = { 0 }; 237 238 ret = pm_query_data(pm_arg[0], pm_arg[1], pm_arg[2], 239 pm_arg[3], data, security_flag); 240 241 SMC_RET2(handle, (uint64_t)ret | ((uint64_t)data[0] << 32U), 242 (uint64_t)data[1] | ((uint64_t)data[2] << 32U)); 243 } 244 245 case (uint32_t)PM_FEATURE_CHECK: 246 { 247 uint32_t result[PAYLOAD_ARG_CNT] = {0U}; 248 249 ret = pm_feature_check(pm_arg[0], result, security_flag); 250 SMC_RET2(handle, (uint64_t)ret | ((uint64_t)result[0] << 32U), 251 (uint64_t)result[1] | ((uint64_t)result[2] << 32U)); 252 } 253 254 case PM_LOAD_PDI: 255 { 256 ret = pm_load_pdi(pm_arg[0], pm_arg[1], pm_arg[2], 257 security_flag); 258 SMC_RET1(handle, (uint64_t)ret); 259 } 260 261 default: 262 return (uintptr_t)0; 263 } 264 } 265 266 /** 267 * eemi_psci_debugfs_handler() - EEMI API invoked from PSCI. 268 * @api_id: identifier for the API being called. 269 * @pm_arg: pointer to the argument data for the API call. 270 * @handle: Pointer to caller's context structure. 271 * @security_flag: SECURE_FLAG or NON_SECURE_FLAG. 272 * 273 * These EEMI APIs performs CPU specific power management tasks. 274 * These EEMI APIs are invoked either from PSCI or from debugfs in kernel. 275 * These calls require CPU specific processing before sending IPI request to 276 * Platform Management Controller. For example enable/disable CPU specific 277 * interrupts. This requires separate handler for these calls and may not be 278 * handled using common eemi handler. 279 * 280 * Return: If EEMI API found then, uintptr_t type address, else 0. 281 * 282 */ 283 static uintptr_t eemi_psci_debugfs_handler(uint32_t api_id, uint32_t *pm_arg, 284 void *handle, uint32_t security_flag) 285 { 286 enum pm_ret_status ret; 287 288 switch (api_id) { 289 290 case (uint32_t)PM_SELF_SUSPEND: 291 ret = pm_self_suspend(pm_arg[0], pm_arg[1], pm_arg[2], 292 pm_arg[3], security_flag); 293 SMC_RET1(handle, (u_register_t)ret); 294 295 case (uint32_t)PM_FORCE_POWERDOWN: 296 ret = pm_force_powerdown(pm_arg[0], pm_arg[1], security_flag); 297 SMC_RET1(handle, (u_register_t)ret); 298 299 case (uint32_t)PM_REQ_SUSPEND: 300 ret = pm_req_suspend(pm_arg[0], pm_arg[1], pm_arg[2], 301 pm_arg[3], security_flag); 302 SMC_RET1(handle, (u_register_t)ret); 303 304 case (uint32_t)PM_ABORT_SUSPEND: 305 ret = pm_abort_suspend(pm_arg[0], security_flag); 306 SMC_RET1(handle, (u_register_t)ret); 307 308 case (uint32_t)PM_SYSTEM_SHUTDOWN: 309 ret = pm_system_shutdown(pm_arg[0], pm_arg[1], security_flag); 310 SMC_RET1(handle, (u_register_t)ret); 311 312 default: 313 return (uintptr_t)0; 314 } 315 } 316 317 /** 318 * TF_A_specific_handler() - SMC handler for TF-A specific functionality. 319 * @api_id: identifier for the API being called. 320 * @pm_arg: pointer to the argument data for the API call. 321 * @handle: Pointer to caller's context structure. 322 * @security_flag: SECURE_FLAG or NON_SECURE_FLAG. 323 * 324 * These EEMI calls performs functionality that does not require 325 * IPI transaction. The handler ends in TF-A and returns requested data to 326 * kernel from TF-A. 327 * 328 * Return: If TF-A specific API found then, uintptr_t type address, else 0 329 * 330 */ 331 static uintptr_t TF_A_specific_handler(uint32_t api_id, uint32_t *pm_arg, 332 void *handle, uint32_t security_flag) 333 { 334 switch (api_id) { 335 336 case TF_A_PM_REGISTER_SGI: 337 { 338 int32_t ret; 339 340 ret = pm_register_sgi(pm_arg[0], pm_arg[1]); 341 if (ret != 0) { 342 SMC_RET1(handle, (uint32_t)PM_RET_ERROR_ARGS); 343 } 344 345 SMC_RET1(handle, (uint32_t)PM_RET_SUCCESS); 346 } 347 348 case PM_GET_CALLBACK_DATA: 349 { 350 uint32_t result[4] = {0}; 351 enum pm_ret_status ret; 352 353 ret = pm_get_callbackdata(result, ARRAY_SIZE(result), security_flag, 1U); 354 if (ret != 0) { 355 result[0] = ret; 356 } 357 358 SMC_RET2(handle, 359 (uint64_t)result[0] | ((uint64_t)result[1] << 32U), 360 (uint64_t)result[2] | ((uint64_t)result[3] << 32U)); 361 } 362 363 case PM_GET_TRUSTZONE_VERSION: 364 SMC_RET1(handle, (uint64_t)PM_RET_SUCCESS | 365 ((uint64_t)TZ_VERSION << 32U)); 366 367 default: 368 return (uintptr_t)0; 369 } 370 } 371 372 /** 373 * eemi_handler() - Prepare EEMI payload and perform IPI transaction. 374 * @api_id: identifier for the API being called. 375 * @pm_arg: pointer to the argument data for the API call. 376 * @handle: Pointer to caller's context structure. 377 * @security_flag: SECURE_FLAG or NON_SECURE_FLAG. 378 * 379 * EEMI - Embedded Energy Management Interface is Xilinx proprietary protocol 380 * to allow communication between power management controller and different 381 * processing clusters. 382 * 383 * This handler prepares EEMI protocol payload received from kernel and performs 384 * IPI transaction. 385 * 386 * Return: If EEMI API found then, uintptr_t type address, else 0 387 * 388 */ 389 static uintptr_t eemi_handler(uint32_t api_id, uint32_t *pm_arg, 390 void *handle, uint32_t security_flag) 391 { 392 enum pm_ret_status ret; 393 uint32_t buf[PAYLOAD_ARG_CNT] = {0}; 394 395 ret = pm_handle_eemi_call(security_flag, api_id, pm_arg[0], pm_arg[1], 396 pm_arg[2], pm_arg[3], pm_arg[4], 397 (uint64_t *)buf); 398 /* 399 * Two IOCTLs, to get clock name and pinctrl name of pm_query_data API 400 * receives 5 words of respoonse from firmware. Currently linux driver can 401 * receive only 4 words from TF-A. So, this needs to be handled separately 402 * than other eemi calls. 403 */ 404 if (api_id == (uint32_t)PM_QUERY_DATA) { 405 if ((pm_arg[0] == XPM_QID_CLOCK_GET_NAME || 406 pm_arg[0] == XPM_QID_PINCTRL_GET_FUNCTION_NAME) && 407 ret == PM_RET_SUCCESS) { 408 SMC_RET2(handle, (uint64_t)buf[0] | ((uint64_t)buf[1] << 32U), 409 (uint64_t)buf[2] | ((uint64_t)buf[3] << 32U)); 410 } 411 } 412 413 SMC_RET2(handle, (uint64_t)ret | ((uint64_t)buf[0] << 32U), 414 (uint64_t)buf[1] | ((uint64_t)buf[2] << 32U)); 415 } 416 417 /** 418 * pm_smc_handler() - SMC handler for PM-API calls coming from EL1/EL2. 419 * @smc_fid: Function Identifier. 420 * @x1: SMC64 Arguments from kernel. 421 * @x2: SMC64 Arguments from kernel. 422 * @x3: SMC64 Arguments from kernel (upper 32-bits). 423 * @x4: Unused. 424 * @cookie: Unused. 425 * @handle: Pointer to caller's context structure. 426 * @flags: SECURE_FLAG or NON_SECURE_FLAG. 427 * 428 * Return: Unused. 429 * 430 * Determines that smc_fid is valid and supported PM SMC Function ID from the 431 * list of pm_api_ids, otherwise completes the request with 432 * the unknown SMC Function ID. 433 * 434 * The SMC calls for PM service are forwarded from SIP Service SMC handler 435 * function with rt_svc_handle signature. 436 * 437 */ 438 uint64_t pm_smc_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, uint64_t x3, 439 uint64_t x4, const void *cookie, void *handle, uint64_t flags) 440 { 441 uintptr_t ret; 442 uint32_t pm_arg[PAYLOAD_ARG_CNT] = {0}; 443 uint32_t security_flag = NON_SECURE_FLAG; 444 uint32_t api_id; 445 bool status = false, status_tmp = false; 446 447 /* Handle case where PM wasn't initialized properly */ 448 if (pm_up == false) { 449 SMC_RET1(handle, SMC_UNK); 450 } 451 452 /* 453 * Mark BIT24 payload (i.e 1st bit of pm_arg[3] ) as secure (0) 454 * if smc called is secure 455 * 456 * Add redundant macro call to immune the code from glitches 457 */ 458 SECURE_REDUNDANT_CALL(status, status_tmp, is_caller_secure, flags); 459 if ((status != false) && (status_tmp != false)) { 460 security_flag = SECURE_FLAG; 461 } 462 463 pm_arg[0] = (uint32_t)x1; 464 pm_arg[1] = (uint32_t)(x1 >> 32U); 465 pm_arg[2] = (uint32_t)x2; 466 pm_arg[3] = (uint32_t)(x2 >> 32U); 467 pm_arg[4] = (uint32_t)x3; 468 (void)(x4); 469 api_id = smc_fid & FUNCID_NUM_MASK; 470 471 ret = eemi_for_compatibility(api_id, pm_arg, handle, security_flag); 472 if (ret != (uintptr_t)0) { 473 return ret; 474 } 475 476 ret = eemi_psci_debugfs_handler(api_id, pm_arg, handle, flags); 477 if (ret != (uintptr_t)0) { 478 return ret; 479 } 480 481 ret = TF_A_specific_handler(api_id, pm_arg, handle, security_flag); 482 if (ret != (uintptr_t)0) { 483 return ret; 484 } 485 486 ret = eemi_handler(api_id, pm_arg, handle, security_flag); 487 488 return ret; 489 } 490