fix(versal): modify IPI4 and IPI5 trigger bit definitions

The IPI4 and IPI5 trigger bit definitions are incorrect according
to the register database specification. This discrepancy can
cause IPI com

fix(versal): modify IPI4 and IPI5 trigger bit definitions

The IPI4 and IPI5 trigger bit definitions are incorrect according
to the register database specification. This discrepancy can
cause IPI communication failures between processing units in
Versal SoCs. So, modified the trigger bits to align the software
definitions with the hardware register specification as documented
in the register database.

Change-Id: I1e32961124daf8e5635906fb615e98a650130f27
Signed-off-by: Devanshi Chauhan <devanshi.chauhan@amd.com>

show more ...

feat(xilinx): use common SECURE/NON_SECURE macro

Remove platform-specific macro definitions such as SECURE_FLAG and
NON_SECURE_FLAG, and replace them with the common macros SECURE and
NON_SECURE acr

feat(xilinx): use common SECURE/NON_SECURE macro

Remove platform-specific macro definitions such as SECURE_FLAG and
NON_SECURE_FLAG, and replace them with the common macros SECURE and
NON_SECURE across all AMD-Xilinx platforms.

Change-Id: I95465e29ac8a9370da135c2113203c3206ecfec0
Signed-off-by: Ronak Jain <ronak.jain@amd.com>

show more ...

Merge changes from topic "xlnx_misra_fix_gen_arm" into integration

* changes:
fix(arm-drivers): add missing curly braces
fix(arm): typecast operands to match data type
fix(arm-drivers): declar

Merge changes from topic "xlnx_misra_fix_gen_arm" into integration

* changes:
fix(arm-drivers): add missing curly braces
fix(arm): typecast operands to match data type
fix(arm-drivers): declare unused parameters as void

show more ...

fix(versal): update integer const with suffix U

Versal: standardize unsigned integer constants to use suffix.
Updated all unsigned integer constants in the Versal platform
to use the unsigned suffix

fix(versal): update integer const with suffix U

Versal: standardize unsigned integer constants to use suffix.
Updated all unsigned integer constants in the Versal platform
to use the unsigned suffix (e.g., `10U`)
instead of the prefix style (e.g., `U(10)`) for consistency.

Change-Id: Ie4d20c18cccede20062d6189c1024acfb3a3dce0
Signed-off-by: Saivardhan Thatikonda <saivardhan.thatikonda@amd.com>

show more ...

fix(versal): replace ull with ULL to fix misra violation

This corrects the MISRA violation C2012-7.3:
The issue is because the numeric literal "1ull" uses a lowercase 'l'
to specify its type. 'l' ca

fix(versal): replace ull with ULL to fix misra violation

This corrects the MISRA violation C2012-7.3:
The issue is because the numeric literal "1ull" uses a lowercase 'l'
to specify its type. 'l' can be visually ambiguous when placed next
to digits, especially with '1', Replacing "ull" with "ULL" is avoids
the confusion and fixes the issue.

Change-Id: I204d90316ea3bfec314c284284a423618274c87b
Signed-off-by: Saivardhan Thatikonda <saivardhan.thatikonda@amd.com>

show more ...

fix(versal): match function declaration with its definition

This corrects the MISRA violation C2012-4.6:
The function declaration shall be match with whose definition.
In this case, 'int32_t' needs

fix(versal): match function declaration with its definition

This corrects the MISRA violation C2012-4.6:
The function declaration shall be match with whose definition.
In this case, 'int32_t' needs to be replaced with 'int' in the
function declaration.

Change-Id: I15f1f5f93a904c057af86da4c22d4fd2b9c7a7eb
Signed-off-by: Saivardhan Thatikonda <saivardhan.thatikonda@amd.com>

show more ...

fix(arm): typecast operands to match data type

This corrects the MISRA violation C2012-10.3:
The value of an expression shall not be assigned to an object with a
narrower essential type or of a diff

fix(arm): typecast operands to match data type

This corrects the MISRA violation C2012-10.3:
The value of an expression shall not be assigned to an object with a
narrower essential type or of a different essential type category.
The condition is explicitly checked against 0U, appending 'U' and
typecasting for unsigned comparison.

Change-Id: I04089721d124a2701e10d3f6e0ed8f82e3f6e0b3
Signed-off-by: Saivardhan Thatikonda <saivardhan.thatikonda@amd.com>

show more ...

feat(versal): add hooks for mmap and early setup

Add early setup hooks through custom_early_setup() and provide a
mechanism to support custom memory mapping, including the extension
of the memory ma

feat(versal): add hooks for mmap and early setup

Add early setup hooks through custom_early_setup() and provide a
mechanism to support custom memory mapping, including the extension
of the memory map via custom_mmap_add(). This change may also
require alignment of the MAX_XLAT_TABLE and MAX_XLAT_TABLES macros.
These can be defined within the custom_pkg.mk makefile as follows:

MAX_MMAP_REGIONS := XY
$(eval $(call add_define,MAX_MMAP_REGIONS))
MAX_XLAT_TABLES := XZ
$(eval $(call add_define,MAX_XLAT_TABLES))

If PLATFORM_STACK_SIZE is not already defined, a default value
should be used. This allows for configurability of the stack size
across different interfaces, such as custom packages. The
custom_early_setup() function enables early low-level operations
to bring the system into a correct state. Support for a custom
SiP service is also added. A basic implementation of
custom_smc_handler() is provided by the platform, while the actual
definition is expected to be supplied by the custom package. This
feature is designed for use by external libraries, such as those
that require status checking. This code introduces a generic
framework for integrating custom logic via the
$(CUSTOM_PKG_PATH)/custom_pkg.mk makefile, including
optional support for custom SMC functionality, which is determined
by the custom package.

Change-Id: If9107b32c8c1ca4026d0a2980901e841fc6e03f7
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>

show more ...

fix(versal): handle invalid entry point in cpu hotplug scenario

Invalid addresses are from 2G-4G and also address where TF-A is.

Change-Id: I3d07808821da3bdd46be819ad829cb284f9d53d3
Signed-off-by:

fix(versal): handle invalid entry point in cpu hotplug scenario

Invalid addresses are from 2G-4G and also address where TF-A is.

Change-Id: I3d07808821da3bdd46be819ad829cb284f9d53d3
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

show more ...

fix(versal): add unsigned suffix to match data type

This corrects the MISRA violation C2012-7.2:
A “u” or “U” suffix shall be applied to all integer constants that
are represented in an unsigned typ

fix(versal): add unsigned suffix to match data type

This corrects the MISRA violation C2012-7.2:
A “u” or “U” suffix shall be applied to all integer constants that
are represented in an unsigned type.
Appended "U" suffix to integer constant to represent it as
unsigned type.

Change-Id: I76f3c5903ed21ecba4d600e879d93026fc744f6c
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

show more ...

fix(versal): typecast expressions to match data type

This corrects the MISRA violation C2012-10.4:
Both operands of an operator in which the usual arithmetic
conversions are performed shall have the

fix(versal): typecast expressions to match data type

This corrects the MISRA violation C2012-10.4:
Both operands of an operator in which the usual arithmetic
conversions are performed shall have the same essential type
category.
The condition is explicitly checked against 0U, appending 'U' and
typecasting for unsigned comparison.

Change-Id: Ide520aa8ec900d0e23e80753d7082e34b6897e8f
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

show more ...

fix(versal): add external declaration

This corrects the MISRA violation C2012-8.4:
A compatible declaration shall be visible when an object or
function with external linkage is defined.

Change-Id:

fix(versal): add external declaration

This corrects the MISRA violation C2012-8.4:
A compatible declaration shall be visible when an object or
function with external linkage is defined.

Change-Id: I91817596c5de84b259a5dffcc01a7b1106a5b7a4
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

show more ...

feat(xilinx): add none console

None console does not register boot and runtime console.
User will not observe any console logs.

Change-Id: I39877c900f399ae7cffc1bb599b30c7a23888fc8
Signed-off-by: M

feat(xilinx): add none console

None console does not register boot and runtime console.
User will not observe any console logs.

Change-Id: I39877c900f399ae7cffc1bb599b30c7a23888fc8
Signed-off-by: Michal Simek <michal.simek@amd.com>
Signed-off-by: Maheedhar Bollapalli <MaheedharSai.Bollapalli@amd.com>

show more ...

feat(versal): add DTB console to platform.mk

In the platform.mk file, new console types named dtb
are to be created a macro, VERSAL_CONSOLE_ID_dtb, will
be introduced to check DT console.Users will

feat(versal): add DTB console to platform.mk

In the platform.mk file, new console types named dtb
are to be created a macro, VERSAL_CONSOLE_ID_dtb, will
be introduced to check DT console.Users will have the
option to select VERSAL_CONSOLE to dtb, which will run
from the DDR address and OCM. The address XILINX_OF_BOARD_DTB_ADDR
needs to be provided. This configuration will register the
DT console in TF-A.

Change-Id: Iee0ed2d5bb73c833f34809699203622b912cdbd7
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
Signed-off-by: Maheedhar Bollapalli <MaheedharSai.Bollapalli@amd.com>

show more ...

feat(versal): dedicate console for boot and runtime

Introduce a build-time parameter (CONSOLE_RUNTIME) to select
separate runtime console options. For boot-time console, remove
the runtime flag and

feat(versal): dedicate console for boot and runtime

Introduce a build-time parameter (CONSOLE_RUNTIME) to select
separate runtime console options. For boot-time console, remove
the runtime flag and add a boot/crash flag. Additionally,
introduce an RT_CONSOLE_IS macro to check different UART types.

Implement a common function, console_runtime_init(), to initialize
the runtime console. Ensure that all platforms have access to
this feature.

The current implementation utilizes a single console for boot,
crash, and runtime. Make sure that the dedicated console integrates
into runtime and crash scenarios.

Change-Id: I7b71fb4a8cd36e8e91c98ebee09904ba47222e33
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
Signed-off-by: Maheedhar Bollapalli <MaheedharSai.Bollapalli@amd.com>

show more ...

feat(versal): add support for QEMU COSIM platform

QEMU COSIM introduces a new platform id for Versal Platform.
QEMU COSIM is equivalent to QEMU with additional COSIM
extensions, so just switching pl

feat(versal): add support for QEMU COSIM platform

QEMU COSIM introduces a new platform id for Versal Platform.
QEMU COSIM is equivalent to QEMU with additional COSIM
extensions, so just switching platform_id to QEMU if QEMU COSIM
id is detected.

Change-Id: If81e0bf04301c7101f89d0df13134f7d04e8c257
Signed-off-by: Akshay Belsare <akshay.belsare@amd.com>

show more ...