fix(versal): add const qualifier

This correct the MISRA violation C2012-8.13:
A pointer should point to a const-qualified type whenever possible.
Added const qualifier to pointer variables and funct

fix(versal): add const qualifier

This correct the MISRA violation C2012-8.13:
A pointer should point to a const-qualified type whenever possible.
Added const qualifier to pointer variables and function arguments.

Change-Id: I33cc594816809a118bff369d98d5689a96f6867f
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

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Merge changes from topic "xlnx_fix_eval_bool" into integration

* changes:
fix(versal_net): evaluate condition for boolean
fix(versal): evaluate condition for boolean
fix(zynqmp): evaluate cond

Merge changes from topic "xlnx_fix_eval_bool" into integration

* changes:
fix(versal_net): evaluate condition for boolean
fix(versal): evaluate condition for boolean
fix(zynqmp): evaluate condition for boolean
fix(xilinx): rename variable to avoid conflict

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Merge changes from topic "xlnx_fix_plat_console_changes" into integration

* changes:
feat(xilinx): add none console
feat(versal2): add dtb & runtime console
feat(versal-net): add DTB console t

Merge changes from topic "xlnx_fix_plat_console_changes" into integration

* changes:
feat(xilinx): add none console
feat(versal2): add dtb & runtime console
feat(versal-net): add DTB console to platform.mk
feat(versal-net): dedicate console for boot and runtime
feat(versal): add DTB console to platform.mk
feat(versal): dedicate console for boot and runtime
refactor(xilinx): register runtime console directly
refactor(xilinx): console registration through console holder structure
feat(zynqmp): add DTB console to platform.mk
feat(zynqmp): dedicate console for boot and runtime
fix(xilinx): dcc to support runtime console scope
refactor(xilinx): create generic function for DT console
refactor(xilinx): rename setup_runtime_console to generic
chore(xilinx): rename console variables
chore(xilinx): rename runtime console to DT console

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feat(xilinx): add none console

None console does not register boot and runtime console.
User will not observe any console logs.

Change-Id: I39877c900f399ae7cffc1bb599b30c7a23888fc8
Signed-off-by: M

feat(xilinx): add none console

None console does not register boot and runtime console.
User will not observe any console logs.

Change-Id: I39877c900f399ae7cffc1bb599b30c7a23888fc8
Signed-off-by: Michal Simek <michal.simek@amd.com>
Signed-off-by: Maheedhar Bollapalli <MaheedharSai.Bollapalli@amd.com>

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refactor(xilinx): register runtime console directly

Initialize runtime console early instead of deferred init.

Change-Id: Iae2f69ba4da27b62b69d640e3ccdc1303f549617
Signed-off-by: Michal Simek <mich

refactor(xilinx): register runtime console directly

Initialize runtime console early instead of deferred init.

Change-Id: Iae2f69ba4da27b62b69d640e3ccdc1303f549617
Signed-off-by: Michal Simek <michal.simek@amd.com>
Signed-off-by: Maheedhar Bollapalli <MaheedharSai.Bollapalli@amd.com>

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refactor(xilinx): console registration through console holder structure

Refactored register_console using console holder structure as
input. Structure holds console scope and console type as additio

refactor(xilinx): console registration through console holder structure

Refactored register_console using console holder structure as
input. Structure holds console scope and console type as additional
members. These modifications enhance code readability and
maintainability, contributing to a clearer and more sustainable
codebase for future development.

Change-Id: I7fcc1accfdecdacc205d427a80031536c456638e
Signed-off-by: Maheedhar Bollapalli <MaheedharSai.Bollapalli@amd.com>

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feat(zynqmp): add DTB console to platform.mk

In the platform.mk file, new console types named dtb are to be created
a macro, ZYNQMP_CONSOLE_ID_dtb, will be introduced to check DT console.
Users will

feat(zynqmp): add DTB console to platform.mk

In the platform.mk file, new console types named dtb are to be created
a macro, ZYNQMP_CONSOLE_ID_dtb, will be introduced to check DT console.
Users will have the option to select ZYNQMP_CONSOLE to dtb, which will
run from the DDR address. The address XILINX_OF_BOARD_DTB_ADDR needs
to be provided. This configuration will register the DT console in TF-A.
Flags for the ZynqMP platform and other AMD-Xilinx platforms will be
updated to utilize common code.

Change-Id: If74da4a80196575335c9d5562e6d8cd12d99561c
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
Signed-off-by: Maheedhar Bollapalli <MaheedharSai.Bollapalli@amd.com>

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feat(zynqmp): dedicate console for boot and runtime

Introduce a build-time parameter (CONSOLE_RUNTIME) to select
separate runtime console options. For boot-time console, remove
the runtime flag and

feat(zynqmp): dedicate console for boot and runtime

Introduce a build-time parameter (CONSOLE_RUNTIME) to select
separate runtime console options. For boot-time console, remove
the runtime flag and add a boot/crash flag. Additionally,
introduce an RT_CONSOLE_IS macro to check different UART types.

Implement a common function, console_runtime_init(), to initialize
the runtime console. Ensure that all platforms have access to
this feature.

The current implementation utilizes a single console for boot,
crash, and runtime. Make sure that the dedicated console integrates
into runtime and crash scenarios.

Change-Id: I32913dede3d87109e54d179e7d99f45c33b9097b
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
Signed-off-by: Maheedhar Bollapalli <MaheedharSai.Bollapalli@amd.com>

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fix(xilinx): dcc to support runtime console scope

DCC driver to support boot and runtime console scope
switch for dedicated boot and runtime consoles.

Change-Id: I7769dc44860a5fda99ca42ce17a3a60092

fix(xilinx): dcc to support runtime console scope

DCC driver to support boot and runtime console scope
switch for dedicated boot and runtime consoles.

Change-Id: I7769dc44860a5fda99ca42ce17a3a6009288d7e7
Signed-off-by: Maheedhar Bollapalli <MaheedharSai.Bollapalli@amd.com>

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fix(xilinx): rename variable to avoid conflict

This corrects the MISRA violation C2012-5.3:
An identifier declared in an inner scope shall not hide an
identifier declared in an outer scope.
Renamed

fix(xilinx): rename variable to avoid conflict

This corrects the MISRA violation C2012-5.3:
An identifier declared in an inner scope shall not hide an
identifier declared in an outer scope.
Renamed variable to prevent the conflict with static inline
function with same identifier name declared in the outer scope.

Change-Id: Ic07a4d25ed43fdb7fcf9fba462787d6951079b5c
Signed-off-by: Nithin G <nithing@amd.com>
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

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refactor(xilinx): create generic function for DT console

The code in dt_console_init() has been refactored into multiple
functions to establish a more generic approach for retrieving UART
informatio

refactor(xilinx): create generic function for DT console

The code in dt_console_init() has been refactored into multiple
functions to establish a more generic approach for retrieving UART
information from DT. These modifications enhance code readability
and maintainability, contributing to a clearer and more sustainable
codebase for future development.

Change-Id: I877b7ae484bbf2f5919f3c79e5ae650bb93e3037
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
Signed-off-by: Maheedhar Bollapalli <MaheedharSai.Bollapalli@amd.com>

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refactor(xilinx): rename setup_runtime_console to generic

The setup_runtime_console() function is renamed to register_console()
for the purpose of reusing it in the registration of the console.

Cha

refactor(xilinx): rename setup_runtime_console to generic

The setup_runtime_console() function is renamed to register_console()
for the purpose of reusing it in the registration of the console.

Change-Id: I6b340423169aa6794d07502dadab65c3f0209339
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>

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chore(xilinx): rename console variables

Updates variable names to follow a more consistent
and descriptive naming.

These changes improve code readability and maintainability, making
the codebase mo

chore(xilinx): rename console variables

Updates variable names to follow a more consistent
and descriptive naming.

These changes improve code readability and maintainability, making
the codebase more understandable and maintainable for future
development.

Change-Id: I3fff8fe371f9d4d3489ffe62cbf721381403fef5
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>

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chore(xilinx): rename runtime console to DT console

Renames the runtime_console_init() function to dt_console_init()
for better naming clarity.

Change-Id: I7f6d80ce23307d57e09c613be48482d49d6ad45b

chore(xilinx): rename runtime console to DT console

Renames the runtime_console_init() function to dt_console_init()
for better naming clarity.

Change-Id: I7f6d80ce23307d57e09c613be48482d49d6ad45b
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>

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fix(xilinx): declare unused parameters as void

This corrects the MISRA violation C2012-2.7:
There should be no unused parameters in functions.
Declared unused function parameters as void.

Change-Id

fix(xilinx): declare unused parameters as void

This corrects the MISRA violation C2012-2.7:
There should be no unused parameters in functions.
Declared unused function parameters as void.

Change-Id: I1d369d977e0f2749024736d53fbb5c7d5555f6cb
Signed-off-by: Nithin G <nithing@amd.com>
Signed-off-by: Maheedhar Bollapalli <MaheedharSai.Bollapalli@amd.com>

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fix(xilinx): warn if reserved memory pre-exists in DT

Memory reservation for tf-a does not happen in
runtime if memory reservation node pre-exists in DT.
Presence of reserved area is checked and use

fix(xilinx): warn if reserved memory pre-exists in DT

Memory reservation for tf-a does not happen in
runtime if memory reservation node pre-exists in DT.
Presence of reserved area is checked and user is
warned if it pre-exists.

Change-Id: I50e18be942777747e9074bb9d8e0305a29c28178
Signed-off-by: Maheedhar Bollapalli <MaheedharSai.Bollapalli@amd.com>

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fix(xilinx): optimize logic to read IPI response

Optimize logic to read IPI response from firmware and avoid using
temporary buffer. Also, use pointer instead of array as per standard
format to pass

fix(xilinx): optimize logic to read IPI response

Optimize logic to read IPI response from firmware and avoid using
temporary buffer. Also, use pointer instead of array as per standard
format to pass by reference in function.

Change-Id: I45ebaeacc932a11bbfd4b7d9b9c43b4ee8ee7df2
Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>

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fix(xilinx): fix OVERRUN coverity violation

This change fixes below MISRA violation:
CID 441243: Memory - corruptions (OVERRUN)
Overrunning callee's array of size 7 by passing argument "7UL" in ca

fix(xilinx): fix OVERRUN coverity violation

This change fixes below MISRA violation:
CID 441243: Memory - corruptions (OVERRUN)
Overrunning callee's array of size 7 by passing argument "7UL" in call to
"pm_ipi_send_sync".

Change-Id: Ie7fd9ccad058e97eb4b36c4f0e77be8bfb3e6006
Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>

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Merge "fix(versal2): add ufs specific features support" into integration

fix(versal2): add ufs specific features support

Following IOCTL IDs are required for UFS specific functionalities.

IOCTL ID - 40(IOCTL_UFS_TXRX_CFGRDY_GET)
This gives the Tx_Rx_config_rdy_signal_mo

fix(versal2): add ufs specific features support

Following IOCTL IDs are required for UFS specific functionalities.

IOCTL ID - 40(IOCTL_UFS_TXRX_CFGRDY_GET)
This gives the Tx_Rx_config_rdy_signal_mon(0xF1061054) register value
which contains the Tx and Rx lanes configuration ready signal information.

IOCTL ID - 41(IOCTL_UFS_SRAM_CSR_SEL)
Select - 0(IOCTL_UFS_SRAM_CSR_SET)
This will allow to set sram control and status register (0xF106104C)
with the value provided by driver.

Select - 1(IOCTL_UFS_SRAM_CSR_GET)
This should return the sram control and status register (0xF106104C) value
to the driver.

UFS Host reset assert/de-assert(using SCMI) support is added.
register address : 0xF1260340

UFS PHY reset assert/de-assert(using SCMI) support is added.
register address : 0xF1061050

Change-Id: I5368cc7251350946bd5ddb3a4c817b75e1d4a43e
Signed-off-by: Amit Nagal <amit.nagal@amd.com>

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feat(xilinx): add feature check function for TF-A specific APIs

Currently, there is common feature check function for firmware APIs
and TF-A specific APIs. This should be separate from firmware APIs

feat(xilinx): add feature check function for TF-A specific APIs

Currently, there is common feature check function for firmware APIs
and TF-A specific APIs. This should be separate from firmware APIs.
So add new TF-A API for feature check of TF-A specific APIs.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: I5585d17fb6aa1e98989d935117cca10bdb85133e

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feat(xilinx): update TF-A to passthrough all PLM commands

Currently, the IDs used in PLM CMD header are mixed with SMC IDs in
TF-A which is restricting the range of IDs that can be used by PLM.
Also

feat(xilinx): update TF-A to passthrough all PLM commands

Currently, the IDs used in PLM CMD header are mixed with SMC IDs in
TF-A which is restricting the range of IDs that can be used by PLM.
Also, the SMC call from firmware driver is passing all 7 32-bit
words in request but TF-A is not passing all of them to firmware and
TF-A passes only 4 32-bit words from firmware to Linux in response.

So, update TF-A to passthrough all PLM commands by having a single
fixed SMC ID for all PLM commands and keep the PLM header in subsequent
SMC arguments. Also, enhance size of payload argument count to support
maximum payloads in request and response buffers to transmit all the
IPI command properly.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: I2601caba849bce3f294177b63baa1ad688e3c5bb

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fix(xilinx): fix logic to read ipi response

Currently, PLM IPI command supports total 8 32-bit payloads. But existing
logic to read IPI response in TF-A is trying to read 9 32-bit payloads
(ret stat

fix(xilinx): fix logic to read ipi response

Currently, PLM IPI command supports total 8 32-bit payloads. But existing
logic to read IPI response in TF-A is trying to read 9 32-bit payloads
(ret status + 8 ret payloads) in case of IPI_CRC_CHECK enabled which is
incorrect.

So, fix logic to read only 8 32-bit payloads (ret status + 6 ret payloads + CRC)
in case when IPI_CRC_CHECK is enabled and read 7 32-bit payloads
(ret status + 5 ret payloads + CRC) in case when IPI_CRC_CHECK is disabled.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: I0abca2f787cc7a66fdd5522e6bd15a9771029071

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fix(xilinx): handle power down event if SGI not registered

Currently, if SGI is not registered by Linux and power down event from
firmware is received then it's not getting handled in TF-A and core

fix(xilinx): handle power down event if SGI not registered

Currently, if SGI is not registered by Linux and power down event from
firmware is received then it's not getting handled in TF-A and core power
down is not happening. Because of that subsystem restart or force power
down without Linux boot is not happening. So, handle power down event in
TF-A if Linux not registered SGI.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: I0c23792daba6ae47004ae99e232c77e17230bcfb

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fix(xilinx): register for idle callback

Currently, only Linux registering for getting idle callback during
subsystem restart or force power down. Because of that if Linux boot
hang or someone wants

fix(xilinx): register for idle callback

Currently, only Linux registering for getting idle callback during
subsystem restart or force power down. Because of that if Linux boot
hang or someone wants to do subsystem restart before Linux boot then
it's not working. So, register for idle callback in TF-A to get idle
callback during subsystem restart or force power down to do ARM
specific steps for proper power down of core.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: If7c01f79be6958678243be844bcfdc50d59b0fb8

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