History log of /rk3399_ARM-atf/include/ (Results 826 – 850 of 3957)
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d6af234424-Jan-2024 Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>

refactor(cm): couple el2 registers with dependent feature flags

Currently the EL2 part of the context structure (el2_sysregs_t), is
mostly feature dependent.

For instance, CTX_HCRX_EL2 is only need

refactor(cm): couple el2 registers with dependent feature flags

Currently the EL2 part of the context structure (el2_sysregs_t), is
mostly feature dependent.

For instance, CTX_HCRX_EL2 is only needed when FEAT_HCX
(ENABLE_FEAT_HCX=1) is set, but the entry is unconditionally added
in the EL2 context structure and thereby consuming memory even in
build configurations where FEAT_HCX is disabled.

Henceforth, all such context entries should be coupled/tied with
their respective feature enables and be optimized away when unused.
This would reduce the context memory allocation for platforms, that
dont enable/support all the architectural features at once.

Further, converting the assembly context-offset entries into
a c structure relies on garbage collection of the linker
removing unreferenced structures from memory, as well as aiding
in readability and future maintenance.

Change-Id: I0cf49498ee3033cb6f3ee3810331121b26627783
Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>

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33c665ae02-Jan-2024 Harrison Mutai <harrison.mutai@arm.com>

fix(cpus): workaround for Cortex-A715 erratum 2344187

Cortex-A715 erratum 2344187 is a Cat B erratum that applies to r0p0,
r1p0 and is fixed in r1p1. The workaround is to set GCR_EL1.RRND to
0b1, an

fix(cpus): workaround for Cortex-A715 erratum 2344187

Cortex-A715 erratum 2344187 is a Cat B erratum that applies to r0p0,
r1p0 and is fixed in r1p1. The workaround is to set GCR_EL1.RRND to
0b1, and apply an implementation specific patch sequence.

SDEN: https://developer.arm.com/documentation/SDEN2148827/latest

Change-Id: I78ea39a91254765c964bff89f771af33b23f29c1
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>

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7b02a57206-Mar-2024 Bipin Ravi <bipin.ravi@arm.com>

Merge "fix(gic600): workaround for Part 1 of GIC600 erratum 2384374" into integration

24a4a0a505-Feb-2024 Arvind Ram Prakash <arvind.ramprakash@arm.com>

fix(gic600): workaround for Part 1 of GIC600 erratum 2384374

GIC600 erratum 2384374 is a Category B erratum. Part 1 is fixed
in this patch, and the Part 1 failure mode is described as
'If the packet

fix(gic600): workaround for Part 1 of GIC600 erratum 2384374

GIC600 erratum 2384374 is a Category B erratum. Part 1 is fixed
in this patch, and the Part 1 failure mode is described as
'If the packet to be sent is a SET packet, then a higher priority SET
may not be sent when it should be until an unblocking event occurs.'

This is handled by calling gicv3_apply_errata_wa_2384374() in the
ehf_deactivate_priority() path, so that when EHF restores the priority
to the original priority, the interrupt packet buffered
in the GIC can be sent.

gicv3_apply_errata_wa_2384374() is the workaround for
the Part 2 of erratum 2384374 which flush packets from the GIC buffer
and is being used in this patch.

SDEN can be found here:
https://developer.arm.com/documentation/sden892601/latest/

Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
Change-Id: I4bb6dcf86c94125cbc574e0dc5119abe43e84731

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6a415bd130-Jan-2024 Tamas Ban <tamas.ban@arm.com>

feat(dice): add cert_id argument to dpe_derive_context()

This custom argument is meant to simplify to group
components into certificates. Components with
the same cert_id contribute to the same cert

feat(dice): add cert_id argument to dpe_derive_context()

This custom argument is meant to simplify to group
components into certificates. Components with
the same cert_id contribute to the same certificate
regardless of the load order or the structure of the
derivation tree. This argument aims to flatten the tree
structure and make it easy to include branches or
subtrees in the main derivation line.

Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Change-Id: I83c4abc399616063a5eb04792d603899f7513627

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467bdf2607-Jun-2023 Tamas Ban <tamas.ban@arm.com>

feat(tc): get the parent component provided DPE context_handle

Each client who wants to communicate with the DPE service
must own a valid context handle issued by the DPE service.
A context handle c

feat(tc): get the parent component provided DPE context_handle

Each client who wants to communicate with the DPE service
must own a valid context handle issued by the DPE service.
A context handle can be used for a single time then it will
be invalidated by the DPE service. In case of calls from
the same component, the next valid context handle is
returned in the response to a DPE command. When a component
finishes their job then the next component in the boot flow
inherits its first context handle from its parent.
How the inheritance is done can be client or
platform-dependent. It can be shared through shared
memory or be part of a DTB object passed to the next
bootloader stage.

Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Signed-off-by: David Vincze <david.vincze@arm.com>
Change-Id: Ic82f074f1c5b15953e78f9fa5404ed7f48674cbb

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03d388d812-Jun-2023 Tamas Ban <tamas.ban@arm.com>

feat(tc): share DPE context handle with child component

To be allowed to communicate with DPE service all
components must own a valid context handle. The first
valid context handle is inherited from

feat(tc): share DPE context handle with child component

To be allowed to communicate with DPE service all
components must own a valid context handle. The first
valid context handle is inherited from the parent
component via a DTB object.

Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Change-Id: Id357fab3586398b1933444e1d10d1ab6d8243ab9

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1f47a71312-Jun-2023 Tamas Ban <tamas.ban@arm.com>

feat(tc): add DPE context handle node to device tree

Child software components are inheriting their first valid
DPE context handle from their parent components (who loaded
and measured them). The co

feat(tc): add DPE context handle node to device tree

Child software components are inheriting their first valid
DPE context handle from their parent components (who loaded
and measured them). The context handle is shared through
the device tree object the following way:
- BL1 -> BL2 via TB_FW_CONFIG
- BL2 -> BL33 via NT_FW_CONFIG

Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Change-Id: I9bf7808fb13a310ad7ca1895674a0c7e6725e08b

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e7f1181f07-Jun-2023 Tamas Ban <tamas.ban@arm.com>

feat(tc): add DPE backend to the measured boot framework

The client platform relies on the DICE attestation
scheme. RSS provides the DICE Protection Environment
(DPE) service. TF-A measured boot fra

feat(tc): add DPE backend to the measured boot framework

The client platform relies on the DICE attestation
scheme. RSS provides the DICE Protection Environment
(DPE) service. TF-A measured boot framework supports
multiple backends. A given platform always enables
the corresponding backend which is required by the
attestation scheme.

Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Change-Id: Idc3360d0d7216e4859e99b5db3d377407e0aeee5

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2b53106a24-Jan-2024 Tamas Ban <tamas.ban@arm.com>

feat(auth): add explicit entries for key OIDs

Key-OIDs that authenticate SCP_BL2, BL32, BL33,
Trusted FW config and Non-trusted FW config images
have been explicitly entered.
Implementations of sign

feat(auth): add explicit entries for key OIDs

Key-OIDs that authenticate SCP_BL2, BL32, BL33,
Trusted FW config and Non-trusted FW config images
have been explicitly entered.
Implementations of signer-ID consume these entries.

Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Change-Id: Icfb4a4920792c475a92d190837fb24090a57ef89

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0ae9c63106-Jun-2023 Tamas Ban <tamas.ban@arm.com>

feat(dice): add DPE driver to measured boot

Implement a DPE specific backend within the
generic measured boot framework.

Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Change-Id: Ia3a0eac0ee6f7b4b337

feat(dice): add DPE driver to measured boot

Implement a DPE specific backend within the
generic measured boot framework.

Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Change-Id: Ia3a0eac0ee6f7b4b337a93d08286613e7c8186b4

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b03fe8c006-Jun-2023 Tamas Ban <tamas.ban@arm.com>

feat(dice): add client API for DICE Protection Environment

RSS provides the DICE Protection Environment
service (DPE). It partially implements the
DPE specification from TCG.

As a DPE profile, it s

feat(dice): add client API for DICE Protection Environment

RSS provides the DICE Protection Environment
service (DPE). It partially implements the
DPE specification from TCG.

As a DPE profile, it supports the
Open Profile for DICE specification.
https://pigweed.googlesource.com/open-dice/+/refs/heads/main/docs/specification.md

In order to communicate with the service, commands
must be CBOR encoded.
The API implementation:
- Expose a C API to the upper layer,
- Do the CBOR encoding, decoding of the DPE
commands,
- Rely on the PSA framework to communicate
with the RSS through an MHU.

Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Change-Id: I26a08f0c7cbffe07e725a7defbb6c60fd7735efe

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584052c706-Jun-2023 Tamas Ban <tamas.ban@arm.com>

feat(dice): add typedefs from the Open DICE repo

The DPE implementation in RSS is aligned with the
Open Profile for DICE specification:
https://pigweed.googlesource.com/open-dice/

Type definitions

feat(dice): add typedefs from the Open DICE repo

The DPE implementation in RSS is aligned with the
Open Profile for DICE specification:
https://pigweed.googlesource.com/open-dice/

Type definitions are needed to specify the input
values for the DPE service. Instead of mandating to
clone the entire open-dice repo, the following file
is copied from the repository:
https://pigweed.googlesource.com/open-dice/+/refs/heads/main/include/dice/dice.h
Git SHA of the source version: cf549422e39da872d64993be944099ac62ba22a9

This is external code, with Apache 2.0 license, therefore
the license.rst is updated accordingly and a copy of this
license is also added.

Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Signed-off-by: David Vincze <david.vincze@arm.com>
Change-Id: Ie84b8483034819d1143fe0ec812e66514ac7d4cb

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24844d8b05-Jun-2023 Tamas Ban <tamas.ban@arm.com>

refactor(tc): align image identifier string macros

Macros were renamed, align with new names.

Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Change-Id: Id7a556da34381618577fed4039d9ca957754cd7c

a8a09e3129-Jan-2024 Tamas Ban <tamas.ban@arm.com>

fix(measured-boot): add missing image identifier string

The case for SPD=spmd was not handled.

Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Change-Id: I6c6f268aeb0db15d41662bea81f4a9255e1fabe9

d950602823-Feb-2024 Tamas Ban <tamas.ban@arm.com>

refactor(measured-boot): move metadata size macros to a common header

The max size macros of metadata elements are shared across
multiple measured boot backends: rss-measured-boot, dpe.

Increase th

refactor(measured-boot): move metadata size macros to a common header

The max size macros of metadata elements are shared across
multiple measured boot backends: rss-measured-boot, dpe.

Increase the SW_TYPE_MAX_SIZE to be able to accomodate
all macro.

Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Change-Id: Ic9004a36ef1df96c70a4f7adf7bb86dc27dd307c

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a77a744429-Jan-2024 Tamas Ban <tamas.ban@arm.com>

refactor(measured-boot): move image identifier strings to a common header

The image identifier strings are used across different measured boot
backends. Move them to a common location to avoid the r

refactor(measured-boot): move image identifier strings to a common header

The image identifier strings are used across different measured boot
backends. Move them to a common location to avoid the redefiniton
of these per backend and to avoid code duplication.

Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Change-Id: I58897b9a19396be932ca5d230ee00858c09ef03f

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9c36b90010-Jan-2024 Stuart Yoder <stuart.yoder@arm.com>

feat(drtm): update DRTM version to 1.0

Update DRTM version from 0.1 to 1.0.

Signed-off-by: Stuart Yoder <stuart.yoder@arm.com>
Change-Id: Ic37fd29e4c2de1a29c2808870addba049d488773

b94d590910-Jan-2024 Stuart Yoder <stuart.yoder@arm.com>

feat(drtm): update references to DRTM beta0

Update all references to DRTM beta0 to be 1.0 instead.

Signed-off-by: Stuart Yoder <stuart.yoder@arm.com>
Change-Id: Ieda70f26f3be42f4705e9b267706674c94f

feat(drtm): update references to DRTM beta0

Update all references to DRTM beta0 to be 1.0 instead.

Signed-off-by: Stuart Yoder <stuart.yoder@arm.com>
Change-Id: Ieda70f26f3be42f4705e9b267706674c94f120f2

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c86cfa3510-Jan-2024 Stuart Yoder <stuart.yoder@arm.com>

feat(drtm): for TPM features fw hash algorithm should be 16-bits

The DRTM 1.0 spec changed the Firmware hash algorithm field
size from 32-bits to 16-bits.

Signed-off-by: Stuart Yoder <stuart.yoder@

feat(drtm): for TPM features fw hash algorithm should be 16-bits

The DRTM 1.0 spec changed the Firmware hash algorithm field
size from 32-bits to 16-bits.

Signed-off-by: Stuart Yoder <stuart.yoder@arm.com>
Change-Id: I713e32e01b1983bf21d97c93bbb28c77dc94a541

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e8eb441805-Mar-2024 Madhukar Pappireddy <madhukar.pappireddy@arm.com>

Merge "fix(el3-spmc): add datastore linker script markers" into integration


/rk3399_ARM-atf/Makefile
/rk3399_ARM-atf/changelog.yaml
/rk3399_ARM-atf/docs/about/maintainers.rst
/rk3399_ARM-atf/docs/design/cpu-specific-build-macros.rst
/rk3399_ARM-atf/docs/design/trusted-board-boot.rst
/rk3399_ARM-atf/docs/plat/arm/arm-build-options.rst
/rk3399_ARM-atf/docs/plat/imx8ulp.rst
/rk3399_ARM-atf/docs/plat/index.rst
/rk3399_ARM-atf/drivers/arm/smmu/smmu_v3.c
/rk3399_ARM-atf/drivers/scmi-msg/common.h
/rk3399_ARM-atf/drivers/scmi-msg/entry.c
/rk3399_ARM-atf/drivers/scmi-msg/sensor.c
/rk3399_ARM-atf/drivers/scmi-msg/sensor.h
plat/arm/common/arm_tzc_dram.ld.S
/rk3399_ARM-atf/lib/cpus/aarch64/cortex_a715.S
/rk3399_ARM-atf/lib/cpus/aarch64/cortex_x3.S
/rk3399_ARM-atf/lib/cpus/cpu-ops.mk
/rk3399_ARM-atf/plat/allwinner/common/sunxi_bl31_setup.c
/rk3399_ARM-atf/plat/arm/board/arm_fpga/platform.mk
/rk3399_ARM-atf/plat/arm/board/fvp/fvp_bl31_setup.c
/rk3399_ARM-atf/plat/arm/board/fvp/fvp_el3_spmc.c
/rk3399_ARM-atf/plat/arm/board/fvp/include/platform_def.h
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/common/arch/aarch64/nrd_helper.S
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/common/include/nrd_base_platform_def.h
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/common/include/nrd_dmc620_tzc_regions.h
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/common/include/nrd_plat.h
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/common/include/nrd_ras.h
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/common/include/nrd_sdei.h
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/common/include/nrd_soc_css_def.h
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/common/include/nrd_soc_css_def_v2.h
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/common/include/nrd_soc_platform_def.h
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/common/include/nrd_soc_platform_def_v2.h
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/common/include/nrd_variant.h
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/common/include/plat_macros.S
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/common/nrd-common.mk
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/common/nrd_bl31_setup.c
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/common/nrd_image_load.c
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/common/nrd_interconnect.c
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/common/nrd_plat.c
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/common/nrd_plat_v2.c
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/common/nrd_topology.c
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/common/ras/nrd_ras_common.c
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/common/ras/nrd_ras_cpu.c
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/common/ras/nrd_ras_sram.c
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/platform/rdn1edge/fdts/rdn1edge_fw_config.dts
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/platform/rdn1edge/fdts/rdn1edge_nt_fw_config.dts
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/platform/rdn1edge/fdts/rdn1edge_tb_fw_config.dts
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/platform/rdn1edge/include/platform_def.h
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/platform/rdn1edge/platform.mk
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/platform/rdn1edge/rdn1edge_err.c
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/platform/rdn1edge/rdn1edge_plat.c
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/platform/rdn1edge/rdn1edge_security.c
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/platform/rdn1edge/rdn1edge_topology.c
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/platform/rdn1edge/rdn1edge_trusted_boot.c
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/platform/rdn2/fdts/rdn2_fw_config.dts
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/platform/rdn2/fdts/rdn2_nt_fw_config.dts
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/platform/rdn2/fdts/rdn2_stmm_sel0_manifest.dts
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/platform/rdn2/fdts/rdn2_tb_fw_config.dts
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/platform/rdn2/include/platform_def.h
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/platform/rdn2/include/rdn2_ras.h
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/platform/rdn2/platform.mk
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/platform/rdn2/rdn2_err.c
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/platform/rdn2/rdn2_plat.c
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/platform/rdn2/rdn2_ras.c
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/platform/rdn2/rdn2_security.c
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/platform/rdn2/rdn2_topology.c
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/platform/rdn2/rdn2_trusted_boot.c
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/platform/rdv1/fdts/rdv1_fw_config.dts
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/platform/rdv1/fdts/rdv1_nt_fw_config.dts
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/platform/rdv1/fdts/rdv1_tb_fw_config.dts
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/platform/rdv1/include/platform_def.h
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/platform/rdv1/platform.mk
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/platform/rdv1/rdv1_err.c
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/platform/rdv1/rdv1_plat.c
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/platform/rdv1/rdv1_security.c
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/platform/rdv1/rdv1_topology.c
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/platform/rdv1/rdv1_trusted_boot.c
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/platform/rdv1mc/fdts/rdv1mc_fw_config.dts
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/platform/rdv1mc/fdts/rdv1mc_nt_fw_config.dts
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/platform/rdv1mc/fdts/rdv1mc_tb_fw_config.dts
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/platform/rdv1mc/include/platform_def.h
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/platform/rdv1mc/platform.mk
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/platform/rdv1mc/rdv1mc_err.c
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/platform/rdv1mc/rdv1mc_plat.c
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/platform/rdv1mc/rdv1mc_security.c
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/platform/rdv1mc/rdv1mc_topology.c
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/platform/rdv1mc/rdv1mc_trusted_boot.c
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/platform/sgi575/fdts/sgi575_fw_config.dts
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/platform/sgi575/fdts/sgi575_nt_fw_config.dts
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/platform/sgi575/fdts/sgi575_tb_fw_config.dts
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/platform/sgi575/include/platform_def.h
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/platform/sgi575/platform.mk
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/platform/sgi575/sgi575_err.c
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/platform/sgi575/sgi575_plat.c
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/platform/sgi575/sgi575_security.c
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/platform/sgi575/sgi575_topology.c
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/platform/sgi575/sgi575_trusted_boot.c
/rk3399_ARM-atf/plat/arm/board/tc/tc_bl31_setup.c
/rk3399_ARM-atf/plat/arm/common/arm_bl31_setup.c
/rk3399_ARM-atf/plat/arm/common/plat_arm_sip_svc.c
/rk3399_ARM-atf/plat/common/aarch64/plat_common.c
/rk3399_ARM-atf/plat/imx/common/imx8_helpers.S
/rk3399_ARM-atf/plat/imx/common/imx_bl31_common.c
/rk3399_ARM-atf/plat/imx/common/imx_sip_handler.c
/rk3399_ARM-atf/plat/imx/common/imx_sip_svc.c
/rk3399_ARM-atf/plat/imx/common/include/imx_plat_common.h
/rk3399_ARM-atf/plat/imx/common/include/imx_sip_svc.h
/rk3399_ARM-atf/plat/imx/imx8ulp/apd_context.c
/rk3399_ARM-atf/plat/imx/imx8ulp/dram.c
/rk3399_ARM-atf/plat/imx/imx8ulp/imx8ulp_bl31_setup.c
/rk3399_ARM-atf/plat/imx/imx8ulp/imx8ulp_caam.c
/rk3399_ARM-atf/plat/imx/imx8ulp/imx8ulp_psci.c
/rk3399_ARM-atf/plat/imx/imx8ulp/include/dram.h
/rk3399_ARM-atf/plat/imx/imx8ulp/include/imx8ulp_caam.h
/rk3399_ARM-atf/plat/imx/imx8ulp/include/platform_def.h
/rk3399_ARM-atf/plat/imx/imx8ulp/include/scmi.h
/rk3399_ARM-atf/plat/imx/imx8ulp/include/scmi_sensor.h
/rk3399_ARM-atf/plat/imx/imx8ulp/include/xrdc.h
/rk3399_ARM-atf/plat/imx/imx8ulp/platform.mk
/rk3399_ARM-atf/plat/imx/imx8ulp/scmi/scmi.c
/rk3399_ARM-atf/plat/imx/imx8ulp/scmi/scmi_pd.c
/rk3399_ARM-atf/plat/imx/imx8ulp/scmi/scmi_sensor.c
/rk3399_ARM-atf/plat/imx/imx8ulp/upower/upmu.h
/rk3399_ARM-atf/plat/imx/imx8ulp/upower/upower_api.c
/rk3399_ARM-atf/plat/imx/imx8ulp/upower/upower_api.h
/rk3399_ARM-atf/plat/imx/imx8ulp/upower/upower_defs.h
/rk3399_ARM-atf/plat/imx/imx8ulp/upower/upower_hal.c
/rk3399_ARM-atf/plat/imx/imx8ulp/upower/upower_soc_defs.h
/rk3399_ARM-atf/plat/imx/imx8ulp/xrdc/xrdc_config.h
/rk3399_ARM-atf/plat/imx/imx8ulp/xrdc/xrdc_core.c
/rk3399_ARM-atf/plat/qemu/common/qemu_bl31_setup.c
/rk3399_ARM-atf/plat/rockchip/rk3399/drivers/pmu/pmu_fw.S
/rk3399_ARM-atf/plat/rockchip/rk3399/platform.mk
/rk3399_ARM-atf/services/std_svc/errata_abi/errata_abi_main.c
8d08a1df02-Feb-2024 Sughosh Ganu <sughosh.ganu@linaro.org>

style(fwu): change the metadata fields to align with specification

Change the names of some FWU metadata structure members to have them
align with the wording used in the corresponding specification

style(fwu): change the metadata fields to align with specification

Change the names of some FWU metadata structure members to have them
align with the wording used in the corresponding specification. Use
the GUID type instead of UUID as the fields described in the
specification are GUIDs. Make corresponding changes to the code that
accesses these fields. No functional changes are introduced by the
patch.

Change-Id: Id3544ed1633811b0eeee2bf99477f9b7e6667044
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>

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37e81a6002-Feb-2024 Sughosh Ganu <sughosh.ganu@linaro.org>

style(partition): use GUID values for GPT partition fields

The GPT partition uses GUID values for identification of partition
types and partitions. Change the relevant functions to use GUID values
i

style(partition): use GUID values for GPT partition fields

The GPT partition uses GUID values for identification of partition
types and partitions. Change the relevant functions to use GUID values
instead of UUID's.

Change-Id: I30df66a8a02fb502e04b0285f34131b65977988e
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>

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26aab79507-Feb-2024 Sughosh Ganu <sughosh.ganu@linaro.org>

feat(fwu): add a function to obtain an alternate FWU bank to boot

Add a function fwu_get_alternate_boot_bank() to return a valid bank to
boot from. This function can be called by a platform to get a

feat(fwu): add a function to obtain an alternate FWU bank to boot

Add a function fwu_get_alternate_boot_bank() to return a valid bank to
boot from. This function can be called by a platform to get an
alternate bank to try to boot the platform in the unlikely scenario of
the active bank being in an invalid state, or if the number of times
the platform boots in trial state exceeds a pre-set count.

Change-Id: I4bcd88e68e334c452882255bf028e01b090369d1
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>

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56724d0901-Feb-2024 Sughosh Ganu <sughosh.ganu@linaro.org>

feat(fwu): modify the check for getting the FWU bank's state

The version 2 of the FWU metadata structure has a field bank_state in
the top level of the structure which can be used to check if a give

feat(fwu): modify the check for getting the FWU bank's state

The version 2 of the FWU metadata structure has a field bank_state in
the top level of the structure which can be used to check if a given
bank is in the either of Trial State, Accepted State, or in an Invalid
State. This is different from the binary states of Valid/Accepted
States that the bank could be in, as defined in the earlier version of
the specification.

Replace the fwu_is_trial_run_state() API with
fwu_get_active_bank_state() to get the state the current active bank
is in. The value returned by this API is then used by the caller to
take appropriate action.

Change-Id: I764f486840a3713bfe5f8e03d0634bfe09b23590
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>

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