feat(rmmd): el3-rmm ide key management interface

Patch introduces the EL3-RMM SMC Interface for Root Port
Key management as per RFC discussed here:
https://github.com/TF-RMM/tf-rmm/wiki/RFC:-EL3-RMM

feat(rmmd): el3-rmm ide key management interface

Patch introduces the EL3-RMM SMC Interface for Root Port
Key management as per RFC discussed here:
https://github.com/TF-RMM/tf-rmm/wiki/RFC:-EL3-RMM-IDE-KM-Interface

Three IDE Key management smc calls have been added:
- RMM_IDE_KEY_PROG()
- RMM_IDE_KEY_SET_GO()
- RMM_IDE_KEY_SET_STOP()
- RMM_IDE_KM_PULL_RESPONSE()

Due to the absence of root port support in FVP, we are
currently adding placeholders in this patch for the platform
APIs to return success irrespective of the arguments being passed
by the caller(Realms). The SMCs are guarded by
`RMMD_ENABLE_IDE_KEY_PROG` build flag and is disabled by default.
We expect that once the SMCs are stabilized, this build flag will
not be required anymore.

Change-Id: I9411eb7787dac2a207bd14710d251503bd9626ce
Signed-off-by: Sona Mathew <sonarebecca.mathew@arm.com>

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refactor(measured-boot): standardize function names

Rename existing printer functions to follow the `event_log_{func}`
convention used in other parts of the logging library. This is the first
in a s

refactor(measured-boot): standardize function names

Rename existing printer functions to follow the `event_log_{func}`
convention used in other parts of the logging library. This is the first
in a series of changes to prepare the event log library to be a
standalone component.

Change-Id: I11c924587c0f67af383f7c68d64d78bbe931cfcd
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>

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Merge changes from topic "lto-by-default" into integration

* changes:
fix(libc): make sure __init functions are garbage collected
fix(platforms): remove platform_core_pos_helper()

feat(arm): support AArch32 booting with handoff

Configre SP-MIN to receive information via the firmare handoff
framework. In BL1 and BL2, select the 32-bit variants of the SRAM layout
and entry poin

feat(arm): support AArch32 booting with handoff

Configre SP-MIN to receive information via the firmare handoff
framework. In BL1 and BL2, select the 32-bit variants of the SRAM layout
and entry point info to enable booting in aarch32 mode. In SP-MIN
process expected data directly from the transfer list in secure memory.

Change-Id: If0417cdd4c47b772332eb6fd4b71ef0ea474f0fa
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>

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fix(xlat): remove xlat_mpu

The only platform to use this is fvp_r. As this platform is now gone, so
is the need for this library. Support for it never went out of
"experimental" so it does not appea

fix(xlat): remove xlat_mpu

The only platform to use this is fvp_r. As this platform is now gone, so
is the need for this library. Support for it never went out of
"experimental" so it does not appear to be finished.

Change-Id: I76499b92ca4368651330f17dc80803991158cc36
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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fix(libc): make sure __init functions are garbage collected

RECLAIM_INIT_CODE is useful to remove code that is only necessary during
boot. However, these functions are generally called once and as s

fix(libc): make sure __init functions are garbage collected

RECLAIM_INIT_CODE is useful to remove code that is only necessary during
boot. However, these functions are generally called once and as such
prime candidates for inlining. When building with LTO, the compiler is
pretty good at inlining every single one, making this option pointless.

So tell the compiler to not inline these functions. This ensures they
are kept separate and they can be garbage collected later. This is
expected to cost a little bit of speed due to the extra branching.

Change-Id: Ie83a9ec8db03cb42139742fc6d728d12ce8549d3
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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fix(platforms): remove platform_core_pos_helper()

Its last user was removed some time ago so it is no longer necessary.

Change-Id: I28264367abd2902ed0d3f207f686538a82a44eba
Signed-off-by: Boyan Kar

fix(platforms): remove platform_core_pos_helper()

Its last user was removed some time ago so it is no longer necessary.

Change-Id: I28264367abd2902ed0d3f207f686538a82a44eba
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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fix(cpus): fix clang compilation issue

A potential problem with clang version < 17 can cause resolving nested
'cfi_startproc' to fail compilation.

So add a variant of check_errara/reset_macros that

fix(cpus): fix clang compilation issue

A potential problem with clang version < 17 can cause resolving nested
'cfi_startproc' to fail compilation.

So add a variant of check_errara/reset_macros that is compatible with
clang version < 17 to ignore `cfi_startproc` and `cfi_endproc`.

This wouldn't cause any performance issue and will not affect any
functional behaviour.

Change-Id: I46147af2dd0accd5be14ddb26dea03bb2f87cba8
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>

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Merge "fix(plat): remove fvp_r" into integration

fix(smccc): properly set RAS feature bit

The SCR_EL3.TERR bit controls trapping accesses to the RAS CPU system
registers, like ERRIDR_EL1. Those are part of RAS CPU extension, and
exist and can be a

fix(smccc): properly set RAS feature bit

The SCR_EL3.TERR bit controls trapping accesses to the RAS CPU system
registers, like ERRIDR_EL1. Those are part of RAS CPU extension, and
exist and can be accessed independently of the rest of the system's RAS
implementation status, BL31's RAS handling capabilities, or the way RAS
errors are routed by the firmware (FFH vs. KFH handling).
Tie the SCR_EL3.TERR bit to the right build symbol, since TF-A's
capability to handle RAS errors has nothing to do with lower EL's
accesses to those CPU system registers.

Change-Id: I4f06f915c0815c80058ec365139a8d818ba85721
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

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feat(smccc): add FEAT_TWED to ARCH_FEATURE_AVAILABILITY

FEAT_TWED (Delayed Trapping of WFE) is an ARMv8.6 feature that is
advertised in the ID_AA64MMFR1_EL1 ID register and controlled by a bit
in th

feat(smccc): add FEAT_TWED to ARCH_FEATURE_AVAILABILITY

FEAT_TWED (Delayed Trapping of WFE) is an ARMv8.6 feature that is
advertised in the ID_AA64MMFR1_EL1 ID register and controlled by a bit
in the SCR_EL3 register.

On cores implementing that feature we should announce it in the
ARCH_FEATURE_AVAILABILITY SMCCC call, so that users of that interface
can correctly assess the availability of the delayed trap.

Change-Id: I2b185f7eb9d58e45472983204db0305511372477
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

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feat(cpufeat): add support for PMUv3p9

Armv8.9 introduced the FEAT_PMUV3P9 extension, which allows finer
grained control over EL0 usage of PMU registers. This is controlled by
the new PMUACR_EL1 sys

feat(cpufeat): add support for PMUv3p9

Armv8.9 introduced the FEAT_PMUV3P9 extension, which allows finer
grained control over EL0 usage of PMU registers. This is controlled by
the new PMUACR_EL1 system register, access to which is guarded by the
MDCR_EL3.EnPM2 bit. We should set this bit to avoid a trap into EL3 when
lower ELs access this register.

Add the required bits and pieces to make this feature usable:
- Add the CPUID and MDCR_EL3 bit definitions associated with
FEAT_PMUV3P9.
- Extend the existing PMU feature check to allow v9 now as well. This
is fine since we don't context switch PMU registers at all, so we
don't need to do much except to flip the MDCR bit:
- Set the EnPM2 bit in pmuv3_enable, so the feature is usuable in
non-secure world (and there only).
- Handle the MDCR bit for the ARCH_FEATURE_AVAILABILITY feature.

Please note that MDCR_EL3.EnPM2 guards other system registers as well,
for other PMU related new architecture features.

Change-Id: I288ca15f5c9efd336c64477d1c6fe9543613e238
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

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fix(plat): remove fvp_r

The platform has not been maintained for some years and is generally
broken. Remove it to avoid confusion.

Change-Id: I93d832d51e114689ec79969af5d96071a03f4a88
Signed-off-by

fix(plat): remove fvp_r

The platform has not been maintained for some years and is generally
broken. Remove it to avoid confusion.

Change-Id: I93d832d51e114689ec79969af5d96071a03f4a88
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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Merge changes from topic "mbedtls-3.6.3" into integration

* changes:
feat(mbedtls): update mbedtls to version 3.6.3
docs(prerequisites): update mbedtls to v3.6.3

Merge "refactor(st-pmic): use LOG_LEVEL for regulator debug output" into integration

Merge "fix(spmd): check pwr mgmt status for SPMC framework response" into integration

perf(libc): use builtin implementations where possible

When conditions are right, eg a small memcpy of a known size and
alignment, the compiler may know of a sequence that is optimal for the
given c

perf(libc): use builtin implementations where possible

When conditions are right, eg a small memcpy of a known size and
alignment, the compiler may know of a sequence that is optimal for the
given constraints and inline it. If the compiler doesn't find one, it
will emit a call to the generic function (in the libc) which will
implement this in the most generic and unconstrained manner. That
generic function is rarely the most optimal when constraints are known.

So give the compiler a chance to do this. Replace calls to libc
functions that have builtins to the builtin and keep the generic
implementation if it decides to emit a call anyway.

And example of this in action is usage of FEAT_MOPS. When the compiler
is aware of the feature (-march=armv8.8-a) then it will emit the 3 MOPS
instructions instead of calls to our memcpy() and memset()
implementations.

Change-Id: I9860cfada1d941b613ebd4da068e9992c387952e
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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feat(mbedtls): update mbedtls to version 3.6.3

Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
Change-Id: Icad24203a36cb7e5b0a6f2275cb3b5346dcd148a

Merge changes from topic "xlnx_fix_gen_uniq_var" into integration

* changes:
fix(psci): avoid altering function parameters
fix(services): avoid altering function parameters
fix(common): ignore

Merge changes from topic "xlnx_fix_gen_uniq_var" into integration

* changes:
fix(psci): avoid altering function parameters
fix(services): avoid altering function parameters
fix(common): ignore the unused function return value
fix(psci): modify variable conflicting with external function
fix(delay-timer): create unique variable name

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feat(tc): port BL2-BL31 interface to firmware handoff framework

Adding support for this framework at the handoff boundary between
firmware stage BL2 and BL31 on TC.

Signed-off-by: Jayanth Dodderi C

feat(tc): port BL2-BL31 interface to firmware handoff framework

Adding support for this framework at the handoff boundary between
firmware stage BL2 and BL31 on TC.

Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>
Change-Id: I8e29b859e57a732e53f7532a5869ed4c8665b161

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feat(st-pmic): add defines for NVM shadow registers

Change-Id: I28e194fbec7c7879bbbf46c602dc4587d74e31e9
Signed-off-by: Boerge Struempfel <boerge.struempfel@gmail.com>

refactor(st-pmic): use LOG_LEVEL for regulator debug output

The stpmic2_dump_regulators() function now uses LOG_LEVEL instead of
EVENT_LOG_LEVEL to align with general logging conventions.

Additiona

refactor(st-pmic): use LOG_LEVEL for regulator debug output

The stpmic2_dump_regulators() function now uses LOG_LEVEL instead of
EVENT_LOG_LEVEL to align with general logging conventions.

Additionally, the guard has been moved inside the function, removing
unnecessary preprocessor checks where the function is used and thereby
improving consistency.

Change-Id: I087de124e6795a599b4f91a7613c6dfa3f76bb7a
Signed-off-by: Boerge Struempfel <boerge.struempfel@gmail.com>

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Merge "fix(cpus): remove errata setting PF_MODE to conservative" into integration

refactor(arm): simplify early platform setup function in BL31

Refactor `arm_bl31_early_platform_setup` to accept generic u_register_t
values, enabling support for firmware handoff boot arguments in

refactor(arm): simplify early platform setup function in BL31

Refactor `arm_bl31_early_platform_setup` to accept generic u_register_t
values, enabling support for firmware handoff boot arguments in
common code. This simplifies the interface for early platform setup.

Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>
Change-Id: Iff20300d2372e1a9825827ddccbd1b3bc6751e40

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refactor(arm): simplify early platform setup function in BL2

Refactor `arm_bl2_early_platform_setup` to accept generic u_register_t
values, enabling support for firmware handoff boot arguments in
co

refactor(arm): simplify early platform setup function in BL2

Refactor `arm_bl2_early_platform_setup` to accept generic u_register_t
values, enabling support for firmware handoff boot arguments in
common code. This simplifies the interface for early platform setup.

Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>
Change-Id: Ie0dbe4d32bbef22bd185fdafe50091a2ea5f550f

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