docs: add Measured Boot design

Added design document for Measured Boot implementation in
TF-A.

Change-Id: I25b57ec555b289eb6bbf0a6aae014d7bf6d152fd
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe

docs: add Measured Boot design

Added design document for Measured Boot implementation in
TF-A.

Change-Id: I25b57ec555b289eb6bbf0a6aae014d7bf6d152fd
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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docs: add guidelines for abandoning patches

The code review guidelines have been updated to explain when
patches that do not receive a response to the review comments
will be abandoned.

Change-Id:

docs: add guidelines for abandoning patches

The code review guidelines have been updated to explain when
patches that do not receive a response to the review comments
will be abandoned.

Change-Id: I60539e16ca41245cf1b352f24557be1b3c67c367
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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docs(maintainers): add maintainers for i.MX9 SoCs

Add maintainers for NXP i.MX9 SoC family.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: I6dd694af56da9f4d241fda28b781254586b5f462

docs(imx9): add imx93 platform

Add i.MX9 platform introduction.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: Ic07ca394cff6a9e3e21b7a03f9c9080d3c1ef91a

Merge changes from topic "gr/cpu_rename" into integration

* changes:
chore: rename hayes to a520
chore: rename hunter to a720
chore: rename hunter_elp to cortex-x4

chore: rename hayes to a520

Rename Cortex-hayes to Cortes-A520

Change-Id: Ic574b55b1aaf11b5bf7b583e244245e7b54bdb22
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>

chore: rename hunter to a720

Rename cortex_hunter to cortex_a720

Change-Id: Id4e0e2cd47051c2e92b3f16373ea06ef4df1d75f
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>

refactor(pmu): convert FEAT_MTPMU to C and move to persistent register init

The FEAT_MTPMU feature disable runs very early after reset. This means,
it needs to be written in assembly, since the C ru

refactor(pmu): convert FEAT_MTPMU to C and move to persistent register init

The FEAT_MTPMU feature disable runs very early after reset. This means,
it needs to be written in assembly, since the C runtime has not been
initialised yet.

However, there is no need for it to be initialised so soon. The PMU
state is only relevant after TF-A has relinquished control. The code
to do this is also very verbose and difficult to read. Delaying the
initialisation allows for it to happen with the rest of the PMU. Align
with FEAT_STATE in the process.

BREAKING CHANGE: This patch explicitly breaks the EL2 entry path. It is
currently unsupported.

Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
Change-Id: I2aa659d026fbdb75152469f6d19812ece3488c6f

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Merge "docs: remove deprecated tc0 from list of supported FVPs" into integration

docs: move common build option from Arm-specific to common file

Moved common build options from Arm-specific file to common build
file.

Change-Id: If74b6223972ae3a6c11d9f9d2fbd8d2ee008b6e5
Signed-o

docs: move common build option from Arm-specific to common file

Moved common build options from Arm-specific file to common build
file.

Change-Id: If74b6223972ae3a6c11d9f9d2fbd8d2ee008b6e5
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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Merge "refactor(build): merge march32/64 directives" into integration

Merge "docs: move the Juno-specific build option to Arm build option file" into integration

Merge "feat(fvp): allow configurable FVP Trusted SRAM size" into integration

docs: remove deprecated tc0 from list of supported FVPs

TC0 is now a deprecated platform so remove it from the list
of supported FVPs as well as throwing an error if it is attempted
to be built.

Si

docs: remove deprecated tc0 from list of supported FVPs

TC0 is now a deprecated platform so remove it from the list
of supported FVPs as well as throwing an error if it is attempted
to be built.

Signed-off-by: Daniel Boulby <daniel.boulby@arm.com>
Change-Id: Id013fcecbe20700611463ef9eab8cb3ae09071cc

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refactor(build): merge march32/64 directives

Both march32-directive and march64-directive eventually generate the
same march option that will passed to compiler.

Merge this two separate directives

refactor(build): merge march32/64 directives

Both march32-directive and march64-directive eventually generate the
same march option that will passed to compiler.

Merge this two separate directives to a common one as march-directive.

Change-Id: I220d2b782eb3b54e13ffd5b6a581d0e6da68756a
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>

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docs: move the Juno-specific build option to Arm build option file

Moved the Juno-specific build option from the common build option
file to the Arm build option file.

Change-Id: I0f53203f0cfca4a3b

docs: move the Juno-specific build option to Arm build option file

Moved the Juno-specific build option from the common build option
file to the Arm build option file.

Change-Id: I0f53203f0cfca4a3baadab2cee4339c9694cfe8b
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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feat(fvp): allow configurable FVP Trusted SRAM size

In some build configurations TF-A can exceed the existing 256KB SRAM,
triggering a build failure. More recent versions of the base FVP allow
you t

feat(fvp): allow configurable FVP Trusted SRAM size

In some build configurations TF-A can exceed the existing 256KB SRAM,
triggering a build failure. More recent versions of the base FVP allow
you to configure a larger Trusted SRAM of 512KB.

This change introduces the `FVP_TRUSTED_SRAM_SIZE` build option, which
allows you to explicitly specify how much of the Trusted SRAM to
utilise, e.g.:

FVP_TRUSTED_SRAM_SIZE=384

This allows previously-failing configurations to build successfully by
utilising more than the originally-allocated 256KB of the Trusted SRAM
while maintaining compatibility with older configurations/models that
only require/have 256KB.

Change-Id: I8344d3718564cd2bd53f1e6860e2fe341ae240b0
Signed-off-by: Chris Kay <chris.kay@arm.com>

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docs(msm8916): document new build options

Update the MSM8916 platform documentation with the new build options
introduced in the previous changes:

- AArch32 (BL32/SP_MIN)
- UART selection

Whil

docs(msm8916): document new build options

Update the MSM8916 platform documentation with the new build options
introduced in the previous changes:

- AArch32 (BL32/SP_MIN)
- UART selection

While at it, also document the build options that allow changing the
memory addresses (PRELOADED_BL33_BASE, BL31_BASE, BL32_BASE).

Change-Id: I2370c8264982317693f69fda0b03a255f12bafe2
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>

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Merge "docs: update PSCI reference" into integration

Merge "fix(cpus): reduce generic_errata_report()'s size" into integration

Merge changes from topic "bk/errata_refactor" into integration

* changes:
feat(cpus): add more errata framework helpers
docs: document the errata framework

fix(cpus): reduce generic_errata_report()'s size

For a pretty implementation and straightforward code, the CVE/erratum
dispatching of the errata status reporting was done with a macro,
closely follo

fix(cpus): reduce generic_errata_report()'s size

For a pretty implementation and straightforward code, the CVE/erratum
dispatching of the errata status reporting was done with a macro,
closely following the old code. Unfortunately, this produces a function
that was over a kilobyte in size, which unsurprisingly doesn't fit on
some platforms.

Convert the macro to a proper C function and call it once. Also hide the
errata ordering checking behind the FEATURE_DETECTION flag to further
save space. This functionality is not necessary for most builds.
Development and platform bringup builds, which should find this
functionality useful, are expected to have FEATURE_DETECTION enabled.

This reduces the function to under 600 bytes.

Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
Change-Id: Ibf5376a26cbae28d9dc010128452cb3c694a3f78

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docs: document the errata framework

Also add a recommended Procedure Call Standard (PCS) to use inside CPU
files and split everything into sections to make it easier to follow.

Signed-off-by: Boyan

docs: document the errata framework

Also add a recommended Procedure Call Standard (PCS) to use inside CPU
files and split everything into sections to make it easier to follow.

Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
Change-Id: Idd876d8e598b5dfe1193aa3e7375c52f6edf5671

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Merge "feat(ast2700): add Aspeed AST2700 platform support" into integration

docs: update PSCI reference

PSCI specification reference in the documentation is updated
to point to latest specification and duplicate PSCI references are
removed.

Change-Id: I35ee365f08c557f3017a

docs: update PSCI reference

PSCI specification reference in the documentation is updated
to point to latest specification and duplicate PSCI references are
removed.

Change-Id: I35ee365f08c557f3017af4d51f6d063a7501b27e
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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