fix(errata): workaround for Cortex-A510 erratum 2288014

Cortex-A510 erratum 2288014 is a Cat B erratum that applies to revisions
r0p0, r0p1, r0p2, r0p3 and r1p0, and is fixed in r1p1.

SDEN can be f

fix(errata): workaround for Cortex-A510 erratum 2288014

Cortex-A510 erratum 2288014 is a Cat B erratum that applies to revisions
r0p0, r0p1, r0p2, r0p3 and r1p0, and is fixed in r1p1.

SDEN can be found here:
https://developer.arm.com/documentation/SDEN2397239

Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: I875519ff55be90244cc3d3a7e9f7abad0fc3c2b8

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fix(errata): workaround for Cortex-A510 erratum 1922240

Cortex-A510 erratum 1922240 is a Cat B erratum that applies to revision
r0p0 and is fixed in r0p1.

Since no errata framework code existed for

fix(errata): workaround for Cortex-A510 erratum 1922240

Cortex-A510 erratum 1922240 is a Cat B erratum that applies to revision
r0p0 and is fixed in r0p1.

Since no errata framework code existed for A510 prior to this patch, it
has been added as well. Also some general cleanup changes in the CPU lib
makefile.

SDEN can be found here:
https://developer.arm.com/documentation/SDEN2397239

Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: I8c427ef255cb4b38ed3e5c2c7444fcef957277e4

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Merge changes from topic "x2_errata" into integration

* changes:
fix(errata): workaround for Cortex-A710 erratum 2136059
fix(errata): workaround for Cortex-A710 erratum 2267065
fix(errata): w

Merge changes from topic "x2_errata" into integration

* changes:
fix(errata): workaround for Cortex-A710 erratum 2136059
fix(errata): workaround for Cortex-A710 erratum 2267065
fix(errata): workaround for Cortex-X2 erratum 2216384
fix(errata): workaround for Cortex-X2 errata 2081180
fix(errata): workaround for Cortex-X2 errata 2017096

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Merge changes from topic "paulliu-imx8m-eventlog" into integration

* changes:
docs(imx8m): update for measured boot for imx8mm
feat(plat/imx/imx8m/imx8mm): add support for measured boot

Merge "docs(a3k): fix information about SATA GPT booting" into integration

Merge changes from topic "ls1046a" into integration

* changes:
docs(layerscape): add ls1046a soc and board support
feat(ls1046aqds): add board ls1046aqds support
feat(ls1046afrwy): add ls1046a

Merge changes from topic "ls1046a" into integration

* changes:
docs(layerscape): add ls1046a soc and board support
feat(ls1046aqds): add board ls1046aqds support
feat(ls1046afrwy): add ls1046afrwy board support
feat(ls1046ardb): add ls1046ardb board support
feat(ls1046a): add new SoC platform ls1046a
fix(nxp-tools): fix tool location path for byte_swape
fix(nxp-qspi): fix include path for QSPI driver
build(changelog): add new scopes for NXP layerscape platforms

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docs(a3k): add information about system-wide Crypto++ library

On Debian systems it is possible to use system-wide Crypto++ library.

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: Ib01d93767

docs(a3k): add information about system-wide Crypto++ library

On Debian systems it is possible to use system-wide Crypto++ library.

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: Ib01d9376776b8afcb1ca46c16076e28c3d2e581d

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docs(layerscape): add ls1046a soc and board support

Update document for nxp-layerscape to add ls1046a SoC and ls1046ardb,
ls1046afrwy board support.

Also update maintainer of ls1046a platforms.

Si

docs(layerscape): add ls1046a soc and board support

Update document for nxp-layerscape to add ls1046a SoC and ls1046ardb,
ls1046afrwy board support.

Also update maintainer of ls1046a platforms.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I522f978bc93aa8d1f1d60fa8efef392b7d854df7

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docs(a3k): fix information about SATA GPT booting

Armada 3720 BootROM searches for GPT partition with partition type GUID
6828311A-BA55-42A4-BCDE-A89BB5EDECAE and completely ignores GPT
partition na

docs(a3k): fix information about SATA GPT booting

Armada 3720 BootROM searches for GPT partition with partition type GUID
6828311A-BA55-42A4-BCDE-A89BB5EDECAE and completely ignores GPT
partition name. It does not check for "MARVELL BOOT PARTITION".

This fact is incorrectly documented even in official Marvell Armada 3700
Functional Specification.

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I35279f39de2d12148fc16f2730a9a074dc0b58eb

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build(corstone1000): rename diphda to corstone1000

diphda platform is now being renamed to corstone1000.
These changes are to replace all the instances and traces
of diphda corstone1000.

Change-Id

build(corstone1000): rename diphda to corstone1000

diphda platform is now being renamed to corstone1000.
These changes are to replace all the instances and traces
of diphda corstone1000.

Change-Id: I330f3a112d232b99b4721b6bf0236253b068dbba
Signed-off-by: Arpita S.K <Arpita.S.K@arm.com>
Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>

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docs(imx8m): update for measured boot for imx8mm

Signed-off-by: Ying-Chun Liu (PaulLiu) <paulliu@debian.org>
Change-Id: Ib313dc1ffac2fc5d04e0779c9f059236a71e65e7

docs(contribution-guidelines): updated the build configuration section

Added a couple of sub-sections (Coverity Scan and Test Configuration)
under "Add build configuration" to update the patch owner

docs(contribution-guidelines): updated the build configuration section

Added a couple of sub-sections (Coverity Scan and Test Configuration)
under "Add build configuration" to update the patch owners on the
sections they need to be aware of while introducing new source files.

Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>
Change-Id: I84adb182f9633863aac864df43578249c2269c1e

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build(sptool): handle uuid field in SP layout file

Extract the UUID from the SP layout JSON file if the optional 'uuid'
field exists otherwise fall back to the current method for extracting
the SP U

build(sptool): handle uuid field in SP layout file

Extract the UUID from the SP layout JSON file if the optional 'uuid'
field exists otherwise fall back to the current method for extracting
the SP UUID from the partition manifest file.

This change gives a way to decouple TF-A's dependency on the SP
manifest file's format which is tied to the SPMC.

Signed-off-by: Imre Kis <imre.kis@arm.com>
Change-Id: I13af066c1de58bfb9c3fd470ee137ea0275cd98c

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fix(errata): workaround for Cortex-A710 erratum 2136059

Cortex-A710 erratum 2136059 is a Cat B erratum that applies to
revisions r0p0, r1p0 and r2p0 of the CPU. It is fixed in r2p1.
The workaround i

fix(errata): workaround for Cortex-A710 erratum 2136059

Cortex-A710 erratum 2136059 is a Cat B erratum that applies to
revisions r0p0, r1p0 and r2p0 of the CPU. It is fixed in r2p1.
The workaround is to set CPUACTLR5_EL1[44] to 1 which will cause
the CPP instruction to invalidate the hardware prefetcher state
trained from any EL.

SDEN can be found here:
https://developer.arm.com/documentation/SDEN1775101/latest

Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
Change-Id: I43a86a365418fb663cc1b6ab1d365b4beddae0bc

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fix(errata): workaround for Cortex-A710 erratum 2267065

Cortex-A710 erratum 2267065 is a Cat B erratum that applies to
revisions r0p0, r1p0 and r2p0 of the CPU. It is fixed in r2p1.
The workaround

fix(errata): workaround for Cortex-A710 erratum 2267065

Cortex-A710 erratum 2267065 is a Cat B erratum that applies to
revisions r0p0, r1p0 and r2p0 of the CPU. It is fixed in r2p1.
The workaround is to set CPUACTLR_EL1[22] to 1'b1. Setting
CPUACTLR_EL1[22] will cause the CFP instruction to invalidate
all branch predictor resources regardless of context.

SDEN can be found here:
https://developer.arm.com/documentation/SDEN1775101/latest

Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
Change-Id: Ia9085aaf9b2b6a2b25d03ab36bd3774839fac9aa

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fix(errata): workaround for Cortex-X2 erratum 2216384

Cortex-X2 erratum 2216384 is a Cat B erratum that applies to
revisions r0p0, r1p0 and r2p0 of CPU. It is fixed in r2p1.
The workaround is to set

fix(errata): workaround for Cortex-X2 erratum 2216384

Cortex-X2 erratum 2216384 is a Cat B erratum that applies to
revisions r0p0, r1p0 and r2p0 of CPU. It is fixed in r2p1.
The workaround is to set CPUACTLR5_EL1[17] to 1'b1 followed by
applying an instruction patching sequence.

SDEN can be found here:
https://developer.arm.com/documentation/SDEN1775100/latest

Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
Change-Id: I3c216161678887c06a28c59644e784e0c7d37bab

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fix(errata): workaround for Cortex-X2 errata 2081180

Cortex-X2 erratum 2081180 is a Cat B erratum present in r0p0, r1p0
and r2p0 of the Cortex-X2 processor core.

Cortex-X2 SDEN: https://developer.a

fix(errata): workaround for Cortex-X2 errata 2081180

Cortex-X2 erratum 2081180 is a Cat B erratum present in r0p0, r1p0
and r2p0 of the Cortex-X2 processor core.

Cortex-X2 SDEN: https://developer.arm.com/documentation/SDEN1775100

Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
Change-Id: I64bed2fd5b7e12932d6de2ae668786e689885188

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fix(errata): workaround for Cortex-X2 errata 2017096

Cortex-X2 erratum 2017096 is a Cat B erratum that applies to
revisions r0p0, r1p0 & r2p0. The workaround is to set CPUECLTR_EL1[8]
to 1 which dis

fix(errata): workaround for Cortex-X2 errata 2017096

Cortex-X2 erratum 2017096 is a Cat B erratum that applies to
revisions r0p0, r1p0 & r2p0. The workaround is to set CPUECLTR_EL1[8]
to 1 which disables store issue prefetching.

SDEN can be found here:
https://developer.arm.com/documentation/SDEN1775100

Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
Change-Id: I3b740aedc95c2394f6b8d1186014d2b2f640ae05

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docs(msm8916): new port for Qualcomm Snapdragon 410

The Qualcomm Snapdragon 410 is Qualcomm's first 64-bit SoC, released
in 2014 with four ARM Cortex-A53 cores. There are differents variants
(MSM891

docs(msm8916): new port for Qualcomm Snapdragon 410

The Qualcomm Snapdragon 410 is Qualcomm's first 64-bit SoC, released
in 2014 with four ARM Cortex-A53 cores. There are differents variants
(MSM8916, APQ8016(E), ...) that are all very similar. A popular device
based on APQ8016E is the DragonBoard 410c single-board computer,
but the SoC is also used in various mid-range smartphones/tablets.

This commit adds documentation for a minimal, community-maintained port
of TF-A/BL31 for MSM8916. The actual platform port is added in the
following four separate small commits to simplify the review process.
The code is primarily based on the information from the public
Snapdragon 410E Technical Reference Manual [1], combined with a lot of
trial and error to actually make it work.

Note that this port is a pure community effort without any
commercial interests and is not related to Qualcomm in any way.
The main motivation for this port is to have a minimal, updatable
firmware since this old chip does not receive many updates anymore from
Qualcomm. It works quite well for many use cases so I am willing to
maintain it as a "code owner". I have also added Nikita Travkin as
second code owner to help with reviews.

The main limitation so far is the lack of memory protection for TF-A.
This is similar to the ports for the Raspberry Pi but in this case not
a lack of hardware support but rather a lack of documentation. However,
this does not limit the usefulness of the port when used as a minimal
PSCI implementation.

[1]: https://developer.qualcomm.com/download/sd410/snapdragon-410e-technical-reference-manual.pdf

Change-Id: I676adf86061638cfc2f3ae8615470d145e84f172
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>

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feat(fwu): add platform hook for getting the boot index

Add a platform hook for returning the boot index, i.e. the bank from
which the platform has booted the updatable firmware images. This
value w

feat(fwu): add platform hook for getting the boot index

Add a platform hook for returning the boot index, i.e. the bank from
which the platform has booted the updatable firmware images. This
value will be passed to the Update Agent.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Change-Id: Ic7bef21071c48cfc7b69c50e89df9ff758d95b00

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feat(fwu): pass a const metadata structure to platform routines

The metadata structure copy is passed to the platform routine to set
the image source to boot the platform from. This is done by readi

feat(fwu): pass a const metadata structure to platform routines

The metadata structure copy is passed to the platform routine to set
the image source to boot the platform from. This is done by reading
the metadata structure. Pass the metadata as a read-only copy to the
routine -- the routine only needs to consume the metadata values and
should not be able to update the metadata fields.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Change-Id: I399cad99ab89c71483e5a32a1de0e22df304f8b0

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Merge changes from topic "ck/changelog" into integration

* changes:
build(npm): mandate Node.js engine version
docs(changelog): fix broken version bumping
docs(changelog): fix version tag link

Merge changes from topic "ck/changelog" into integration

* changes:
build(npm): mandate Node.js engine version
docs(changelog): fix broken version bumping
docs(changelog): fix version tag links
refactor(hooks): replace cz-conventional-changelog with cz-commitlint
style(commitlint): reorder header/body max line length fields
chore(npm): update package versions/license

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Merge changes from topic "decouple-tb-mb" into integration

* changes:
refactor(renesas): disable CRYPTO_SUPPORT option
refactor(fvp): avoid Measured-Boot dependency on Trusted-Boot
refactor(me

Merge changes from topic "decouple-tb-mb" into integration

* changes:
refactor(renesas): disable CRYPTO_SUPPORT option
refactor(fvp): avoid Measured-Boot dependency on Trusted-Boot
refactor(measured-boot): avoid Measured-Boot dependency on Trusted-Boot
build: introduce CRYPTO_SUPPORT build option

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docs(changelog): fix version tag links

The Standard Version tool will not recognize a release header as a
release header without the minor version, and will overwrite them when
generating the next r

docs(changelog): fix version tag links

The Standard Version tool will not recognize a release header as a
release header without the minor version, and will overwrite them when
generating the next release changelog.

Additionally, it will not generate a link to the tag diff unless a tag
of the form `vX.Y.Z` exists. We ought to generate tags with this version
format in the future to ensure the diff links are generated.

Change-Id: I7864ab7a5822f83ddb7a7917208d2d029ae34729
Signed-off-by: Chris Kay <chris.kay@arm.com>

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refactor(hooks): replace cz-conventional-changelog with cz-commitlint

This change replaces cz-conventional-changelog with cz-commitlint, which
automatically configures Commitizen using our commitlin

refactor(hooks): replace cz-conventional-changelog with cz-commitlint

This change replaces cz-conventional-changelog with cz-commitlint, which
automatically configures Commitizen using our commitlint configuration
file. Currently, we use some manual Javascript magic to load our
Commitizen configuration into commitlint (the opposite of what's
introduced by this change), which can be removed.

With this change, we also move our commitlint configuration into a
new `changelog.yaml` file. This file holds the same data as `.cz.json`
previously did.

Change-Id: I14ff2308f1a0b2b293c2128b28ca2df578ce9c1c
Signed-off-by: Chris Kay <chris.kay@arm.com>

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