| 43f3a9c4 | 16-Feb-2023 |
Manish V Badarkhe <Manish.Badarkhe@arm.com> |
fix(docs): add few missed links for Security Advisories
Added few missed links for Security Advisories.
Change-Id: I9cab72b70a518273cbb1a291142f452198427127
Signed-off-by: Manish V Badarkhe <Manish
fix(docs): add few missed links for Security Advisories
Added few missed links for Security Advisories.
Change-Id: I9cab72b70a518273cbb1a291142f452198427127
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
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| 496d7081 | 15-Feb-2023 |
Amit Nagal <amit.nagal@amd.com> |
feat(zynqmp): add support for custom sip service
Add support for custom sip service.
Bare minimum implementation for custom_smc_handler is provided
by platform. Actual definition for custom_smc_hand
feat(zynqmp): add support for custom sip service
Add support for custom sip service.
Bare minimum implementation for custom_smc_handler is provided
by platform. Actual definition for custom_smc_handler will be provided
by custom pkg.
This feature is going to be used by external libraries. For example
for checking it's status.
The similar approach is also used by qti/{sc7180,sc7280} platforms
by providing a way to select QTISECLIB_PATH.
This code is providing a generic way how to wire any code
via custom $(CUSTOM_PKG_PATH)/custom_pkg.mk makefile with also an
option to wire custom SMC. SMC functionality depends on "package".
Change-Id: Icedffd582f76f89fc399b0bb2e05cdaee9b743a0
Signed-off-by: Amit Nagal <amit.nagal@amd.com>
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|
| 2537f072 | 15-Feb-2023 |
Akshay Belsare <akshay.belsare@amd.com> |
fix(zynqmp): with DEBUG=1 move bl31 to DDR range
Due to size constraints in OCM memory range keeping the bl31 with
DEBUG=1 overlaps with the memory range from other Firmware thus
affecting the bootf
fix(zynqmp): with DEBUG=1 move bl31 to DDR range
Due to size constraints in OCM memory range keeping the bl31 with
DEBUG=1 overlaps with the memory range from other Firmware thus
affecting the bootflow on target.
bl31 binary can not be placed in OCM memory range when built with
DEBUG=1.
With DEBUG=1, by default bl31 is moved to DDR memory range
0x1000-0x7FFFF.
The user can provide a custom DDR memory range during build time using
the build parameters ZYNQMP_ATF_MEM_BASE and ZYNQMP_ATF_MEM_SIZE.
Change-Id: I167d5eadbae7c6d3ec9b32f494b0b1a819bea5b0
Signed-off-by: Akshay Belsare <akshay.belsare@amd.com>
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|
| 5a77fd3b | 15-Feb-2023 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge "docs(qemu): delineate flash based boot method" into integration |
| 23af5965 | 14-Feb-2023 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge changes from topic "bk/python_dependencies" into integration
* changes:
build(docs): update Python dependencies
fix(docs): make required compiler version == rather than >=
fix(deps): add
Merge changes from topic "bk/python_dependencies" into integration
* changes:
build(docs): update Python dependencies
fix(docs): make required compiler version == rather than >=
fix(deps): add missing aeabi_memset.S
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|
| 9d1a325b | 14-Feb-2023 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge "docs: fix broken Juno links" into integration |
| 0cbcccc0 | 13-Feb-2023 |
Harrison Mutai <harrison.mutai@arm.com> |
docs: fix broken Juno links
Certain links to Juno documentation point to a location that were
removed at some point, or are unused. Fix links to point to the latest
available version on Arm's public
docs: fix broken Juno links
Certain links to Juno documentation point to a location that were
removed at some point, or are unused. Fix links to point to the latest
available version on Arm's public documentation site, and remove those
that are no longer being used.
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
Change-Id: I59202767db8834e9c302b2826f3faee47d3a5edd
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| b7c37e4a | 09-Jan-2023 |
Boyan Karatotev <boyan.karatotev@arm.com> |
build(docs): update Python dependencies
Update the python dependencies for building the project's Sphinx
documentation. Sphinx plugins are updated to the latest version, while
Sphinx itself is only
build(docs): update Python dependencies
Update the python dependencies for building the project's Sphinx
documentation. Sphinx plugins are updated to the latest version, while
Sphinx itself is only updated to 5.3.0 (latest 5.x.x revision) due to
sphinx-rtd-theme not supporting any higher (both require incompatible
versions of docutils). Myst-parser is also updated to the latest version
to prevent a docutils clash as well.
The effect of this is to bump certifi to version 2022.12.7 and wheel to
0.38.4 as suggested by dependabot.
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
Change-Id: I0ced5b127494255ce01aa7f51665bfcba161d135
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|
| 415195c0 | 09-Feb-2023 |
Boyan Karatotev <boyan.karatotev@arm.com> |
fix(docs): make required compiler version == rather than >=
TF-A carries its own compiler-rt so higher versions of the compilers may
not necessarily work. Because TF-A is only tested on the specifie
fix(docs): make required compiler version == rather than >=
TF-A carries its own compiler-rt so higher versions of the compilers may
not necessarily work. Because TF-A is only tested on the specified
versions in the CI, any breakage remains unknown. Update the
prerequisites guide to make it more apparent that this is the case.
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
Change-Id: Ia5da9c5ff505ead99f579f3f5fbe3a480d697c1d
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|
| c8a95567 | 13-Feb-2023 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge "docs: add Runtime Security Subsystem (RSS) documentation" into integration |
| eea607cb | 13-Oct-2022 |
Tamas Ban <tamas.ban@arm.com> |
docs: add Runtime Security Subsystem (RSS) documentation
Describe:
- RSS-AP communication
- RSS runtime services
- Measured boot
- Delegated Attestation
Signed-off-by: Tamas Ban <tamas.ban@
docs: add Runtime Security Subsystem (RSS) documentation
Describe:
- RSS-AP communication
- RSS runtime services
- Measured boot
- Delegated Attestation
Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Change-Id: Iaef93361a09355a1edaabcc0c59126e006ad251a
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|
| a13b4cd7 | 10-Feb-2023 |
Joanna Farley <joanna.farley@arm.com> |
Merge "fix(optee): address late comments and fix bad rc" into integration |
| af4fee04 | 10-Feb-2023 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge changes from topic "mb/tos-fw-config-load-refactor" into integration
* changes:
feat(spmd): map SPMC manifest region as EL3_PAS
feat(fvp): update device tree with load addresses of TOS_FW
Merge changes from topic "mb/tos-fw-config-load-refactor" into integration
* changes:
feat(spmd): map SPMC manifest region as EL3_PAS
feat(fvp): update device tree with load addresses of TOS_FW config
refactor(fvp): rename the DTB info structure member
feat(fconf): rename 'ns-load-address' to 'secondary-load-address'
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| 8d7c80fa | 09-Feb-2023 |
Jeffrey Kardatzke <jkardatzke@google.com> |
fix(optee): address late comments and fix bad rc
There were some late comments to the prior change (18635) which are
address in this commit. There was also an invalid return value check
which was ch
fix(optee): address late comments and fix bad rc
There were some late comments to the prior change (18635) which are
address in this commit. There was also an invalid return value check
which was changed and the wrong result was being returned via the SMC
call for loading OP-TEE which is now fixed.
Signed-off-by: Jeffrey Kardatzke <jkardatzke@google.com>
Change-Id: I883ddf966662549a3ef9c801a2d4f47709422332
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| 05e55030 | 07-Feb-2023 |
Manish V Badarkhe <Manish.Badarkhe@arm.com> |
feat(fconf): rename 'ns-load-address' to 'secondary-load-address'
The 'ns-load-address' property has been renamed to 'secondary-load-
address' in order to make it more generic. It can be used to cop
feat(fconf): rename 'ns-load-address' to 'secondary-load-address'
The 'ns-load-address' property has been renamed to 'secondary-load-
address' in order to make it more generic. It can be used to copy
the configuration to any location, be it root, secure, or non-secure.
Change-Id: I122508e155ccd99082296be3f6b8db2f908be221
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
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|
| d9bd35e3 | 06-Feb-2023 |
Harrison Mutai <harrison.mutai@arm.com> |
docs(qemu): delineate flash based boot method
Make the language around the explanation for booting via secure flash
clearer. Provide details into the intent of the options given to QEMU.
Change-Id:
docs(qemu): delineate flash based boot method
Make the language around the explanation for booting via secure flash
clearer. Provide details into the intent of the options given to QEMU.
Change-Id: Ia573b900aaa2346cad4f82191110b978f9bd5481
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
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| d5eee8f3 | 01-Feb-2023 |
Ming Huang <huangming@linux.alibaba.com> |
feat(gicv3): enlarge the range for intr_num of structure interrupt_prop_t
As the max ESPI can be 5119, so enlarge the intr_num range of
structure interrupt_prop_t. After the patch the ESPI can be ad
feat(gicv3): enlarge the range for intr_num of structure interrupt_prop_t
As the max ESPI can be 5119, so enlarge the intr_num range of
structure interrupt_prop_t. After the patch the ESPI can be add to
this macro:
define PLATFORM_G1S_PROPS(grp) \
INTR_PROP_DESC(197 - 32 + 4576, GIC_HIGHEST_SEC_PRIORITY, (grp), GIC_INTR_CFG_EDGE), \
INTR_PROP_DESC(199 - 32 + 4576, GIC_HIGHEST_SEC_PRIORITY, (grp), GIC_INTR_CFG_EDGE)
The firmware-design.rst will be updated accordingly.
Signed-off-by: Ming Huang <huangming@linux.alibaba.com>
Change-Id: Ic923868bb1b00c017410dc2aeabfda58ee54782f
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| 9b5a360f | 16-Jan-2023 |
Raghu Krishnamurthy <raghu.ncstate@gmail.com> |
docs: add interrupts-target field to sp manifest
In order to support the ability to target a SPI interrupt to a
particular core, an impdef field "interrupts-target" has been added to
associate and i
docs: add interrupts-target field to sp manifest
In order to support the ability to target a SPI interrupt to a
particular core, an impdef field "interrupts-target" has been added to
associate and interrupt id with an mpidr. The field is optional and if
not provided, existing SPMC behavior of routing to boot strap core is
maintained.
Signed-off-by: Raghu Krishnamurthy <raghu.ncstate@gmail.com>
Change-Id: I78ccfb45cd9b411cca4b36ff940064fc9dcd1622
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| 8b47f87a | 02-Feb-2023 |
Joanna Farley <joanna.farley@arm.com> |
Merge "feat(optee): add loading OP-TEE image via an SMC" into integration |
| 1548e0e7 | 02-Feb-2023 |
Joanna Farley <joanna.farley@arm.com> |
Merge changes from topic "xlnx_feat_chores" into integration
* changes:
chore(xilinx): update print information
feat(versal-net): add jtag dcc support |
| e3df3ffa | 01-Feb-2023 |
Soby Mathew <soby.mathew@arm.com> |
Merge changes I1b092bc1,Ifc2461b4,I5176caa5 into integration
* changes:
docs(rme): update RMM-EL3 Boot Manifest structure description
feat(rme): read DRAM information from FVP DTB
feat(rme): s
Merge changes I1b092bc1,Ifc2461b4,I5176caa5 into integration
* changes:
docs(rme): update RMM-EL3 Boot Manifest structure description
feat(rme): read DRAM information from FVP DTB
feat(rme): set DRAM information in Boot Manifest platform data
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|
| 30e8bc36 | 18-Jan-2023 |
Akshay Belsare <akshay.belsare@amd.com> |
feat(versal-net): add jtag dcc support
Add support for JTAG Debug Communication Channel(DCC), using the dcc
console driver, for Versal NET platform.
UART0/UART1 is not configured when the JTAG DCC i
feat(versal-net): add jtag dcc support
Add support for JTAG Debug Communication Channel(DCC), using the dcc
console driver, for Versal NET platform.
UART0/UART1 is not configured when the JTAG DCC is used as console for
the platform.
Though DCC is not using any UART, VERSAL_NET_UART_BASE needs
to be defined in the platform code. If its not defined, build errors
are observed.
Now VERSAL_NET_UART_BASE by default points to UART0 base.
Check for valid console(pl011, pl011_0, pl011_1, dcc) is
being done in the platform makefile, the error condition in
setting the value of VERSAL_NET_UART_BASE is redundant, thus the error
message is removed from the code.
Change-Id: I1085433055abea13526230cff4d4183ff7a01477
Signed-off-by: Akshay Belsare <akshay.belsare@amd.com>
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| 05c69cf7 | 03-Oct-2022 |
Jeffrey Kardatzke <jkardatzke@google.com> |
feat(optee): add loading OP-TEE image via an SMC
This adds the ability to load the OP-TEE image via an SMC called from
non-secure userspace rather than loading it during boot. This should
only be ut
feat(optee): add loading OP-TEE image via an SMC
This adds the ability to load the OP-TEE image via an SMC called from
non-secure userspace rather than loading it during boot. This should
only be utilized on platforms that can ensure security is maintained up
until the point the SMC is invoked as it breaks the normal barrier
between the secure and non-secure world.
Signed-off-by: Jeffrey Kardatzke <jkardatzke@google.com>
Change-Id: I21cfa9699617c493fa4190f01d1cbb714e7449cc
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|
| 1db295cf | 18-Jan-2023 |
AlexeiFedorov <Alexei.Fedorov@arm.com> |
docs(rme): update RMM-EL3 Boot Manifest structure description
This patch updates description of RMM-EL3 Boot Manifest
structure and its corresponding diagram and tables with DRAM
layout data.
Signe
docs(rme): update RMM-EL3 Boot Manifest structure description
This patch updates description of RMM-EL3 Boot Manifest
structure and its corresponding diagram and tables with DRAM
layout data.
Signed-off-by: AlexeiFedorov <Alexei.Fedorov@arm.com>
Change-Id: I1b092bc1ad5f1c7909d25c1a0dc89c2b210ada27
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|
| ed62dd21 | 30-Jan-2023 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge "docs(measured-boot): fix few typos" into integration |