1# 2# Copyright (c) 2013-2023, Arm Limited and Contributors. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7include common/fdt_wrappers.mk 8 9# Use the GICv3 driver on the FVP by default 10FVP_USE_GIC_DRIVER := FVP_GICV3 11 12# Default cluster count for FVP 13FVP_CLUSTER_COUNT := 2 14 15# Default number of CPUs per cluster on FVP 16FVP_MAX_CPUS_PER_CLUSTER := 4 17 18# Default number of threads per CPU on FVP 19FVP_MAX_PE_PER_CPU := 1 20 21# Disable redistributor frame of inactive/fused CPU cores by marking it as read 22# only; enable redistributor frames of all CPU cores by default. 23FVP_GICR_REGION_PROTECTION := 0 24 25FVP_DT_PREFIX := fvp-base-gicv3-psci 26 27# This is a very trickly TEMPORARY fix. Enabling ALL features exceeds BL31's 28# progbits limit. We need a way to build all useful configurations while waiting 29# on the fvp to increase its SRAM size. The problem is twofild: 30# 1. the cleanup that introduced these enables cleaned up tf-a a little too 31# well and things that previously (incorrectly) were enabled, no longer are. 32# A bunch of CI configs build subtly incorrectly and this combo makes it 33# necessary to forcefully and unconditionally enable them here. 34# 2. the progbits limit is exceeded only when the tsp is involved. However, 35# there are tsp CI configs that run on very high architecture revisions so 36# disabling everything isn't an option. 37# The fix is to enable everything, as before. When the tsp is included, though, 38# we need to slim the size down. In that case, disable all optional features, 39# that will not be present in CI when the tsp is. 40# Similarly, DRTM support is only tested on v8.0 models. Disable everything just 41# for it. 42# TODO: make all of this unconditional (or only base the condition on 43# ARM_ARCH_* when the makefile supports it). 44ifneq (${DRTM_SUPPORT}, 1) 45ifneq (${SPD}, tspd) 46 ENABLE_FEAT_AMU := 2 47 ENABLE_FEAT_AMUv1p1 := 2 48 ENABLE_FEAT_HCX := 2 49 ENABLE_MPAM_FOR_LOWER_ELS := 2 50 ENABLE_FEAT_RNG := 2 51 ENABLE_FEAT_TWED := 2 52 ENABLE_FEAT_GCS := 2 53ifeq (${ARCH},aarch64) 54ifeq (${SPM_MM}, 0) 55ifeq (${ENABLE_RME}, 0) 56ifeq (${CTX_INCLUDE_FPREGS}, 0) 57 ENABLE_SME_FOR_NS := 2 58 ENABLE_SME2_FOR_NS := 2 59endif 60endif 61endif 62endif 63endif 64 65# enable unconditionally for all builds 66ifeq (${ARCH}, aarch64) 67ifeq (${ENABLE_RME},0) 68 ENABLE_BRBE_FOR_NS := 2 69endif 70endif 71ENABLE_TRBE_FOR_NS := 2 72ENABLE_SYS_REG_TRACE_FOR_NS := 2 73ENABLE_FEAT_CSV2_2 := 2 74ENABLE_FEAT_DIT := 2 75ENABLE_FEAT_PAN := 2 76ENABLE_FEAT_VHE := 2 77CTX_INCLUDE_NEVE_REGS := 2 78ENABLE_FEAT_SEL2 := 2 79ENABLE_TRF_FOR_NS := 2 80ENABLE_FEAT_ECV := 2 81ENABLE_FEAT_FGT := 2 82ENABLE_FEAT_TCR2 := 2 83ENABLE_FEAT_S2PIE := 2 84ENABLE_FEAT_S1PIE := 2 85ENABLE_FEAT_S2POE := 2 86ENABLE_FEAT_S1POE := 2 87endif 88 89# The FVP platform depends on this macro to build with correct GIC driver. 90$(eval $(call add_define,FVP_USE_GIC_DRIVER)) 91 92# Pass FVP_CLUSTER_COUNT to the build system. 93$(eval $(call add_define,FVP_CLUSTER_COUNT)) 94 95# Pass FVP_MAX_CPUS_PER_CLUSTER to the build system. 96$(eval $(call add_define,FVP_MAX_CPUS_PER_CLUSTER)) 97 98# Pass FVP_MAX_PE_PER_CPU to the build system. 99$(eval $(call add_define,FVP_MAX_PE_PER_CPU)) 100 101# Pass FVP_GICR_REGION_PROTECTION to the build system. 102$(eval $(call add_define,FVP_GICR_REGION_PROTECTION)) 103 104# Sanity check the cluster count and if FVP_CLUSTER_COUNT <= 2, 105# choose the CCI driver , else the CCN driver 106ifeq ($(FVP_CLUSTER_COUNT), 0) 107$(error "Incorrect cluster count specified for FVP port") 108else ifeq ($(FVP_CLUSTER_COUNT),$(filter $(FVP_CLUSTER_COUNT),1 2)) 109FVP_INTERCONNECT_DRIVER := FVP_CCI 110else 111FVP_INTERCONNECT_DRIVER := FVP_CCN 112endif 113 114$(eval $(call add_define,FVP_INTERCONNECT_DRIVER)) 115 116# Choose the GIC sources depending upon the how the FVP will be invoked 117ifeq (${FVP_USE_GIC_DRIVER}, FVP_GICV3) 118 119# The GIC model (GIC-600 or GIC-500) will be detected at runtime 120GICV3_SUPPORT_GIC600 := 1 121GICV3_OVERRIDE_DISTIF_PWR_OPS := 1 122 123# Include GICv3 driver files 124include drivers/arm/gic/v3/gicv3.mk 125 126FVP_GIC_SOURCES := ${GICV3_SOURCES} \ 127 plat/common/plat_gicv3.c \ 128 plat/arm/common/arm_gicv3.c 129 130 ifeq ($(filter 1,${RESET_TO_BL2} \ 131 ${RESET_TO_BL31} ${RESET_TO_SP_MIN}),) 132 FVP_GIC_SOURCES += plat/arm/board/fvp/fvp_gicv3.c 133 endif 134 135else ifeq (${FVP_USE_GIC_DRIVER}, FVP_GICV2) 136 137# No GICv4 extension 138GIC_ENABLE_V4_EXTN := 0 139$(eval $(call add_define,GIC_ENABLE_V4_EXTN)) 140 141# Include GICv2 driver files 142include drivers/arm/gic/v2/gicv2.mk 143 144FVP_GIC_SOURCES := ${GICV2_SOURCES} \ 145 plat/common/plat_gicv2.c \ 146 plat/arm/common/arm_gicv2.c 147 148FVP_DT_PREFIX := fvp-base-gicv2-psci 149else 150$(error "Incorrect GIC driver chosen on FVP port") 151endif 152 153ifeq (${FVP_INTERCONNECT_DRIVER}, FVP_CCI) 154FVP_INTERCONNECT_SOURCES := drivers/arm/cci/cci.c 155else ifeq (${FVP_INTERCONNECT_DRIVER}, FVP_CCN) 156FVP_INTERCONNECT_SOURCES := drivers/arm/ccn/ccn.c \ 157 plat/arm/common/arm_ccn.c 158else 159$(error "Incorrect CCN driver chosen on FVP port") 160endif 161 162FVP_SECURITY_SOURCES := drivers/arm/tzc/tzc400.c \ 163 plat/arm/board/fvp/fvp_security.c \ 164 plat/arm/common/arm_tzc400.c 165 166 167PLAT_INCLUDES := -Iplat/arm/board/fvp/include \ 168 -Iinclude/lib/psa 169 170 171PLAT_BL_COMMON_SOURCES := plat/arm/board/fvp/fvp_common.c 172 173FVP_CPU_LIBS := lib/cpus/${ARCH}/aem_generic.S 174 175ifeq (${ARCH}, aarch64) 176 177# select a different set of CPU files, depending on whether we compile for 178# hardware assisted coherency cores or not 179ifeq (${HW_ASSISTED_COHERENCY}, 0) 180# Cores used without DSU 181 FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a35.S \ 182 lib/cpus/aarch64/cortex_a53.S \ 183 lib/cpus/aarch64/cortex_a57.S \ 184 lib/cpus/aarch64/cortex_a72.S \ 185 lib/cpus/aarch64/cortex_a73.S 186else 187# Cores used with DSU only 188 ifeq (${CTX_INCLUDE_AARCH32_REGS}, 0) 189 # AArch64-only cores 190 # TODO: add all cores to the appropriate lists 191 FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a65.S \ 192 lib/cpus/aarch64/cortex_a65ae.S \ 193 lib/cpus/aarch64/cortex_a76.S \ 194 lib/cpus/aarch64/cortex_a76ae.S \ 195 lib/cpus/aarch64/cortex_a77.S \ 196 lib/cpus/aarch64/cortex_a78.S \ 197 lib/cpus/aarch64/cortex_a78c.S \ 198 lib/cpus/aarch64/cortex_a710.S \ 199 lib/cpus/aarch64/neoverse_n_common.S \ 200 lib/cpus/aarch64/neoverse_n1.S \ 201 lib/cpus/aarch64/neoverse_n2.S \ 202 lib/cpus/aarch64/neoverse_v1.S \ 203 lib/cpus/aarch64/neoverse_e1.S \ 204 lib/cpus/aarch64/cortex_x2.S 205 endif 206 # AArch64/AArch32 cores 207 FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a55.S \ 208 lib/cpus/aarch64/cortex_a75.S 209endif 210 211else 212FVP_CPU_LIBS += lib/cpus/aarch32/cortex_a32.S \ 213 lib/cpus/aarch32/cortex_a57.S 214endif 215 216BL1_SOURCES += drivers/arm/smmu/smmu_v3.c \ 217 drivers/arm/sp805/sp805.c \ 218 drivers/delay_timer/delay_timer.c \ 219 drivers/io/io_semihosting.c \ 220 lib/semihosting/semihosting.c \ 221 lib/semihosting/${ARCH}/semihosting_call.S \ 222 plat/arm/board/fvp/${ARCH}/fvp_helpers.S \ 223 plat/arm/board/fvp/fvp_bl1_setup.c \ 224 plat/arm/board/fvp/fvp_err.c \ 225 plat/arm/board/fvp/fvp_io_storage.c \ 226 ${FVP_CPU_LIBS} \ 227 ${FVP_INTERCONNECT_SOURCES} 228 229ifeq (${USE_SP804_TIMER},1) 230BL1_SOURCES += drivers/arm/sp804/sp804_delay_timer.c 231else 232BL1_SOURCES += drivers/delay_timer/generic_delay_timer.c 233endif 234 235 236BL2_SOURCES += drivers/arm/sp805/sp805.c \ 237 drivers/io/io_semihosting.c \ 238 lib/utils/mem_region.c \ 239 lib/semihosting/semihosting.c \ 240 lib/semihosting/${ARCH}/semihosting_call.S \ 241 plat/arm/board/fvp/fvp_bl2_setup.c \ 242 plat/arm/board/fvp/fvp_err.c \ 243 plat/arm/board/fvp/fvp_io_storage.c \ 244 plat/arm/common/arm_nor_psci_mem_protect.c \ 245 ${FVP_SECURITY_SOURCES} 246 247 248ifeq (${COT_DESC_IN_DTB},1) 249BL2_SOURCES += plat/arm/common/fconf/fconf_nv_cntr_getter.c 250endif 251 252ifeq (${ENABLE_RME},1) 253BL2_SOURCES += plat/arm/board/fvp/aarch64/fvp_helpers.S 254 255BL31_SOURCES += plat/arm/board/fvp/fvp_plat_attest_token.c \ 256 plat/arm/board/fvp/fvp_realm_attest_key.c 257 258# FVP platform does not support RSS, but it can leverage RSS APIs to 259# provide hardcoded token/key on request. 260BL31_SOURCES += lib/psa/delegated_attestation.c 261 262endif 263 264ifeq (${ENABLE_FEAT_RNG_TRAP},1) 265BL31_SOURCES += plat/arm/board/fvp/fvp_sync_traps.c 266endif 267 268ifeq (${RESET_TO_BL2},1) 269BL2_SOURCES += plat/arm/board/fvp/${ARCH}/fvp_helpers.S \ 270 plat/arm/board/fvp/fvp_bl2_el3_setup.c \ 271 ${FVP_CPU_LIBS} \ 272 ${FVP_INTERCONNECT_SOURCES} 273endif 274 275ifeq (${USE_SP804_TIMER},1) 276BL2_SOURCES += drivers/arm/sp804/sp804_delay_timer.c 277endif 278 279BL2U_SOURCES += plat/arm/board/fvp/fvp_bl2u_setup.c \ 280 ${FVP_SECURITY_SOURCES} 281 282ifeq (${USE_SP804_TIMER},1) 283BL2U_SOURCES += drivers/arm/sp804/sp804_delay_timer.c 284endif 285 286BL31_SOURCES += drivers/arm/fvp/fvp_pwrc.c \ 287 drivers/arm/smmu/smmu_v3.c \ 288 drivers/delay_timer/delay_timer.c \ 289 drivers/cfi/v2m/v2m_flash.c \ 290 lib/utils/mem_region.c \ 291 plat/arm/board/fvp/fvp_bl31_setup.c \ 292 plat/arm/board/fvp/fvp_console.c \ 293 plat/arm/board/fvp/fvp_pm.c \ 294 plat/arm/board/fvp/fvp_topology.c \ 295 plat/arm/board/fvp/aarch64/fvp_helpers.S \ 296 plat/arm/common/arm_nor_psci_mem_protect.c \ 297 ${FVP_CPU_LIBS} \ 298 ${FVP_GIC_SOURCES} \ 299 ${FVP_INTERCONNECT_SOURCES} \ 300 ${FVP_SECURITY_SOURCES} 301 302# Support for fconf in BL31 303# Added separately from the above list for better readability 304ifeq ($(filter 1,${RESET_TO_BL2} ${RESET_TO_BL31}),) 305BL31_SOURCES += lib/fconf/fconf.c \ 306 lib/fconf/fconf_dyn_cfg_getter.c \ 307 plat/arm/board/fvp/fconf/fconf_hw_config_getter.c 308 309BL31_SOURCES += ${FDT_WRAPPERS_SOURCES} 310 311ifeq (${SEC_INT_DESC_IN_FCONF},1) 312BL31_SOURCES += plat/arm/common/fconf/fconf_sec_intr_config.c 313endif 314 315endif 316 317ifeq (${USE_SP804_TIMER},1) 318BL31_SOURCES += drivers/arm/sp804/sp804_delay_timer.c 319else 320BL31_SOURCES += drivers/delay_timer/generic_delay_timer.c 321endif 322 323# Add the FDT_SOURCES and options for Dynamic Config (only for Unix env) 324ifdef UNIX_MK 325FVP_HW_CONFIG_DTS := fdts/${FVP_DT_PREFIX}.dts 326FDT_SOURCES += $(addprefix plat/arm/board/fvp/fdts/, \ 327 ${PLAT}_fw_config.dts \ 328 ${PLAT}_tb_fw_config.dts \ 329 ${PLAT}_soc_fw_config.dts \ 330 ${PLAT}_nt_fw_config.dts \ 331 ) 332 333FVP_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_fw_config.dtb 334FVP_TB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tb_fw_config.dtb 335FVP_SOC_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_soc_fw_config.dtb 336FVP_NT_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_nt_fw_config.dtb 337 338ifeq (${SPD},tspd) 339FDT_SOURCES += plat/arm/board/fvp/fdts/${PLAT}_tsp_fw_config.dts 340FVP_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tsp_fw_config.dtb 341 342# Add the TOS_FW_CONFIG to FIP and specify the same to certtool 343$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TOS_FW_CONFIG},--tos-fw-config,${FVP_TOS_FW_CONFIG})) 344endif 345 346ifeq (${SPD},spmd) 347 348ifeq ($(ARM_SPMC_MANIFEST_DTS),) 349ARM_SPMC_MANIFEST_DTS := plat/arm/board/fvp/fdts/${PLAT}_spmc_manifest.dts 350endif 351 352FDT_SOURCES += ${ARM_SPMC_MANIFEST_DTS} 353FVP_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/$(notdir $(basename ${ARM_SPMC_MANIFEST_DTS})).dtb 354 355# Add the TOS_FW_CONFIG to FIP and specify the same to certtool 356$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TOS_FW_CONFIG},--tos-fw-config,${FVP_TOS_FW_CONFIG})) 357endif 358 359# Add the FW_CONFIG to FIP and specify the same to certtool 360$(eval $(call TOOL_ADD_PAYLOAD,${FVP_FW_CONFIG},--fw-config,${FVP_FW_CONFIG})) 361# Add the TB_FW_CONFIG to FIP and specify the same to certtool 362$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TB_FW_CONFIG},--tb-fw-config,${FVP_TB_FW_CONFIG})) 363# Add the SOC_FW_CONFIG to FIP and specify the same to certtool 364$(eval $(call TOOL_ADD_PAYLOAD,${FVP_SOC_FW_CONFIG},--soc-fw-config,${FVP_SOC_FW_CONFIG})) 365# Add the NT_FW_CONFIG to FIP and specify the same to certtool 366$(eval $(call TOOL_ADD_PAYLOAD,${FVP_NT_FW_CONFIG},--nt-fw-config,${FVP_NT_FW_CONFIG})) 367 368FDT_SOURCES += ${FVP_HW_CONFIG_DTS} 369$(eval FVP_HW_CONFIG := ${BUILD_PLAT}/$(patsubst %.dts,%.dtb,$(FVP_HW_CONFIG_DTS))) 370 371# Add the HW_CONFIG to FIP and specify the same to certtool 372$(eval $(call TOOL_ADD_PAYLOAD,${FVP_HW_CONFIG},--hw-config,${FVP_HW_CONFIG})) 373endif 374 375# Enable dynamic mitigation support by default 376DYNAMIC_WORKAROUND_CVE_2018_3639 := 1 377 378ifneq (${ENABLE_FEAT_AMU},0) 379BL31_SOURCES += lib/cpus/aarch64/cpuamu.c \ 380 lib/cpus/aarch64/cpuamu_helpers.S 381 382ifeq (${HW_ASSISTED_COHERENCY}, 1) 383BL31_SOURCES += lib/cpus/aarch64/cortex_a75_pubsub.c \ 384 lib/cpus/aarch64/neoverse_n1_pubsub.c 385endif 386endif 387 388ifeq (${RAS_EXTENSION},1) 389BL31_SOURCES += plat/arm/board/fvp/aarch64/fvp_ras.c 390endif 391 392ifneq (${ENABLE_STACK_PROTECTOR},0) 393PLAT_BL_COMMON_SOURCES += plat/arm/board/fvp/fvp_stack_protector.c 394endif 395 396ifeq (${ARCH},aarch32) 397 NEED_BL32 := yes 398endif 399 400# Enable the dynamic translation tables library. 401ifeq ($(filter 1,${RESET_TO_BL2} ${ARM_XLAT_TABLES_LIB_V1}),) 402 ifeq (${ARCH},aarch32) 403 BL32_CPPFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC 404 else # AArch64 405 BL31_CPPFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC 406 endif 407endif 408 409ifeq (${ALLOW_RO_XLAT_TABLES}, 1) 410 ifeq (${ARCH},aarch32) 411 BL32_CPPFLAGS += -DPLAT_RO_XLAT_TABLES 412 else # AArch64 413 BL31_CPPFLAGS += -DPLAT_RO_XLAT_TABLES 414 ifeq (${SPD},tspd) 415 BL32_CPPFLAGS += -DPLAT_RO_XLAT_TABLES 416 endif 417 endif 418endif 419 420ifeq (${USE_DEBUGFS},1) 421 BL31_CPPFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC 422endif 423 424# Add support for platform supplied linker script for BL31 build 425$(eval $(call add_define,PLAT_EXTRA_LD_SCRIPT)) 426 427ifneq (${RESET_TO_BL2}, 0) 428 override BL1_SOURCES = 429endif 430 431# RSS is not supported on FVP right now. Thus, we use the mocked version 432# of the provided PSA APIs. They return with success and hard-coded token/key. 433PLAT_RSS_NOT_SUPPORTED := 1 434 435# Include Measured Boot makefile before any Crypto library makefile. 436# Crypto library makefile may need default definitions of Measured Boot build 437# flags present in Measured Boot makefile. 438ifeq (${MEASURED_BOOT},1) 439 RSS_MEASURED_BOOT_MK := drivers/measured_boot/rss/rss_measured_boot.mk 440 $(info Including ${RSS_MEASURED_BOOT_MK}) 441 include ${RSS_MEASURED_BOOT_MK} 442 443 ifneq (${MBOOT_RSS_HASH_ALG}, sha256) 444 $(eval $(call add_define,TF_MBEDTLS_MBOOT_USE_SHA512)) 445 endif 446 447 BL1_SOURCES += ${MEASURED_BOOT_SOURCES} 448 BL2_SOURCES += ${MEASURED_BOOT_SOURCES} 449endif 450 451include plat/arm/board/common/board_common.mk 452include plat/arm/common/arm_common.mk 453 454ifeq (${MEASURED_BOOT},1) 455BL1_SOURCES += plat/arm/board/fvp/fvp_common_measured_boot.c \ 456 plat/arm/board/fvp/fvp_bl1_measured_boot.c \ 457 lib/psa/measured_boot.c 458 459BL2_SOURCES += plat/arm/board/fvp/fvp_common_measured_boot.c \ 460 plat/arm/board/fvp/fvp_bl2_measured_boot.c \ 461 lib/psa/measured_boot.c 462 463# Even though RSS is not supported on FVP (see above), we support overriding 464# PLAT_RSS_NOT_SUPPORTED from the command line, just for the purpose of building 465# the code to detect any build regressions. The resulting firmware will not be 466# functional. 467ifneq (${PLAT_RSS_NOT_SUPPORTED},1) 468 $(warning "RSS is not supported on FVP. The firmware will not be functional.") 469 include drivers/arm/rss/rss_comms.mk 470 BL1_SOURCES += ${RSS_COMMS_SOURCES} 471 BL2_SOURCES += ${RSS_COMMS_SOURCES} 472 BL31_SOURCES += ${RSS_COMMS_SOURCES} 473 474 BL1_CFLAGS += -DPLAT_RSS_COMMS_PAYLOAD_MAX_SIZE=0 475 BL2_CFLAGS += -DPLAT_RSS_COMMS_PAYLOAD_MAX_SIZE=0 476 BL31_CFLAGS += -DPLAT_RSS_COMMS_PAYLOAD_MAX_SIZE=0 477endif 478 479endif 480 481ifeq (${DRTM_SUPPORT}, 1) 482BL31_SOURCES += plat/arm/board/fvp/fvp_drtm_addr.c \ 483 plat/arm/board/fvp/fvp_drtm_dma_prot.c \ 484 plat/arm/board/fvp/fvp_drtm_err.c \ 485 plat/arm/board/fvp/fvp_drtm_measurement.c \ 486 plat/arm/board/fvp/fvp_drtm_stub.c \ 487 plat/arm/common/arm_dyn_cfg.c \ 488 plat/arm/board/fvp/fvp_err.c 489endif 490 491ifeq (${TRUSTED_BOARD_BOOT}, 1) 492BL1_SOURCES += plat/arm/board/fvp/fvp_trusted_boot.c 493BL2_SOURCES += plat/arm/board/fvp/fvp_trusted_boot.c 494 495# FVP being a development platform, enable capability to disable Authentication 496# dynamically if TRUSTED_BOARD_BOOT is set. 497DYN_DISABLE_AUTH := 1 498endif 499 500ifeq (${SPMC_AT_EL3}, 1) 501PLAT_BL_COMMON_SOURCES += plat/arm/board/fvp/fvp_el3_spmc.c 502endif 503 504PSCI_OS_INIT_MODE := 1 505 506$(eval $(call add_define,PLATFORM_TEST_EA_FFH)) 507ifeq (${PLATFORM_TEST_EA_FFH}, 1) 508 ifeq (${HANDLE_EA_EL3_FIRST_NS}, 0) 509 $(error "PLATFORM_TEST_EA_FFH expects HANDLE_EA_EL3_FIRST_NS to be 1") 510 endif 511BL31_SOURCES += plat/arm/board/fvp/aarch64/fvp_ea.c 512endif 513 514ifeq (${SPD},spmd) 515BL31_SOURCES += plat/arm/board/fvp/fvp_spmd.c 516endif 517