pta: stats: add commands to print clock and regulator trees

Add statistics PTA commands STATS_CMD_PRINT_DRIVERS_INFO to print
device drivers information on console. The implementation currently
allo

pta: stats: add commands to print clock and regulator trees

Add statistics PTA commands STATS_CMD_PRINT_DRIVERS_INFO to print
device drivers information on console. The implementation currently
allows to print the clock tree and the regulator tree to core console.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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tree wide: clarify PTA ABI

Explicitly describe the statistics PTA ABI using dedicated inline
comments and moving struct pta_stats_ta and struct pta_stats_alloc
from respectively tee_ta_manager.c and

tree wide: clarify PTA ABI

Explicitly describe the statistics PTA ABI using dedicated inline
comments and moving struct pta_stats_ta and struct pta_stats_alloc
from respectively tee_ta_manager.c and malloc.h to pta_stats.h
header file.

For that purpose, define ALLOC_ID_* macros to identify each allocator
one can query information from through the statistics PTA API.

Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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pta: stats: export PTA API definition to TA devkit

Move statistics PTA API definitions and description to a header
file that is exported to the TA devkit. This change makes the
description that PTA

pta: stats: export PTA API definition to TA devkit

Move statistics PTA API definitions and description to a header
file that is exported to the TA devkit. This change makes the
description that PTA API more consistent regarding other PTAs.

Explicitly include tee_api_types.h from stats.c source file.

Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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tree wide: rename struct malloc_stats

Rename struct malloc_stats to struct pta_stats_alloc to prepare
the creation of pta_stats.h header file that will define the
whole statistics PTA API and ABI, l

tree wide: rename struct malloc_stats

Rename struct malloc_stats to struct pta_stats_alloc to prepare
the creation of pta_stats.h header file that will define the
whole statistics PTA API and ABI, located in libutee/include/
as already done for all other PTAs.

Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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libutee: remove leftover references to libmpa

Removes references to libmpa removed since OP-TEE release tag 3.9.0,
by commit 7fb525f1f8a6 ("Remove libmpa in favor of libmbedtls").

This change remov

libutee: remove leftover references to libmpa

Removes references to libmpa removed since OP-TEE release tag 3.9.0,
by commit 7fb525f1f8a6 ("Remove libmpa in favor of libmbedtls").

This change removes configuration switch CFG_TA_MBEDTLS_MPI
and CFG_TA_MBEDTLS that are no more used by OP-TEE component.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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libutee: TEE_AllocateOperation(): maxKeySize of digests may take any value

Commit [1] introduced a check to enforce the "maxKeySize" parameter of
digest operations to always be zero. This is a viola

libutee: TEE_AllocateOperation(): maxKeySize of digests may take any value

Commit [1] introduced a check to enforce the "maxKeySize" parameter of
digest operations to always be zero. This is a violation of the Global
Platform specification [2].

Revert commit [1] to allow maxKeySize to take any value for digest
operations.

[1] commit cf5c060cec76 ("libutee: TEE_AllocateOperation(): digest
operations must have 0 max key size")
Link: https://github.com/OP-TEE/optee_os/commit/cf5c060cec76

[2] TEE Internal Core API Specification – Public Release v1.3.1,
§6.2.1 TEE_AllocateOperation:

The parameter maxKeySize SHALL be a valid value as defined in
Table 5-9 for the algorithm, for algorithms referenced in Table
5-9. For all other algorithms, the maxKeySize parameter may have
any value.

CC: Jens Wiklander <jens.wiklander@linaro.org>
Fixes: cf5c060cec76 ("libutee: TEE_AllocateOperation(): digest operations must have 0 max key size")
Signed-off-by: Vincent Mailhol <mailhol.vincent@wanadoo.fr>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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Squashed commit upgrading to mbedtls-3.4.0

Squash merging branch import/mbedtls-3.4.0

8225713449d3 ("libmbedtls: fix unrecognized compiler option")
f03730842d7b ("core: ltc: configure internal MD5"

Squashed commit upgrading to mbedtls-3.4.0

Squash merging branch import/mbedtls-3.4.0

8225713449d3 ("libmbedtls: fix unrecognized compiler option")
f03730842d7b ("core: ltc: configure internal MD5")
2b0d0c50127c ("core: ltc: configure internal SHA-1 and SHA-224")
0e48a6e17630 ("libmedtls: core: update to mbedTLS 3.4.0 API")
049882b143af ("libutee: update to mbedTLS 3.4.0 API")
982307bf6169 ("core: LTC mpi_desc.c: update to mbedTLS 3.4.0 API")
33218e9eff7b ("ta: pkcs11: update to mbedTLS 3.4.0 API")
6956420cc064 ("libmbedtls: fix cipher_wrap.c for NIST AES Key Wrap mode")
ad67ef0b43fd ("libmbedtls: fix cipher_wrap.c for chacha20 and chachapoly")
7300f4d97bbf ("libmbedtls: add fault mitigation in mbedtls_rsa_rsassa_pkcs1_v15_verify()")
cec89b62a86d ("libmbedtls: add fault mitigation in mbedtls_rsa_rsassa_pss_verify_ext()")
e7e048796c44 ("libmbedtls: add SM2 curve")
096beff2cd31 ("libmbedtls: mbedtls_mpi_exp_mod(): optimize mempool usage")
7108668efd3f ("libmbedtls: mbedtls_mpi_exp_mod(): reduce stack usage")
0ba4eb8d0572 ("libmbedtls: mbedtls_mpi_exp_mod() initialize W")
3fd6ecf00382 ("libmbedtls: fix no CRT issue")
d5ea7e9e9aa7 ("libmbedtls: add interfaces in mbedtls for context memory operation")
2b0fb3f1fa3d ("libmedtls: mpi_miller_rabin: increase count limit")
2c3301ab99bb ("libmbedtls: add mbedtls_mpi_init_mempool()")
9a111f0da04b ("libmbedtls: make mbedtls_mpi_mont*() available")
804fe3a374f5 ("mbedtls: configure mbedtls to reach for config")
b28a41531427 ("mbedtls: remove default include/mbedtls/config.h")
dfafe507bbef ("Import mbedtls-3.4.0")

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (vexpress-qemu_armv8a)

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core: pta: imx: fix typo DEK blob command

The PTA command had the manufacturing protection prefix instead of the
DEK blob prefix.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jero

core: pta: imx: fix typo DEK blob command

The PTA command had the manufacturing protection prefix instead of the
DEK blob prefix.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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core: pta: imx: add DEK blob

Add DEK blob PTA to generate CAAM DEK blobs.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

crypto: change TEE_MAIN_ALGO_X448 value to 0x49

Change the value of TEE_MAIN_ALGO_X448 to 0x49 so that
TEE_ALG_GET_KEY_TYPE(TEE_ALG_X448, true) == TEE_TYPE_X448_KEYPAIR and
TEE_ALG_GET_KEY_TYPE(TEE_

crypto: change TEE_MAIN_ALGO_X448 value to 0x49

Change the value of TEE_MAIN_ALGO_X448 to 0x49 so that
TEE_ALG_GET_KEY_TYPE(TEE_ALG_X448, true) == TEE_TYPE_X448_KEYPAIR and
TEE_ALG_GET_KEY_TYPE(TEE_ALG_X448, false) == TEE_TYPE_X448_PUBLIC_KEY.

Signed-off-by: loubaihui <loubaihui1@huawei.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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lib: libutee: initialize variables in TEE_GetPropertyAsString()

Initialize local variables at declaration as specified by the coding
guidelines.

Signed-off-by: Clement Faure <clement.faure@nxp.com>

lib: libutee: initialize variables in TEE_GetPropertyAsString()

Initialize local variables at declaration as specified by the coding
guidelines.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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lib: libutee: initialize TA property type

TA property type `type` is declared without being initialized and might
be used in the if statement uninitialized.

Signed-off-by: Clement Faure <clement.fa

lib: libutee: initialize TA property type

TA property type `type` is declared without being initialized and might
be used in the if statement uninitialized.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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lib: libutee: fix use after free

Make sure to call addr_is_in_no_share_heap() before the freeing buffer.
This is a false positive as only the pointer value is used and not the
memory freed.

Signed-

lib: libutee: fix use after free

Make sure to call addr_is_in_no_share_heap() before the freeing buffer.
This is a false positive as only the pointer value is used and not the
memory freed.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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crypto: add drvcrypt_register_x25519() and drvcrypt_register_x448()

Add X25519 and X448 drvcrypt.

Signed-off-by: loubaihui <loubaihui1@huawei.com>
Acked-by: Jerome Forissier <jerome.forissier@linar

crypto: add drvcrypt_register_x25519() and drvcrypt_register_x448()

Add X25519 and X448 drvcrypt.

Signed-off-by: loubaihui <loubaihui1@huawei.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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crypto: add X448 support

Refer to the X25519 algorithm, add the X448 algorithm framework code.

Signed-off-by: loubaihui <loubaihui1@huawei.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.o

crypto: add X448 support

Refer to the X25519 algorithm, add the X448 algorithm framework code.

Signed-off-by: loubaihui <loubaihui1@huawei.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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ftrace: change implementation to use binary circular buffer

The current implementation of function tracing (CFG_FTRACE_SUPPORT)
produces human-readable text into the output buffer that is passed to

ftrace: change implementation to use binary circular buffer

The current implementation of function tracing (CFG_FTRACE_SUPPORT)
produces human-readable text into the output buffer that is passed to
tee-supplicant and ultimately saved to the Linux filesystem. Two main
issues with that:

1. The string formatting code is somewhat complex. It introduces
significant overhead in the execution time of the instrumented
functions.
2. The various policies about how to handle a buffer full condition
(CFG_FTRACE_BUF_WHEN_FULL) are not very convenient. In particular,
"shift" is typically the most desirable option because it always
keeps the most recent entries, but it is very inefficient to the
point of not being usable in practice.

This commit addresses the above concerns by making the ftrace buffer
circular one, each entry being 64-bit value. The formatting code is
offloaded to a new Python script: scripts/ftrace_format.py. The
output is unchanged except for an added field showing the current
depth in the call stack.

Typical usage (captured on QEMUv8):

build$ mkdir -p ../tmp
build$ chmod a+w ../tmp
build$ make CFG_FTRACE_SUPPORT=y CFG_FTRACE_BUF_SIZE=15000 \
CFG_TA_MCOUNT=y CFG_ULIBS_MCOUNT=y CFG_SYSCALL_FTRACE=y \
QEMU_VIRTFS_AUTOMOUNT=y run
$ xtest regression_1004
...
$ cp /tmp/ftrace-cb3e5ba0-adf1-11e0-998b-0002a5d5c51b.out /mnt/host/tmp
build$ cd ..
optee$ optee_os/scripts/ftrace_format.py \
tmp/ftrace-cb3e5ba0-adf1-11e0-998b-0002a5d5c51b.out |
optee_os/scripts/symbolize.py \
-d optee_os/out/arm/core \
-d out-br/build/optee_test_ext-1.0/ta/*/out | less
TEE load address @ 0x5ab04000
Function graph for TA: cb3e5ba0-adf1-11e0-998b-0002a5d5c51b @ 80085000
| 1 | __ta_entry() {
| 2 | __utee_entry() {
43.840 us | 3 | ta_header_get_session()
7.216 us | 3 | tahead_get_trace_level()
14.480 us | 3 | trace_set_level()
| 3 | malloc_add_pool() {
| 4 | raw_malloc_add_pool() {
46.032 us | 5 | bpool()
| 5 | raw_realloc() {
166.256 us | 6 | bget()
23.056 us | 6 | raw_malloc_return_hook()
267.952 us | 5 | }
398.720 us | 4 | }
426.992 us | 3 | }
| 3 | TEE_GetPropertyAsU32() {
23.600 us | 4 | is_propset_pseudo_handle()
| 4 | __utee_check_instring_annotation() {
26.416 us | 5 | strlen()
| 5 | check_access() {
| 6 | TEE_CheckMemoryAccessRights() {
| 7 | _utee_check_access_rights() {
| 8 | syscall_check_access_rights() {
| 9 | ts_get_current_session() {
4.304 us | 10 | ts_get_current_session_may_fail()
10.976 us | 9 | }
| 9 | to_user_ta_ctx() {
2.496 us | 10 | is_user_ta_ctx()
8.096 us | 9 | }
| 9 | vm_check_access_rights() {
| 10 | vm_buf_is_inside_um_private() {
| 11 | core_is_buffer_inside() {
...

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

show more ...

libutee: Implement RISC-V helper functions for TA libraries

To enable ftrace support in TA libraries, the timer related functions
should be implemented. Add riscv_user_sysreg.h which implements thes

libutee: Implement RISC-V helper functions for TA libraries

To enable ftrace support in TA libraries, the timer related functions
should be implemented. Add riscv_user_sysreg.h which implements these
functions for TA libraries. The code is referenced from core header and
the M-mode related code is removed.

Signed-off-by: Alvin Chang <alvinga@andestech.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Marouene Boubakri <marouene.boubakri@nxp.com>

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libutee: riscv: Fix the arguments of __utee_panic() for unwinding

To unwind stack from synchronous panic, the ra and s0(fp) registers
should be saved onto stack, and the a1 should be assigned as sp.

libutee: riscv: Fix the arguments of __utee_panic() for unwinding

To unwind stack from synchronous panic, the ra and s0(fp) registers
should be saved onto stack, and the a1 should be assigned as sp.
The save_panic_regs_rv_ta() can handle these registers for abort usage.

Signed-off-by: Alvin Chang <alvinga@andestech.com>
Tested-by: Marouene Boubakri <marouene.boubakri@nxp.com>
Reviewed-by: Marouene Boubakri <marouene.boubakri@nxp.com>

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libutee: riscv: Fix relocation type of function call into __utee_panic()

In RISC-V, "j" instruction has R_RISCV_JAL relocation that can represent
an even signed 21-bit offset (+-1MiB). However, this

libutee: riscv: Fix relocation type of function call into __utee_panic()

In RISC-V, "j" instruction has R_RISCV_JAL relocation that can represent
an even signed 21-bit offset (+-1MiB). However, this range is not enough
to be position independent code, and the linker generates linking error.
Fix it by using "tail" instruction which has R_RISCV_CALL_PLT relocation
that the execution can jump to +-2GB location.

Note that we won't return from _utee_panic(), that's why we use "tail"
instead of "call" instruction so that we won't generate redundant return
instruction.

Signed-off-by: Alvin Chang <alvinga@andestech.com>
Acked-by: liushiwei <liushiwei@eswincomputing.com>

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Add missing conditional compilation for RISC-V

RV64 also uses kern_sp. The elf.h is also used by RV32 and RV64.

Signed-off-by: Alvin Chang <alvinga@andestech.com>
Acked-by: Jerome Forissier <jerome

Add missing conditional compilation for RISC-V

RV64 also uses kern_sp. The elf.h is also used by RV32 and RV64.

Signed-off-by: Alvin Chang <alvinga@andestech.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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build: ta: add RISC-V linker script

Sort out the common code compiled by TA,
abstract RISCV and ARM compile the common part of TA.

Signed-off-by: liushiwei <liushiwei@eswincomputing.com>
Reviewed-b

build: ta: add RISC-V linker script

Sort out the common code compiled by TA,
abstract RISCV and ARM compile the common part of TA.

Signed-off-by: liushiwei <liushiwei@eswincomputing.com>
Reviewed-by: chenchaokai <chenchaokai@eswincomputing.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>

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libutee: increase MPI_MEMPOOL_SIZE to 14Kb

With the Widevine v17/v18 OPKs using their new Provisioning 4.0
technique, this pool size needs to be increased to 14Kb from 12Kb.

The sequence that is be

libutee: increase MPI_MEMPOOL_SIZE to 14Kb

With the Widevine v17/v18 OPKs using their new Provisioning 4.0
technique, this pool size needs to be increased to 14Kb from 12Kb.

The sequence that is being executed that requires this is as follows:
1. TEE_GenerateKey(key_handle, 2048, NULL, 0)
2. TEE_GetObjectBufferAttribute(key, TEE_ATTR_RSA_MODULUS,
modulus_data, &modulus_len),
same for TEE_ATTR_RSA_PUBLIC_EXPONENT and
TEE_ATTR_RSA_PRIVATE_EXPONENT.
3. mbedtls_rsa_complete() on a pk object created from the extracted
modulus, public exp and private exp.

Signed-off-by: Jeffrey Kardatzke <jkardatzke@google.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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libutee: add TEE_ALG_ECDSA_SHA* to TEE_ALG_GET_DIGEST_SIZE()

The TEE_ALG_GET_DIGEST_SIZE() macro lacks the ECDSA algorithms. Add
them.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>

libutee: add TEE_ALG_ECDSA_SHA* to TEE_ALG_GET_DIGEST_SIZE()

The TEE_ALG_GET_DIGEST_SIZE() macro lacks the ECDSA algorithms. Add
them.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: pta: imx: add manufacturing protection

Add the i.MX PTA to expose CAAM manufacturing protection features:
* Get manufacturing protection public key.
* Get manufacturing protection message.

core: pta: imx: add manufacturing protection

Add the i.MX PTA to expose CAAM manufacturing protection features:
* Get manufacturing protection public key.
* Get manufacturing protection message.
* Message signature with manufacturing protection private key.

Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com>
Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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core: crypto: add support MD5 hashes in RSA sign/verify/cipher

Introduce support of using MD5 hashes in RSA sign/verify/cipher
operations, which is required by AOSP Keymaster.

This is verified in

core: crypto: add support MD5 hashes in RSA sign/verify/cipher

Introduce support of using MD5 hashes in RSA sign/verify/cipher
operations, which is required by AOSP Keymaster.

This is verified in VerificationOperationsTest.RsaSuccess VTS Test [1],
which checks usage of such digests: NONE, MD5, SHA1, SHA_2_224, SHA_2_256,
SHA_2_384, SHA_2_512.

This patch has been inspired by commit[2]:

Link: [1] https://android.googlesource.com/platform/hardware/interfaces/+/master/keymaster/3.0/vts/functional/keymaster_hidl_hal_test.cpp
Link: [2] https://github.com/OP-TEE/optee_os/commit/199d0b7310d1705661a106358f1f0b46e4c5c587 ("core: crypto: add support MD5 hashes in RSA sign/verify")
Signed-off-by: Julien Masson <jmasson@baylibre.com>
Signed-off-by: Safae Ouajih <souajih@baylibre.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

show more ...