| bdde1c99 | 18-Mar-2024 |
Etienne Carriere <etienne.carriere@foss.st.com> |
drivers: stm32_i2c: protect bus access with a mutex
Protect concurrent accesses to an STM32 I2C bus with a PM aware mutex.
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by:
drivers: stm32_i2c: protect bus access with a mutex
Protect concurrent accesses to an STM32 I2C bus with a PM aware mutex.
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| c80790fe | 12-Mar-2024 |
Etienne Carriere <etienne.carriere@foss.st.com> |
drivers: regulator: use mutex_pm_aware
Use newly introduced struct mutex_pm_aware semaphore to protect regulator accesses.
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Eti
drivers: regulator: use mutex_pm_aware
Use newly introduced struct mutex_pm_aware semaphore to protect regulator accesses.
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 9a3248fc | 29-Feb-2024 |
Etienne Carriere <etienne.carriere@foss.st.com> |
drivers: clk: replace clock main spinlock with a mutex
Change clock framework lock from an interrupts masked spinning lock to a mutex. This allows the clock framework to better handle slow stabilizi
drivers: clk: replace clock main spinlock with a mutex
Change clock framework lock from an interrupts masked spinning lock to a mutex. This allows the clock framework to better handle slow stabilizing clocks as PLLs without masking the system interrupt which can have side effects on the REE or even the TEE.
To support clock accesses during low power state transition sequences while non-secure world is no operating, the lock is not taken when the execution is not in the scope of a TEE thread.
This change is not expected to impact supported platforms that currently only access clock operation from thread contexts or atomic PM sequences.
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| b4d1c08a | 30-Jan-2024 |
Patrick Delaunay <patrick.delaunay@foss.st.com> |
drivers: regulator: do not cache voltage level value
Always read current voltage level from the device instead of caching the level in struct regulator. This fixes issues for when the regulator leve
drivers: regulator: do not cache voltage level value
Always read current voltage level from the device instead of caching the level in struct regulator. This fixes issues for when the regulator level value depends on the parent regulator (supply). It is up the regulator drivers to cache or not this value in their private data if applicable.
Fixes: 1a3d3273040b ("drivers: regulator framework") Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 458ef442 | 21-Feb-2024 |
Alvin Chang <alvinga@andestech.com> |
drivers: Implement semihosting based console driver for log
Implement a simple console driver which uses semihosting operations to read/write the trace messages. There are two paths to output the tr
drivers: Implement semihosting based console driver for log
Implement a simple console driver which uses semihosting operations to read/write the trace messages. There are two paths to output the trace messages: - If the caller of semihosting_console_init() provides the path of the file, the driver will try to open that file, and output the log to that host side file. - If the caller of semihosting_console_init() does not provide the path of the file, the driver will connect the console to the host debug console directly.
If CFG_SEMIHOSTING_CONSOLE is enabled, OP-TEE will try to initialize the semihosting console driver by given CFG_SEMIHOSTING_CONSOLE_FILE.
Signed-off-by: Alvin Chang <alvinga@andestech.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| f8c1dacb | 22-Feb-2024 |
Etienne Carriere <etienne.carriere@foss.st.com> |
drivers: clk: make API function description more consistent
Change inline description comments of clock framework API functions, macros and structures to be more consistent.
Reviewed-by: Gatien Che
drivers: clk: make API function description more consistent
Change inline description comments of clock framework API functions, macros and structures to be more consistent.
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 8baaac1c | 26-Jan-2024 |
Etienne Carriere <etienne.carriere@foss.st.com> |
drivers: clk: pre-enable new parent on clock re-parent
Add new clock flag CLK_SET_PARENT_PRE_ENABLE for when an already enabled clock is re-parented and the new parent clock must be enabled before w
drivers: clk: pre-enable new parent on clock re-parent
Add new clock flag CLK_SET_PARENT_PRE_ENABLE for when an already enabled clock is re-parented and the new parent clock must be enabled before we switch of parents.
This is needed for some system clocks that cannot be disabled, for example an interconnect AXI bus clock or a CPU clock.
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com> Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
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| 8fbc0056 | 26-Jan-2024 |
Etienne Carriere <etienne.carriere@foss.st.com> |
drivers: clk: get linear rates description
Implement clk_get_rates_steps() clock API function to get the supported clock rates description as a triplet min/max/step. This function can be used in the
drivers: clk: get linear rates description
Implement clk_get_rates_steps() clock API function to get the supported clock rates description as a triplet min/max/step. This function can be used in the scope of SCMI communication where a clock can report a linear rate list without listing all supported clock is an array which size could be quite big.
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com> Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
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| 20f97d98 | 26-Jan-2024 |
Etienne Carriere <etienne.carriere@foss.st.com> |
drivers: clk: enable clock on rate change
Add new clock flag CLK_SET_RATE_UNGATE for clocks that must be enabled in order to change their rate.
Reviewed-by: Gatien Chevallier <gatien.chevallier@fos
drivers: clk: enable clock on rate change
Add new clock flag CLK_SET_RATE_UNGATE for clocks that must be enabled in order to change their rate.
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com> Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
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| 0ba7ae74 | 26-Jan-2024 |
Etienne Carriere <etienne.carriere@foss.st.com> |
drivers: clk: change parent clock rate if needed
Add clock flag CLK_SET_RATE_PARENT for clocks for which rate change request must be propagated to the parent clock.
Reviewed-by: Gatien Chevallier <
drivers: clk: change parent clock rate if needed
Add clock flag CLK_SET_RATE_PARENT for clocks for which rate change request must be propagated to the parent clock.
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com> Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
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| 05771552 | 26-Jan-2024 |
Etienne Carriere <etienne.carriere@foss.st.com> |
drivers: clk: Get duty cycle from parent clock
Add CLK_DUTY_CYCLE_PARENT clock flag for clock which duty cycle information needs to be retrieved for the clock parent.
Reviewed-by: Gatien Chevallier
drivers: clk: Get duty cycle from parent clock
Add CLK_DUTY_CYCLE_PARENT clock flag for clock which duty cycle information needs to be retrieved for the clock parent.
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com> Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
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| 59db7f68 | 26-Jan-2024 |
Etienne Carriere <etienne.carriere@foss.st.com> |
drivers: clk: Add clock duty cycle
Implement reading a clock duty cycle with new clock API function clk_get_duty_cycle() and clock operation handle ::clk_get_duty_cycle. When a clock does not provid
drivers: clk: Add clock duty cycle
Implement reading a clock duty cycle with new clock API function clk_get_duty_cycle() and clock operation handle ::clk_get_duty_cycle. When a clock does not provide the operation, it is assumed that the clock has a 50% duty cycle.
Clock duty cycle information is used for example for some analog-digital conversion peripheral. This new API function is also expected to be used by SCMI clock service introduced in the SCMI specification v3.2 [1] this allow to expose duty cycle service to SCMI clients.
Link: https://developer.arm.com/documentation/den0056/e/ [1] Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com> Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com> Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
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| 196cb5a0 | 25-Jan-2024 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
dt-bindings: add RIFSC to default bindings config for STM32MP25
The RIFSC header is now part of default bindings header file for STM32MP25.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.
dt-bindings: add RIFSC to default bindings config for STM32MP25
The RIFSC header is now part of default bindings header file for STM32MP25.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| cd187630 | 25-Jan-2024 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
drivers: add stm32 RIFSC support
Add the RIFSC new driver support.
RIFSC (RIF Security Controller) is responsible for the isolation of hardware resources like memory or peripherals. It is composed
drivers: add stm32 RIFSC support
Add the RIFSC new driver support.
RIFSC (RIF Security Controller) is responsible for the isolation of hardware resources like memory or peripherals. It is composed of:
-RISC registers(slave peripherals) with RISUP(Resource Isolation Slave Unit for Peripherals) OR RISAL(Resource Isolation Slave Unit for Address space - Lite) logics. -RIMC registers(Non RIF-Aware masters counterpart) with RIMU (Resource Isolation Master Unit) logic. It is possible for a master to inherit from its slave port(RISUP) configuration.
This driver parses the RIFSC device tree configuration and applies it to put the firewall in place. Therefore, the device tree is mandatory.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Lionel Debieve <lionel.debieve@st.com> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 0179d5f8 | 25-Jan-2024 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
dt-bindings: add RIF to default bindings config for stm32mp25
Add a list of default bindings for STM32MP25 platforms.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: E
dt-bindings: add RIF to default bindings config for stm32mp25
Add a list of default bindings for STM32MP25 platforms.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 1506f47a | 25-Jan-2024 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
drivers: firewall: add stm32_rif driver for common RIF features
The resource isolation framework (RIF) is a comprehensive set of hardware blocks designed to enforce and manage the isolation of STM32
drivers: firewall: add stm32_rif driver for common RIF features
The resource isolation framework (RIF) is a comprehensive set of hardware blocks designed to enforce and manage the isolation of STM32MP25xx hardware resources, like memories and peripherals.
The RIF manages security and privilege levels as well as compartment filtering. Each compartment is identified by a Compartment ID (CID).
Therefore, the access filtering can be, depending on the case: • restricted to none, one or more than one CID • secure-only, non-secure only, or both • privileged-only or privileged/unprivileged • read-only, write-only, or read/write
Add a firewall driver folder that contains firewall drivers. This RIF driver contains generic features shared between all drivers managing RIF configuration.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| e934bfa4 | 02-Feb-2024 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: serial: add rx_intr_{enable,disable}() callbacks
Add optional callbacks to enable and disable receive interrupts from a serial device.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org
core: serial: add rx_intr_{enable,disable}() callbacks
Add optional callbacks to enable and disable receive interrupts from a serial device.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
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| d557d174 | 15-Jan-2024 |
Tony Han <tony.han@microchip.com> |
drivers: atmel_rstc: add the function to control sama7g5's USB reset
In sama7g5, USB POR is controlled by register RSTC_GRSTR.
Signed-off-by: Tony Han <tony.han@microchip.com> Acked-by: Jerome Fori
drivers: atmel_rstc: add the function to control sama7g5's USB reset
In sama7g5, USB POR is controlled by register RSTC_GRSTR.
Signed-off-by: Tony Han <tony.han@microchip.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| e07f9212 | 19-Dec-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
plat-stm32mp1: shared_resource: disable MCKPROT if not needed
Disable RCC MCKPROT if not needed on STM32MP15 platforms to allow non-secure world to control Cortex-M coprocessor. This change is neede
plat-stm32mp1: shared_resource: disable MCKPROT if not needed
Disable RCC MCKPROT if not needed on STM32MP15 platforms to allow non-secure world to control Cortex-M coprocessor. This change is needed when RCC secure hardening is enabled (RCC[TZEN] control bit) as it also default enable RCC MCKPROT preventing non-secure world from accessing some coprocessor SoC resources.
This change is needed when using in tree DTS files stm32mp15*-*-scmi.dts and non-secure world is in charge of loading and managing the remote processor firmware.
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 5395fe89 | 11-Jan-2024 |
Etienne Carriere <etienne.carriere@foss.st.com> |
drivers: i2c: add missing __unused in stubbed function
Fix statc inline stub implementation of i2c_dt_get_dev() that lacks a __unused attribute on an unused argument.
Fixes: b357d34fe91f ("core: dt
drivers: i2c: add missing __unused in stubbed function
Fix statc inline stub implementation of i2c_dt_get_dev() that lacks a __unused attribute on an unused argument.
Fixes: b357d34fe91f ("core: dt_driver: swap TEE_result and retrieved device reference") Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 515c1ba9 | 22-Mar-2023 |
Clément Léger <clement.leger@bootlin.com> |
drivers: nvmem: add API for nvmem controllers
Add a nvmem API to access nvmem cells using device-tree description. This API allows to register nvmeme provider and obtain nvmem cells for consumer. Mu
drivers: nvmem: add API for nvmem controllers
Add a nvmem API to access nvmem cells using device-tree description. This API allows to register nvmeme provider and obtain nvmem cells for consumer. Much like other subsystem, this one relies on the generic dt_driver mechanism.
Signed-off-by: Clément Léger <clement.leger@bootlin.com> Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| ec797732 | 18-Dec-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
drivers: stm32_iwdg: remove stm32_iwdg_refresh()
Remove unused stm32_iwdg_refresh() intended to refresh all registered watchdog devices.
Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Rev
drivers: stm32_iwdg: remove stm32_iwdg_refresh()
Remove unused stm32_iwdg_refresh() intended to refresh all registered watchdog devices.
Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 23cbf81f | 18-Dec-2023 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
drivers: clk_dt: include missing clk.h header file
clk resources are used in this file. Add missing include.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Acked-by: Jerome Foriss
drivers: clk_dt: include missing clk.h header file
clk resources are used in this file. Add missing include.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 5a2d2237 | 07-Sep-2023 |
Arnaud Pouliquen <arnaud.pouliquen@foss.st.com> |
drivers: Add stm32mp1 remoteproc driver
This driver is responsible for configuring the registers and memories of the remote processor. - It stores information about memories assigned to the remote p
drivers: Add stm32mp1 remoteproc driver
This driver is responsible for configuring the registers and memories of the remote processor. - It stores information about memories assigned to the remote processor based on the device tree. - It ensures consistency between the registered memory and the addresses of the firmware segments to be loaded. - Additionally, it is responsible for starting and stopping the remote processor core.
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
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| fc4adc66 | 22-Nov-2023 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: remove unused deprecated gic_cpu_init()
Remove the unused deprecated function gic_cpu_init().
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.
core: remove unused deprecated gic_cpu_init()
Remove the unused deprecated function gic_cpu_init().
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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