tzc380: export more api

Introduce tzc_security_inversion_en tzc_enable_region tzc_fail_dump and
tzc_int_clear.

When we want to block secure access to region configured TZC_ATTR_SP_NS_RW,
need to us

tzc380: export more api

Introduce tzc_security_inversion_en tzc_enable_region tzc_fail_dump and
tzc_int_clear.

When we want to block secure access to region configured TZC_ATTR_SP_NS_RW,
need to use tzc_security_inversion_en.

Sometimes we need to configure the regions first, then enable the
region.

tzasc380 interrupt could be enabled to catch some illegal access
with tzc_fail_dump and tzc_int_clear.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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tzc380: do not write reserved bits

For region0, only SP is configurable, so should not configure
region low/high.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander

tzc380: do not write reserved bits

For region0, only SP is configurable, so should not configure
region low/high.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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Remove 'All rights reserved' from Linaro files

The text 'All rights reserved' is useless [1]. The Free Software
Foundation's REUSE Initiative best practices document [2] does not
contain these words

Remove 'All rights reserved' from Linaro files

The text 'All rights reserved' is useless [1]. The Free Software
Foundation's REUSE Initiative best practices document [2] does not
contain these words. Therefore, we can safely remove the text from the
files that are owned by Linaro.

Generated by:
spdxify.py --linaro-only --strip-arr optee_os/

Link: [1] https://en.wikipedia.org/wiki/All_rights_reserved
Link: [2] https://reuse.software/practices/
Link: [3] https://github.com/jforissier/misc/blob/f7b56c8/spdxify.py
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Joakim Bech <joakim.bech@linaro.org>

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Remove license notice from Linaro files

Now that we have added SPDX identifiers, we can safely remove the
verbose license text from the files that are owned by Linaro.

Generated by [1]:
spdxify.p

Remove license notice from Linaro files

Now that we have added SPDX identifiers, we can safely remove the
verbose license text from the files that are owned by Linaro.

Generated by [1]:
spdxify.py --linaro-only --strip-license-text optee_os/

Link: [1] https://github.com/jforissier/misc/blob/f7b56c8/spdxify.py
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Joakim Bech <joakim.bech@linaro.org>

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Add SPDX license identifiers

Adds one SPDX-License-Identifier line [1] to each source files that
contains license text.

Generated by [2]:
spdxify.py --add-spdx optee_os/

The scancode tool [3] wa

Add SPDX license identifiers

Adds one SPDX-License-Identifier line [1] to each source files that
contains license text.

Generated by [2]:
spdxify.py --add-spdx optee_os/

The scancode tool [3] was used to double check the license matching
code in the Python script. All the licenses detected by scancode are
either detected by spdxify.py, or have no SPDX identifier, or are false
matches.

Link: [1] https://spdx.org/licenses/
Link: [2] https://github.com/jforissier/misc/blob/f7b56c8/spdxify.py
Link: [3] https://github.com/nexB/scancode-toolkit
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Joakim Bech <joakim.bech@linaro.org>

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plat-marvell: Add initial support for ARMADA3700

Only test 64bit mode with default configuration

1. Build command
make PLATFORM=marvell-armada3700
2. Pass xtest

Signed-off-by: wangwen <wangwen

plat-marvell: Add initial support for ARMADA3700

Only test 64bit mode with default configuration

1. Build command
make PLATFORM=marvell-armada3700
2. Pass xtest

Signed-off-by: wangwen <wangwen@marvell.comi>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Kevin Peng <kevinp@marvell.com>

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core: fix gic_init() prototype

Prior to this patch gic_init() incorrectly had paddr_t as type for the
GIC base addresses while the implementation used vaddr_t. The correct
type is vaddr_t which we'r

core: fix gic_init() prototype

Prior to this patch gic_init() incorrectly had paddr_t as type for the
GIC base addresses while the implementation used vaddr_t. The correct
type is vaddr_t which we're changing to here.

Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: drivers: add imx wdog support

Introducing the wdog support is for psci reset usage.
To i.MX6/7, when `reboot`, need wdog to trigger soc reset
or send out signal to pmic through wdog pin to tri

core: drivers: add imx wdog support

Introducing the wdog support is for psci reset usage.
To i.MX6/7, when `reboot`, need wdog to trigger soc reset
or send out signal to pmic through wdog pin to trigger pmic reset.

In linux device tree, there is a "fsl,ext-reset-output" property, this
driver is to check whether the wdog node contains the property or not,
then decide how to trigger reset.

We still rely on normal world to initialize wdog and configure pinmux
when need to trigger pmic reset.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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TUI: remove frame buffer

Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

TUI: remove ps2mouse

Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

TUI: remove clcd pl111

Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

TUI: remove PL050

Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

plat-sam: Add support for Atmel-Microchip SAMA5D2-XULT board

Add basic support to get op-tee to run on SAMA5D2-XULT board.

The SoC is based on single core ARM Cortex-A5 and supports:
ARM TrustZone

plat-sam: Add support for Atmel-Microchip SAMA5D2-XULT board

Add basic support to get op-tee to run on SAMA5D2-XULT board.

The SoC is based on single core ARM Cortex-A5 and supports:
ARM TrustZone with support for configuring memory/peripherals as secure
Secure RTC
Secure boot
On-the-fly encryption/decryption of DDR bus
Tamper protection

Link: http://www.atmel.com/Images/Atmel-11267-32-bit-Cortex-A5-Microcontroller-SAMA5D2_Datasheet.pdf
Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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drivers: add snvs srtc support

Introduce i.MX SNVS SRTC support. The SRTC works with 32.768KHz.
The SRTC is in SNVS_LP domain. The SNVS_LP is a data storage
subsystem with enhanced security capabili

drivers: add snvs srtc support

Introduce i.MX SNVS SRTC support. The SRTC works with 32.768KHz.
The SRTC is in SNVS_LP domain. The SNVS_LP is a data storage
subsystem with enhanced security capabilities. Its purpose is to store
and protect system data, regardless of the main system power state.
SNVS_LP is in the always-powered-up domain, which is a separate power
domain with its own power supply. When the chip power supply domain
loses power, SNVS_LP continues to operate normally.

Since OP-TEE does not care about calendar time, there is no need
to update calendar time, we only need to read the counter and
get out the time.

The plat_prng_add_jitter_entropy is reused from tee_time_arm_cntpct.c.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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drivers: tzc380: add tzc380 driver

Add tzc380 driver support.

The usage:
Use tzc_init(vaddr_t base) to get the tzc380 configuration.
Use tzc_configure_region to configure the memory region,
such as

drivers: tzc380: add tzc380 driver

Add tzc380 driver support.

The usage:
Use tzc_init(vaddr_t base) to get the tzc380 configuration.
Use tzc_configure_region to configure the memory region,
such as "tzc_configure_region(5, 0x4e000000,
TZC_ATTR_REGION_SIZE(TZC_REGION_SIZE_32M) | TZC_ATTR_REGION_EN_MASK |
TZC_ATTR_SP_S_RW);"

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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pl011: dt: Add DT support

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro

pl011: dt: Add DT support

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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dt: Introduce struct serial_driver

Add struct serial_driver which will be useful to UART drivers that
want to create devices from a DT node.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro

dt: Introduce struct serial_driver

Add struct serial_driver which will be useful to UART drivers that
want to create devices from a DT node.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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drivers: scif: enable TX during initialization

Newer version of TF disables TX and RX modules of SCIF before
jumping to OP-TEE. We need to enable TX back.

Signed-off-by: Volodymyr Babchuk <vlad.bab

drivers: scif: enable TX during initialization

Newer version of TF disables TX and RX modules of SCIF before
jumping to OP-TEE. We need to enable TX back.

Signed-off-by: Volodymyr Babchuk <vlad.babchuk@gmail.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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core: move plat-stm consoles to generic console framework

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>

core: move stih UART driver to the drivers/ directory

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>

drivers: convert scif_uart driver to use struct serial_chip

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne

drivers: convert scif_uart driver to use struct serial_chip

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: convert ns16550 driver to use struct serial_chip

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne C

drivers: convert ns16550 driver to use struct serial_chip

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: convert sunxi_uart driver to use struct serial_chip

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienn

drivers: convert sunxi_uart driver to use struct serial_chip

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: convert sprd_uart driver to use struct serial_chip

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne

drivers: convert sprd_uart driver to use struct serial_chip

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: convert serial8250_uart driver to use struct serial_chip

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: E

drivers: convert serial8250_uart driver to use struct serial_chip

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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