stm32_bsec: always embed shadow OTPs write function

Change the scope of configuration switch CFG_STM32_BSEC_WRITE to
not cover shadow OTP write support. CFG_STM32_BSEC_WRITE is used
to embed or not

stm32_bsec: always embed shadow OTPs write function

Change the scope of configuration switch CFG_STM32_BSEC_WRITE to
not cover shadow OTP write support. CFG_STM32_BSEC_WRITE is used
to embed or not OTP programming support but writing shadow OTPs
is a normal executing an OTP read operation hence this change
embeds stm32_bsec_write_otp() driver API function even when
CFG_STM32_BSEC_WRITE is disabled.

Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
[etienne: rephrase commit log]
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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drivers: imx_i2c: add I2C support

This driver provides native access to the I2C bus on iMX.

The driver will not query the clock hierarchy - to find the base clock
rate - because it overcomplicates

drivers: imx_i2c: add I2C support

This driver provides native access to the I2C bus on iMX.

The driver will not query the clock hierarchy - to find the base clock
rate - because it overcomplicates the deliverable for not much added
value (this can be done at a later time if required).

The U-Boot and Linux GPL code was initially used as a reference;
however due to the simpler OP-TEE use case requirements, the code was
later re-written following the reference manual [1].

This driver will not access addresses within a I2C slave map.

This driver must not be used while the Linux kernel is running unless
the following is guaranteed:
- that the I2C bus will not be suspended.
- that there will not be collisions with other bus masters.

Without those guarantees, please use a trampoline driver to route the
I2C requests to Linux.

Tested on imx8mm-lpddr4.

[1] i.MX 8M Mini Applications Processor Reference Manual
Document Number: IMX8MMMRM
Rev.2 08/2019

Tested-by: Jorge Ramirez-Ortiz <jorge@foundries.io> (imx8mm)
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Reviewed-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jerome Forissier <jerome@forissier.org>

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tzc400: simplify tzc_configure_region() arguments

Change tzc_configure_region() to used the newly defined structure
tzc_region_config.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

tzc400: simplify tzc_configure_region() arguments

Change tzc_configure_region() to used the newly defined structure
tzc_region_config.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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tzc400: new api functions to print violation on device interrupt

Define new API function tzc_fail_dump() in TZC400 driver to print
a friendly trace when a failure is reported by the TZC400.

Define

tzc400: new api functions to print violation on device interrupt

Define new API function tzc_fail_dump() in TZC400 driver to print
a friendly trace when a failure is reported by the TZC400.

Define new API function tzc_int_clear() to clear the TZC400 interrupt
status.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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tzc400: add API functions to get firewall configuration

This change modified TZC400 driver to export functions for a platform
to get memory region configuration.

On platform running OP-TEE from a s

tzc400: add API functions to get firewall configuration

This change modified TZC400 driver to export functions for a platform
to get memory region configuration.

On platform running OP-TEE from a secure DRAM protected from a TZC400
device, OP-TEE Core cannot reconfigure TZC400 for the region is executes
into. The new driver API functions allows such platform at least to
check that TZC400 configuration matches the configuration Core is
statically built with.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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drivers: stm32_i2c: fixup typo in sec_cfg field description

Fixup typo in i2c_cfg::sec_cfg description inline comment.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Acked-by: Jerome For

drivers: stm32_i2c: fixup typo in sec_cfg field description

Fixup typo in i2c_cfg::sec_cfg description inline comment.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Acked-by: Jerome Forissier <jerome@forissier.org>

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drivers: stm32_i2c: allow any bus frequency

Do not limit I2C bus to 3 frequencies (100KHz, 400KHz, 1MHz). Instead
allow for any frequency up to 1MHz. Depending on the requested frequency
defined in

drivers: stm32_i2c: allow any bus frequency

Do not limit I2C bus to 3 frequencies (100KHz, 400KHz, 1MHz). Instead
allow for any frequency up to 1MHz. Depending on the requested frequency
defined in clock-frequency DT entry, use the I2C spec data from either
Standard, Fast or Fast Plus mode.

This change removes use of rate IDs and use instead the rate value
itself as identifiers, allowing more flexible implementation.

Changes local variable clock_src in i2c_setup_timing() from uint32_t
to unsigned long for consistency.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Acked-by: Jerome Forissier <jerome@forissier.org>

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drivers: stm32_i2c: don't recompute I2C timings setting

Save I2C timing configuration when computed and reused it when
needing the same frequency later on.

Signed-off-by: Etienne Carriere <etienne.

drivers: stm32_i2c: don't recompute I2C timings setting

Save I2C timing configuration when computed and reused it when
needing the same frequency later on.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Acked-by: Jerome Forissier <jerome@forissier.org>

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core: scmi-msg: minor cleanup

Remove useless local headers file inclusion as "common.h" is included.
Remove a useless inclusion of speculation_barrier.h.
Use BIT() in clock.h.
Refine inline descript

core: scmi-msg: minor cleanup

Remove useless local headers file inclusion as "common.h" is included.
Remove a useless inclusion of speculation_barrier.h.
Use BIT() in clock.h.
Refine inline description of scmi_msg_channel::agent_name in scmi-msg.h.
Fix typo in scmi_smt_fastcall_smc_entry() description inline comment.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jerome Forissier <jerome@forissier.org>

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stpmic1: fix boot-on minimal voltage

Change stpmic1_bo_voltage_cfg() to highlight voltage argument is
a minimal desired boot-on voltage requirement, not an absolute
voltage requested at boot-on, as

stpmic1: fix boot-on minimal voltage

Change stpmic1_bo_voltage_cfg() to highlight voltage argument is
a minimal desired boot-on voltage requirement, not an absolute
voltage requested at boot-on, as per DT binding property .

stpmic1_bo_voltage_unpg() that applies boot-on voltage is updated
to not lower current voltage if above min voltage constraint.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jerome Forissier <jerome@forissier.org>

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stpmic1: relax PMIC control API functions

Return an error if requested to save Low Power regulator data
if there is no Low Power control defined. This changes
stpmic1_lp_cfg(), stpmic1_lp_reg_on_off

stpmic1: relax PMIC control API functions

Return an error if requested to save Low Power regulator data
if there is no Low Power control defined. This changes
stpmic1_lp_cfg(), stpmic1_lp_reg_on_off() and stpmic1_lp_copy_reg()
to return with a error if regulator does not support Low Power config.

Add helper function to stpmic1_regu_has_lp_cfg() to return if a
regulator defines Low Power configuration.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jerome Forissier <jerome@forissier.org>

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stpmic1: add stpmic1_bo_enable_cfg() to save boot-on config

Add a helper stpmic1_bo_enable_cfg() to save the minimal regulator
data needed to operate at least the boot-on constraint: control on
enab

stpmic1: add stpmic1_bo_enable_cfg() to save boot-on config

Add a helper stpmic1_bo_enable_cfg() to save the minimal regulator
data needed to operate at least the boot-on constraint: control on
enable/disable support: control register offset and bit position.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jerome Forissier <jerome@forissier.org>

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stpmic1: describe 5V fixed regulators

Describe regulators boost, pwr_sw1 and pwr_sw2 that are gated 5V fixed
regulators.

These regulators have not reset mask support hence change
stpmic1_regulator_

stpmic1: describe 5V fixed regulators

Describe regulators boost, pwr_sw1 and pwr_sw2 that are gated 5V fixed
regulators.

These regulators have not reset mask support hence change
stpmic1_regulator_mask_reset_set() to fail accordingly.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jerome Forissier <jerome@forissier.org>

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stpmic1: refine resources helper macros

Define bit fields in position xxx_POS rather than in bit mask.
Use BIT() and GENMASK_32() rather than numerical values.

Signed-off-by: Etienne Carriere <etie

stpmic1: refine resources helper macros

Define bit fields in position xxx_POS rather than in bit mask.
Use BIT() and GENMASK_32() rather than numerical values.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jerome Forissier <jerome@forissier.org>

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stpmic1: save enable bit position in regulator control

Add enable bit position info in STPMIC1 regulators description
instead of assuming it is BIT(0). This allows to define other
regulators with en

stpmic1: save enable bit position in regulator control

Add enable bit position info in STPMIC1 regulators description
instead of assuming it is BIT(0). This allows to define other
regulators with enable bit not at position 0.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jerome Forissier <jerome@forissier.org>

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stpmic1: stpmic1_is_regulator_enabled() returns a boolean

Change helper function stpmic1_is_regulator_enabled() to return
a boolean value.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.o

stpmic1: stpmic1_is_regulator_enabled() returns a boolean

Change helper function stpmic1_is_regulator_enabled() to return
a boolean value.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jerome Forissier <jerome@forissier.org>

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stm32_bsec: introduce configuration switch for write support

Introduce configuration switch CFG_STM32_BSEC_WRITE to not embed
write operation support in BSEC.

Signed-off-by: Etienne Carriere <etien

stm32_bsec: introduce configuration switch for write support

Introduce configuration switch CFG_STM32_BSEC_WRITE to not embed
write operation support in BSEC.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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stm32_bsec: simplify lock support functions

Change stm32_bsec_otp_lock() to only lock fuses as hardware safely does
not allow unlocking a locked BSEC word.

Functions to read a lock return a TEE_Res

stm32_bsec: simplify lock support functions

Change stm32_bsec_otp_lock() to only lock fuses as hardware safely does
not allow unlocking a locked BSEC word.

Functions to read a lock return a TEE_Result status aside from the
effective lock value read.

Rename stm32_bsec_wr_lock() into stm32_bsec_read_permanent_lock()
as it is more explicit.

Change IMSG() into DMSG() as traces refer to debug info rather than
informative info.

Use flag character '#' to prefix printed hexadecimal values with "0x".

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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drivers/scmi-msg: smt entry points for incoming messages

This change implements SCMI channels for reading a SCMI message from a
shared memory and call the SCMI message drivers to route the message
t

drivers/scmi-msg: smt entry points for incoming messages

This change implements SCMI channels for reading a SCMI message from a
shared memory and call the SCMI message drivers to route the message
to the target platform services.

SMT refers to the shared memory management protocol which is used
to get/put message/response in shared memory. SMT is a 28byte header
stating shared memory state and exchanged protocol data.

The processing entry for a SCMI message can be a secure interrupt
(CFG_SCMI_MSG_SMT_INTERRUPT_ENTRY=y), and fastcall SMC
(CFG_SCMI_MSG_SMT_FASTCALL_ENTRY=y) or a threaded execution
context entry (CFG_SCMI_MSG_SMT_THREAD_ENTRY=y).

SMT description in this implementation is based on the SCP-firmware
implementation [1].

Link: [1] https://github.com/ARM-software/SCP-firmware.git

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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drivers/scmi-msg: support for reset domain protocol

Adds SCMI reset domain protocol support in the SCMI message drivers
as defined in SCMI specification v2.0 [1]. Not all the messages
defined in the

drivers/scmi-msg: support for reset domain protocol

Adds SCMI reset domain protocol support in the SCMI message drivers
as defined in SCMI specification v2.0 [1]. Not all the messages
defined in the specification are supported.

Embedded upon CFG_SCMI_MSG_RESET_DOMAIN=y.

scmi_msg_get_rd_handler() sanitizes the message_id value
against any speculative use of reset domain ID as a index since by
SCMI specification, IDs are indices.

SCMI resource in this implementation are dumped or inspired by the
SCP-firmware implementation [2] of the SCMI protocol, server side.

Link: [1] http://infocenter.arm.com/help/topic/com.arm.doc.den0056a/DEN0056A_System_Control_and_Management_Interface.pdf
Link: [2] https://github.com/ARM-software/SCP-firmware.git

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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drivers/scmi-msg: support for clock protocol

Adds SCMI clock protocol support in the SCMI message drivers as
defined in SCMI specification v2.0 [1]. Not all the messages
defined in the specification

drivers/scmi-msg: support for clock protocol

Adds SCMI clock protocol support in the SCMI message drivers as
defined in SCMI specification v2.0 [1]. Not all the messages
defined in the specification are supported.

Embedded upon CFG_SCMI_MSG_CLOCK=y.

Platform can provide one of the plat_scmi_clock_*() handler for the
supported operations set/get state/rate and others.

scmi_msg_get_clock_handler() sanitizes the message_id value
against any speculative use of clock ID as a index since by
SCMI specification, IDs are indices.

SCMI resource in this implementation are dumped or inspired by the
SCP-firmware implementation [2] of the SCMI protocol, server side.

Link: [1] http://infocenter.arm.com/help/topic/com.arm.doc.den0056a/DEN0056A_System_Control_and_Management_Interface.pdf
Link: [2] https://github.com/ARM-software/SCP-firmware.git

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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drivers/scmi-msg: driver for processing scmi messages

This change introduces drivers to allow a platform to create a SCMI
service and register handlers for client request (SCMI agent) on
system reso

drivers/scmi-msg: driver for processing scmi messages

This change introduces drivers to allow a platform to create a SCMI
service and register handlers for client request (SCMI agent) on
system resources. This is the first piece of the drivers: an entry
function, the SCMI base protocol support and helpers for create
the response message.

With this change, scmi_process_message() is the entry function to
process an incoming SCMI message. The function expect the message
is already copied from shared memory into secure memory. The message
structure stores message reference and output buffer reference where
response message shall be stored.

scmi_process_message() calls the SCMI protocol driver according to
the protocol ID in the message. The SCMI protocol driver will call
defined platform handlers according to the message content.

This change introduces only the SCMI base protocol as defined in
SCMI specification v2.0 [1]. Not all the messages defined
in the specification are supported.

SCMI resource in this implementation are dumped or inspired by the
SCP-firmware implementation [2] of the SCMI protocol, server side.

Link: [1] http://infocenter.arm.com/help/topic/com.arm.doc.den0056a/DEN0056A_System_Control_and_Management_Interface.pdf
Link: [2] https://github.com/ARM-software/SCP-firmware.git

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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imx: snvs: rework snvs driver

Remove the unused SRTC functionality which is not wired up anywhere.
Instead add a function to read the device configuration and system
security monitor instead.

Signe

imx: snvs: rework snvs driver

Remove the unused SRTC functionality which is not wired up anywhere.
Instead add a function to read the device configuration and system
security monitor instead.

Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Cedric Neveux <cedric.neveux@nxp.com>

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tzc380: add function to lockdown regions

The TZC380 allows a lockdown of the region configuration to prevent
unintended or malicious configuration changes. Add a function which
locks down all region

tzc380: add function to lockdown regions

The TZC380 allows a lockdown of the region configuration to prevent
unintended or malicious configuration changes. Add a function which
locks down all regions of the current configuration

Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de>
Reviewed-by: Clement Faure <clement.faure@nxp.com>

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drivers: tzc: set maximum region size for tzc_auto_configure()

According to the TZC380 documentation, the AXI address width controls
the upper limit value of the region size.
This fix makes sure tha

drivers: tzc: set maximum region size for tzc_auto_configure()

According to the TZC380 documentation, the AXI address width controls
the upper limit value of the region size.
This fix makes sure that tzc_auto_configure() function will not
allocated a region bigger that the AXI address width.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Reviewed-by: Rouven Czerwinski <r.czerwinski@pengutronix.de>

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