xref: /optee_os/core/arch/arm/plat-imx/conf.mk (revision dd13645c6b54468b71290023a91fa4c3f79bc876) 
1PLATFORM_FLAVOR ?= mx6ulevk
2
3# Get SoC associated with the PLATFORM_FLAVOR
4mx6ul-flavorlist = \
5	mx6ulevk \
6	mx6ul9x9evk \
7	mx6ulccimx6ulsbcpro \
8
9mx6ull-flavorlist = \
10	mx6ullevk \
11
12mx6q-flavorlist = \
13	mx6qsabrelite \
14	mx6qsabreauto \
15	mx6qsabresd \
16	mx6qhmbedge \
17	mx6qapalis \
18
19mx6qp-flavorlist = \
20	mx6qpsabreauto \
21	mx6qpsabresd \
22
23mx6sl-flavorlist = \
24	mx6slevk
25
26mx6sll-flavorlist = \
27	mx6sllevk
28
29mx6sx-flavorlist = \
30	mx6sxsabreauto \
31	mx6sxsabresd \
32	mx6sxudooneofull \
33
34mx6d-flavorlist = \
35	mx6dhmbedge \
36	mx6dapalis \
37
38mx6dl-flavorlist = \
39	mx6dlsabreauto \
40	mx6dlsabresd \
41	mx6dlhmbedge \
42
43mx6s-flavorlist = \
44	mx6shmbedge \
45	mx6solosabresd \
46	mx6solosabreauto \
47
48mx7d-flavorlist = \
49	mx7dsabresd \
50	mx7dpico_mbl \
51	mx7dclsom \
52
53mx7s-flavorlist = \
54	mx7swarp7 \
55	mx7swarp7_mbl \
56
57mx7ulp-flavorlist = \
58	mx7ulpevk
59
60mx8mq-flavorlist = \
61	mx8mqevk
62
63mx8mm-flavorlist = \
64	mx8mmevk
65
66mx8mn-flavorlist = \
67	mx8mnevk
68
69mx8qm-flavorlist = \
70	mx8qmmek \
71
72mx8qx-flavorlist = \
73	mx8qxpmek \
74
75ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6ul-flavorlist)))
76$(call force,CFG_MX6,y)
77$(call force,CFG_MX6UL,y)
78$(call force,CFG_TEE_CORE_NB_CORE,1)
79include core/arch/arm/cpu/cortex-a7.mk
80else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6ull-flavorlist)))
81$(call force,CFG_MX6,y)
82$(call force,CFG_MX6ULL,y)
83$(call force,CFG_TEE_CORE_NB_CORE,1)
84$(call force,CFG_IMX_CAAM,n)
85$(call force,CFG_NXP_CAAM,n)
86include core/arch/arm/cpu/cortex-a7.mk
87else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6q-flavorlist)))
88$(call force,CFG_MX6,y)
89$(call force,CFG_MX6Q,y)
90$(call force,CFG_TEE_CORE_NB_CORE,4)
91else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6qp-flavorlist)))
92$(call force,CFG_MX6,y)
93$(call force,CFG_MX6QP,y)
94$(call force,CFG_TEE_CORE_NB_CORE,4)
95else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6d-flavorlist)))
96$(call force,CFG_MX6,y)
97$(call force,CFG_MX6D,y)
98$(call force,CFG_TEE_CORE_NB_CORE,2)
99else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6dl-flavorlist)))
100$(call force,CFG_MX6,y)
101$(call force,CFG_MX6DL,y)
102$(call force,CFG_TEE_CORE_NB_CORE,2)
103else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6s-flavorlist)))
104$(call force,CFG_MX6,y)
105$(call force,CFG_MX6S,y)
106$(call force,CFG_TEE_CORE_NB_CORE,1)
107else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6sl-flavorlist)))
108$(call force,CFG_MX6,y)
109$(call force,CFG_MX6SL,y)
110$(call force,CFG_TEE_CORE_NB_CORE,1)
111$(call force,CFG_IMX_CAAM,n)
112$(call force,CFG_NXP_CAAM,n)
113else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6sll-flavorlist)))
114$(call force,CFG_MX6,y)
115$(call force,CFG_MX6SLL,y)
116$(call force,CFG_TEE_CORE_NB_CORE,1)
117$(call force,CFG_IMX_CAAM,n)
118$(call force,CFG_NXP_CAAM,n)
119else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx6sx-flavorlist)))
120$(call force,CFG_MX6,y)
121$(call force,CFG_MX6SX,y)
122$(call force,CFG_TEE_CORE_NB_CORE,1)
123else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx7s-flavorlist)))
124$(call force,CFG_MX7,y)
125$(call force,CFG_TEE_CORE_NB_CORE,1)
126include core/arch/arm/cpu/cortex-a7.mk
127else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx7d-flavorlist)))
128$(call force,CFG_MX7,y)
129$(call force,CFG_TEE_CORE_NB_CORE,2)
130include core/arch/arm/cpu/cortex-a7.mk
131else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx7ulp-flavorlist)))
132$(call force,CFG_MX7ULP,y)
133$(call force,CFG_TEE_CORE_NB_CORE,1)
134$(call force,CFG_TZC380,n)
135$(call force,CFG_CSU,n)
136$(call force,CFG_NXP_CAAM,n)
137include core/arch/arm/cpu/cortex-a7.mk
138else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8mq-flavorlist)))
139$(call force,CFG_MX8MQ,y)
140$(call force,CFG_ARM64_core,y)
141CFG_IMX_UART ?= y
142CFG_DRAM_BASE ?= 0x40000000
143CFG_TEE_CORE_NB_CORE ?= 4
144else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8mm-flavorlist)))
145$(call force,CFG_MX8MM,y)
146$(call force,CFG_ARM64_core,y)
147CFG_IMX_UART ?= y
148CFG_DRAM_BASE ?= 0x40000000
149CFG_TEE_CORE_NB_CORE ?= 4
150else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8mn-flavorlist)))
151$(call force,CFG_MX8MN,y)
152$(call force,CFG_ARM64_core,y)
153CFG_IMX_UART ?= y
154CFG_DRAM_BASE ?= 0x40000000
155CFG_TEE_CORE_NB_CORE ?= 4
156else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8qm-flavorlist)))
157$(call force,CFG_MX8QM,y)
158$(call force,CFG_ARM64_core,y)
159$(call force,CFG_IMX_SNVS,n)
160CFG_IMX_LPUART ?= y
161CFG_DRAM_BASE ?= 0x80000000
162CFG_TEE_CORE_NB_CORE ?= 6
163$(call force,CFG_NXP_CAAM,n)
164else ifneq (,$(filter $(PLATFORM_FLAVOR),$(mx8qx-flavorlist)))
165$(call force,CFG_MX8QX,y)
166$(call force,CFG_ARM64_core,y)
167CFG_IMX_LPUART ?= y
168CFG_DRAM_BASE ?= 0x80000000
169CFG_TEE_CORE_NB_CORE ?= 4
170$(call force,CFG_NXP_CAAM,n)
171else
172$(error Unsupported PLATFORM_FLAVOR "$(PLATFORM_FLAVOR)")
173endif
174
175ifneq (,$(filter $(PLATFORM_FLAVOR),mx7dsabresd))
176CFG_DDR_SIZE ?= 0x40000000
177CFG_NS_ENTRY_ADDR ?= 0x80800000
178endif
179
180ifneq (,$(filter $(PLATFORM_FLAVOR),mx7dclsom))
181CFG_DDR_SIZE ?= 0x40000000
182CFG_UART_BASE ?= UART1_BASE
183endif
184
185ifneq (,$(filter $(PLATFORM_FLAVOR),mx7dpico_mbl))
186CFG_DDR_SIZE ?= 0x20000000
187CFG_NS_ENTRY_ADDR ?= 0x87800000
188CFG_DT_ADDR ?= 0x83100000
189CFG_UART_BASE ?= UART5_BASE
190CFG_BOOT_SECONDARY_REQUEST ?= n
191CFG_EXTERNAL_DTB_OVERLAY ?= y
192CFG_IMX_WDOG_EXT_RESET ?= y
193endif
194
195ifneq (,$(filter $(PLATFORM_FLAVOR),mx7swarp7))
196CFG_DDR_SIZE ?= 0x20000000
197CFG_NS_ENTRY_ADDR ?= 0x80800000
198CFG_BOOT_SECONDARY_REQUEST ?= n
199endif
200
201ifneq (,$(filter $(PLATFORM_FLAVOR),mx7swarp7_mbl))
202CFG_DDR_SIZE ?= 0x20000000
203CFG_NS_ENTRY_ADDR ?= 0x87800000
204CFG_DT_ADDR ?= 0x83100000
205CFG_BOOT_SECONDARY_REQUEST ?= n
206CFG_EXTERNAL_DTB_OVERLAY = y
207CFG_IMX_WDOG_EXT_RESET = y
208endif
209
210ifneq (,$(filter $(PLATFORM_FLAVOR),mx7ulpevk))
211CFG_DDR_SIZE ?= 0x40000000
212CFG_NS_ENTRY_ADDR ?= 0x60800000
213CFG_UART_BASE ?= UART4_BASE
214endif
215
216ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qpsabresd mx6qsabresd mx6dlsabresd \
217	mx6dlsabrelite mx6dhmbedge mx6dlhmbedge mx6solosabresd \
218	mx6dapalis mx6qapalis))
219CFG_DDR_SIZE ?= 0x40000000
220CFG_NS_ENTRY_ADDR ?= 0x12000000
221endif
222
223ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qpsabreauto mx6qsabreauto \
224	mx6dlsabreauto mx6solosabreauto))
225CFG_DDR_SIZE ?= 0x80000000
226CFG_NS_ENTRY_ADDR ?= 0x12000000
227CFG_UART_BASE ?= UART4_BASE
228endif
229
230ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qhmbedge))
231CFG_DDR_SIZE ?= 0x80000000
232CFG_UART_BASE ?= UART1_BASE
233endif
234
235ifneq (,$(filter $(PLATFORM_FLAVOR),mx6shmbedge))
236CFG_DDR_SIZE ?= 0x40000000
237CFG_NS_ENTRY_ADDR ?= 0x12000000
238endif
239
240ifneq (,$(filter $(PLATFORM_FLAVOR),mx6qsabrelite mx6dlsabrelite))
241CFG_DDR_SIZE ?= 0x40000000
242CFG_NS_ENTRY_ADDR ?= 0x12000000
243CFG_UART_BASE ?= UART2_BASE
244endif
245
246ifneq (,$(filter $(PLATFORM_FLAVOR),mx6slevk))
247CFG_NS_ENTRY_ADDR ?= 0x80800000
248CFG_DDR_SIZE ?= 0x40000000
249endif
250
251ifneq (,$(filter $(PLATFORM_FLAVOR),mx6sllevk))
252CFG_NS_ENTRY_ADDR ?= 0x80800000
253CFG_DDR_SIZE ?= 0x80000000
254endif
255
256ifneq (,$(filter $(PLATFORM_FLAVOR),mx6sxsabreauto))
257CFG_DDR_SIZE ?= 0x80000000
258CFG_NS_ENTRY_ADDR ?= 0x80800000
259endif
260
261ifneq (,$(filter $(PLATFORM_FLAVOR),mx6sxsabresd))
262CFG_DDR_SIZE ?= 0x40000000
263CFG_NS_ENTRY_ADDR ?= 0x80800000
264endif
265
266ifeq ($(PLATFORM_FLAVOR), mx6sxudooneofull)
267CFG_DDR_SIZE ?= 0x40000000
268CFG_UART_BASE ?= UART1_BASE
269endif
270
271ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ulevk mx6ullevk))
272CFG_DDR_SIZE ?= 0x20000000
273CFG_NS_ENTRY_ADDR ?= 0x80800000
274endif
275
276ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ulccimx6ulsbcpro))
277CFG_DDR_SIZE ?= 0x10000000
278CFG_NS_ENTRY_ADDR ?= 0x80800000
279CFG_UART_BASE ?= UART5_BASE
280endif
281
282ifneq (,$(filter $(PLATFORM_FLAVOR),mx6ul9x9evk))
283CFG_DDR_SIZE ?= 0x10000000
284CFG_NS_ENTRY_ADDR ?= 0x80800000
285endif
286
287ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mqevk))
288CFG_DDR_SIZE ?= 0xc0000000
289CFG_UART_BASE ?= UART1_BASE
290endif
291
292ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mmevk))
293CFG_DDR_SIZE ?= 0x80000000
294CFG_UART_BASE ?= UART2_BASE
295endif
296
297ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mnevk))
298CFG_DDR_SIZE ?= 0x80000000
299CFG_UART_BASE ?= UART2_BASE
300endif
301
302ifneq (,$(filter $(PLATFORM_FLAVOR),mx8qxpmek mx8qmmek))
303CFG_DDR_SIZE ?= 0x80000000
304CFG_UART_BASE ?= UART0_BASE
305endif
306
307# i.MX6 Solo/SL/SoloX/DualLite/Dual/Quad specific config
308ifeq ($(filter y, $(CFG_MX6QP) $(CFG_MX6Q) $(CFG_MX6D) $(CFG_MX6DL) $(CFG_MX6S) \
309	$(CFG_MX6SL) $(CFG_MX6SLL) $(CFG_MX6SX)), y)
310include core/arch/arm/cpu/cortex-a9.mk
311
312$(call force,CFG_PL310,y)
313
314CFG_PL310_LOCKED ?= y
315CFG_ENABLE_SCTLR_RR ?= y
316CFG_SCU ?= y
317endif
318
319ifeq ($(filter y, $(CFG_MX6QP) $(CFG_MX6Q) $(CFG_MX6D) $(CFG_MX6DL) $(CFG_MX6S)), y)
320CFG_DRAM_BASE ?= 0x10000000
321endif
322
323ifneq (,$(filter y, $(CFG_MX6UL) $(CFG_MX6ULL) $(CFG_MX6SL) $(CFG_MX6SLL) \
324	$(CFG_MX6SX)))
325CFG_DRAM_BASE ?= 0x80000000
326endif
327
328ifeq ($(filter y, $(CFG_MX7)), y)
329CFG_INIT_CNTVOFF ?= y
330CFG_DRAM_BASE ?= 0x80000000
331endif
332
333ifeq ($(filter y, $(CFG_MX7ULP)), y)
334CFG_INIT_CNTVOFF ?= y
335CFG_DRAM_BASE ?= UL(0x60000000)
336$(call force,CFG_IMX_LPUART,y)
337$(call force,CFG_BOOT_SECONDARY_REQUEST,n)
338endif
339
340ifneq (,$(filter y, $(CFG_MX6) $(CFG_MX7) $(CFG_MX7ULP)))
341$(call force,CFG_GENERIC_BOOT,y)
342$(call force,CFG_GIC,y)
343$(call force,CFG_PM_STUBS,y)
344
345CFG_BOOT_SYNC_CPU ?= n
346CFG_BOOT_SECONDARY_REQUEST ?= y
347CFG_DT ?= y
348CFG_PAGEABLE_ADDR ?= 0
349CFG_PSCI_ARM32 ?= y
350CFG_SECURE_TIME_SOURCE_REE ?= y
351CFG_UART_BASE ?= UART1_BASE
352endif
353
354ifneq (,$(filter y, $(CFG_MX6) $(CFG_MX7)))
355$(call force,CFG_IMX_UART,y)
356CFG_CSU ?= y
357endif
358
359ifeq ($(filter y, $(CFG_PSCI_ARM32)), y)
360CFG_HWSUPP_MEM_PERM_WXN = n
361CFG_IMX_WDOG ?= y
362endif
363
364ifeq ($(CFG_ARM64_core),y)
365# arm-v8 platforms
366include core/arch/arm/cpu/cortex-armv8-0.mk
367$(call force,CFG_ARM_GICV3,y)
368$(call force,CFG_GENERIC_BOOT,y)
369$(call force,CFG_GIC,y)
370$(call force,CFG_WITH_LPAE,y)
371$(call force,CFG_WITH_ARM_TRUSTED_FW,y)
372$(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y)
373
374CFG_CRYPTO_WITH_CE ?= y
375CFG_PM_STUBS ?= y
376
377supported-ta-targets = ta_arm64
378endif
379
380CFG_TZDRAM_START ?= ($(CFG_DRAM_BASE) - 0x02000000 + $(CFG_DDR_SIZE))
381CFG_TZDRAM_SIZE ?= 0x01e00000
382CFG_SHMEM_START ?= ($(CFG_TZDRAM_START) + $(CFG_TZDRAM_SIZE))
383CFG_SHMEM_SIZE ?= 0x00200000
384
385CFG_CRYPTO_SIZE_OPTIMIZATION ?= n
386CFG_WITH_STACK_CANARIES ?= y
387CFG_MMAP_REGIONS ?= 24
388
389# Almost all platforms include CAAM HW Modules, except the
390# ones forced to be disabled
391CFG_NXP_CAAM ?= n
392
393ifeq ($(CFG_NXP_CAAM),y)
394# As NXP CAAM Driver is enabled, disable the small local CAAM driver
395# used just to release Job Rings to Non-Secure world
396$(call force,CFG_IMX_CAAM,n)
397
398# If NXP CAAM Driver is supported, the Crypto Driver interfacing
399# it with generic crypto API can be enabled.
400CFG_CRYPTO_DRIVER ?= y
401# Crypto Driver Debug
402CFG_CRYPTO_DRIVER_DEBUG ?= n
403else
404$(call force,CFG_CRYPTO_DRIVER,n)
405$(call force,CFG_WITH_SOFTWARE_PRNG,y)
406
407ifneq (,$(filter y, $(CFG_MX6) $(CFG_MX7) $(CFG_MX7ULP)))
408CFG_IMX_CAAM ?= y
409endif
410endif
411
412# Cryptographic configuration
413include core/arch/arm/plat-imx/crypto_conf.mk
414