1 // SPDX-License-Identifier: BSD-3-Clause 2 /* 3 * Copyright (c) 2017-2020, STMicroelectronics 4 */ 5 6 #include <assert.h> 7 #include <drivers/stm32_bsec.h> 8 #include <io.h> 9 #include <kernel/delay.h> 10 #include <kernel/generic_boot.h> 11 #include <kernel/spinlock.h> 12 #include <limits.h> 13 #include <mm/core_memprot.h> 14 #include <platform_config.h> 15 #include <stm32_util.h> 16 #include <string.h> 17 #include <tee_api_defines.h> 18 #include <types_ext.h> 19 #include <util.h> 20 21 #define BSEC_OTP_MASK GENMASK_32(4, 0) 22 #define BSEC_OTP_BANK_SHIFT 5 23 24 /* Permanent lock bitmasks */ 25 #define ADDR_LOWER_OTP_PERLOCK_SHIFT 3 26 #define DATA_LOWER_OTP_PERLOCK_BIT 3 27 #define DATA_LOWER_OTP_PERLOCK_MASK GENMASK_32(2, 0) 28 #define ADDR_UPPER_OTP_PERLOCK_SHIFT 4 29 #define DATA_UPPER_OTP_PERLOCK_BIT 1 30 #define DATA_UPPER_OTP_PERLOCK_MASK GENMASK_32(3, 0) 31 32 /* BSEC register offset */ 33 #define BSEC_OTP_CONF_OFF 0x000U 34 #define BSEC_OTP_CTRL_OFF 0x004U 35 #define BSEC_OTP_WRDATA_OFF 0x008U 36 #define BSEC_OTP_STATUS_OFF 0x00CU 37 #define BSEC_OTP_LOCK_OFF 0x010U 38 #define BSEC_DEN_OFF 0x014U 39 #define BSEC_FEN_OFF 0x018U 40 #define BSEC_DISTURBED_OFF 0x01CU 41 #define BSEC_DISTURBED1_OFF 0x020U 42 #define BSEC_DISTURBED2_OFF 0x024U 43 #define BSEC_ERROR_OFF 0x034U 44 #define BSEC_ERROR1_OFF 0x038U 45 #define BSEC_ERROR2_OFF 0x03CU 46 #define BSEC_WRLOCK_OFF 0x04CU 47 #define BSEC_WRLOCK1_OFF 0x050U 48 #define BSEC_WRLOCK2_OFF 0x054U 49 #define BSEC_SPLOCK_OFF 0x064U 50 #define BSEC_SPLOCK1_OFF 0x068U 51 #define BSEC_SPLOCK2_OFF 0x06CU 52 #define BSEC_SWLOCK_OFF 0x07CU 53 #define BSEC_SWLOCK1_OFF 0x080U 54 #define BSEC_SWLOCK2_OFF 0x084U 55 #define BSEC_SRLOCK_OFF 0x094U 56 #define BSEC_SRLOCK1_OFF 0x098U 57 #define BSEC_SRLOCK2_OFF 0x09CU 58 #define BSEC_JTAG_IN_OFF 0x0ACU 59 #define BSEC_JTAG_OUT_OFF 0x0B0U 60 #define BSEC_SCRATCH_OFF 0x0B4U 61 #define BSEC_OTP_DATA_OFF 0x200U 62 #define BSEC_IPHW_CFG_OFF 0xFF0U 63 #define BSEC_IPVR_OFF 0xFF4U 64 #define BSEC_IP_ID_OFF 0xFF8U 65 #define BSEC_IP_MAGIC_ID_OFF 0xFFCU 66 67 /* BSEC_CONFIGURATION Register */ 68 #define BSEC_CONF_POWER_UP_MASK BIT(0) 69 #define BSEC_CONF_POWER_UP_SHIFT 0 70 #define BSEC_CONF_FRQ_MASK GENMASK_32(2, 1) 71 #define BSEC_CONF_FRQ_SHIFT 1 72 #define BSEC_CONF_PRG_WIDTH_MASK GENMASK_32(6, 3) 73 #define BSEC_CONF_PRG_WIDTH_SHIFT 3 74 #define BSEC_CONF_TREAD_MASK GENMASK_32(8, 7) 75 #define BSEC_CONF_TREAD_SHIFT 7 76 77 /* BSEC_CONTROL Register */ 78 #define BSEC_READ 0x000U 79 #define BSEC_WRITE 0x100U 80 #define BSEC_LOCK 0x200U 81 82 /* BSEC_STATUS Register */ 83 #define BSEC_MODE_STATUS_MASK GENMASK_32(2, 0) 84 #define BSEC_MODE_BUSY_MASK BIT(3) 85 #define BSEC_MODE_PROGFAIL_MASK BIT(4) 86 #define BSEC_MODE_PWR_MASK BIT(5) 87 #define BSEC_MODE_BIST1_LOCK_MASK BIT(6) 88 #define BSEC_MODE_BIST2_LOCK_MASK BIT(7) 89 90 /* BSEC_DEBUG */ 91 #define BSEC_HDPEN BIT(4) 92 #define BSEC_SPIDEN BIT(5) 93 #define BSEC_SPINDEN BIT(6) 94 #define BSEC_DBGSWGEN BIT(10) 95 #define BSEC_DEN_ALL_MSK GENMASK_32(10, 0) 96 97 /* 98 * OTP Lock services definition 99 * Value must corresponding to the bit position in the register 100 */ 101 #define BSEC_LOCK_UPPER_OTP 0x00 102 #define BSEC_LOCK_DEBUG 0x02 103 #define BSEC_LOCK_PROGRAM 0x04 104 105 /* Timeout when polling on status */ 106 #define BSEC_TIMEOUT_US 1000 107 108 struct bsec_dev { 109 struct io_pa_va base; 110 unsigned int upper_base; 111 unsigned int max_id; 112 bool closed_device; 113 }; 114 115 /* Only 1 instance of BSEC is expected per platform */ 116 static struct bsec_dev bsec_dev; 117 118 /* BSEC access protection */ 119 static unsigned int lock = SPINLOCK_UNLOCK; 120 121 static uint32_t bsec_lock(void) 122 { 123 return may_spin_lock(&lock); 124 } 125 126 static void bsec_unlock(uint32_t exceptions) 127 { 128 may_spin_unlock(&lock, exceptions); 129 } 130 131 static uint32_t otp_max_id(void) 132 { 133 return bsec_dev.max_id; 134 } 135 136 static uint32_t otp_bank_offset(uint32_t otp_id) 137 { 138 assert(otp_id <= otp_max_id()); 139 140 return ((otp_id & ~BSEC_OTP_MASK) >> BSEC_OTP_BANK_SHIFT) * 141 sizeof(uint32_t); 142 } 143 144 static vaddr_t bsec_base(void) 145 { 146 return io_pa_or_va_secure(&bsec_dev.base); 147 } 148 149 static uint32_t bsec_status(void) 150 { 151 return io_read32(bsec_base() + BSEC_OTP_STATUS_OFF); 152 } 153 154 static TEE_Result check_no_error(uint32_t otp_id) 155 { 156 uint32_t bit = BIT(otp_id & BSEC_OTP_MASK); 157 uint32_t bank = otp_bank_offset(otp_id); 158 159 if (io_read32(bsec_base() + BSEC_DISTURBED_OFF + bank) & bit) 160 return TEE_ERROR_GENERIC; 161 162 if (io_read32(bsec_base() + BSEC_ERROR_OFF + bank) & bit) 163 return TEE_ERROR_GENERIC; 164 165 return TEE_SUCCESS; 166 } 167 168 static TEE_Result power_up_safmem(void) 169 { 170 uint64_t timeout_ref = timeout_init_us(BSEC_TIMEOUT_US); 171 172 io_mask32(bsec_base() + BSEC_OTP_CONF_OFF, BSEC_CONF_POWER_UP_MASK, 173 BSEC_CONF_POWER_UP_MASK); 174 175 /* 176 * If a timeout is detected, test the condition again to consider 177 * cases where timeout is due to the executing TEE thread rescheduling. 178 */ 179 while (!timeout_elapsed(timeout_ref)) 180 if (bsec_status() & BSEC_MODE_PWR_MASK) 181 break; 182 183 if (bsec_status() & BSEC_MODE_PWR_MASK) 184 return TEE_SUCCESS; 185 186 return TEE_ERROR_GENERIC; 187 } 188 189 static TEE_Result power_down_safmem(void) 190 { 191 uint64_t timeout_ref = timeout_init_us(BSEC_TIMEOUT_US); 192 193 io_mask32(bsec_base() + BSEC_OTP_CONF_OFF, 0, BSEC_CONF_POWER_UP_MASK); 194 195 /* 196 * If a timeout is detected, test the condition again to consider 197 * cases where timeout is due to the executing TEE thread rescheduling. 198 */ 199 while (!timeout_elapsed(timeout_ref)) 200 if (!(bsec_status() & BSEC_MODE_PWR_MASK)) 201 break; 202 203 if (!(bsec_status() & BSEC_MODE_PWR_MASK)) 204 return TEE_SUCCESS; 205 206 return TEE_ERROR_GENERIC; 207 } 208 209 TEE_Result stm32_bsec_shadow_register(uint32_t otp_id) 210 { 211 TEE_Result result = 0; 212 uint32_t exceptions = 0; 213 uint64_t timeout_ref = 0; 214 bool locked = false; 215 216 /* Check if shadowing of OTP is locked, informative only */ 217 result = stm32_bsec_read_sr_lock(otp_id, &locked); 218 if (result) 219 return result; 220 221 if (locked) 222 DMSG("BSEC shadow warning: OTP locked"); 223 224 exceptions = bsec_lock(); 225 226 result = power_up_safmem(); 227 if (result) 228 return result; 229 230 io_write32(bsec_base() + BSEC_OTP_CTRL_OFF, otp_id | BSEC_READ); 231 232 timeout_ref = timeout_init_us(BSEC_TIMEOUT_US); 233 while (!timeout_elapsed(timeout_ref)) 234 if (!(bsec_status() & BSEC_MODE_BUSY_MASK)) 235 break; 236 237 if (bsec_status() & BSEC_MODE_BUSY_MASK) 238 result = TEE_ERROR_GENERIC; 239 else 240 result = check_no_error(otp_id); 241 242 power_down_safmem(); 243 244 bsec_unlock(exceptions); 245 246 return result; 247 } 248 249 TEE_Result stm32_bsec_read_otp(uint32_t *value, uint32_t otp_id) 250 { 251 TEE_Result result = 0; 252 uint32_t exceptions = 0; 253 254 if (otp_id > otp_max_id()) 255 return TEE_ERROR_BAD_PARAMETERS; 256 257 exceptions = bsec_lock(); 258 259 *value = io_read32(bsec_base() + BSEC_OTP_DATA_OFF + 260 (otp_id * sizeof(uint32_t))); 261 262 result = check_no_error(otp_id); 263 264 bsec_unlock(exceptions); 265 266 return result; 267 } 268 269 TEE_Result stm32_bsec_shadow_read_otp(uint32_t *otp_value, uint32_t otp_id) 270 { 271 TEE_Result result = 0; 272 273 result = stm32_bsec_shadow_register(otp_id); 274 if (result) { 275 EMSG("BSEC %"PRIu32" Shadowing Error %#"PRIx32, otp_id, result); 276 return result; 277 } 278 279 result = stm32_bsec_read_otp(otp_value, otp_id); 280 if (result) 281 EMSG("BSEC %"PRIu32" Read Error %#"PRIx32, otp_id, result); 282 283 return result; 284 } 285 286 TEE_Result stm32_bsec_write_otp(uint32_t value, uint32_t otp_id) 287 { 288 TEE_Result result = 0; 289 uint32_t exceptions = 0; 290 vaddr_t otp_data_base = bsec_base() + BSEC_OTP_DATA_OFF; 291 bool locked = false; 292 293 /* Check if write of OTP is locked, informative only */ 294 result = stm32_bsec_read_sw_lock(otp_id, &locked); 295 if (result) 296 return result; 297 298 if (locked) 299 DMSG("BSEC write warning: OTP locked"); 300 301 exceptions = bsec_lock(); 302 303 io_write32(otp_data_base + (otp_id * sizeof(uint32_t)), value); 304 305 result = check_no_error(otp_id); 306 307 bsec_unlock(exceptions); 308 309 return result; 310 } 311 312 TEE_Result stm32_bsec_program_otp(uint32_t value, uint32_t otp_id) 313 { 314 TEE_Result result = 0; 315 uint32_t exceptions = 0; 316 uint64_t timeout_ref = 0; 317 bool locked = false; 318 319 /* Check if shadowing of OTP is locked, informative only */ 320 result = stm32_bsec_read_sp_lock(otp_id, &locked); 321 if (result) 322 return result; 323 324 if (locked) 325 DMSG("BSEC program warning: OTP locked"); 326 327 if (io_read32(bsec_base() + BSEC_OTP_LOCK_OFF) & BIT(BSEC_LOCK_PROGRAM)) 328 DMSG("BSEC program warning: GPLOCK activated"); 329 330 exceptions = bsec_lock(); 331 332 result = power_up_safmem(); 333 if (result) 334 return result; 335 336 io_write32(bsec_base() + BSEC_OTP_WRDATA_OFF, value); 337 io_write32(bsec_base() + BSEC_OTP_CTRL_OFF, otp_id | BSEC_WRITE); 338 339 timeout_ref = timeout_init_us(BSEC_TIMEOUT_US); 340 while (!timeout_elapsed(timeout_ref)) 341 if (!(bsec_status() & BSEC_MODE_BUSY_MASK)) 342 break; 343 344 if (bsec_status() & (BSEC_MODE_BUSY_MASK | BSEC_MODE_PROGFAIL_MASK)) 345 result = TEE_ERROR_GENERIC; 346 else 347 result = check_no_error(otp_id); 348 349 power_down_safmem(); 350 351 bsec_unlock(exceptions); 352 353 return result; 354 } 355 356 TEE_Result stm32_bsec_permanent_lock_otp(uint32_t otp_id) 357 { 358 TEE_Result result = 0; 359 uint32_t data = 0; 360 uint32_t addr = 0; 361 uint32_t exceptions = 0; 362 vaddr_t base = bsec_base(); 363 uint64_t timeout_ref; 364 365 if (otp_id > otp_max_id()) 366 return TEE_ERROR_BAD_PARAMETERS; 367 368 if (otp_id < bsec_dev.upper_base) { 369 addr = otp_id >> ADDR_LOWER_OTP_PERLOCK_SHIFT; 370 data = DATA_LOWER_OTP_PERLOCK_BIT << 371 ((otp_id & DATA_LOWER_OTP_PERLOCK_MASK) << 1U); 372 } else { 373 addr = (otp_id >> ADDR_UPPER_OTP_PERLOCK_SHIFT) + 2U; 374 data = DATA_UPPER_OTP_PERLOCK_BIT << 375 (otp_id & DATA_UPPER_OTP_PERLOCK_MASK); 376 } 377 378 exceptions = bsec_lock(); 379 380 result = power_up_safmem(); 381 if (result) 382 return result; 383 384 io_write32(base + BSEC_OTP_WRDATA_OFF, data); 385 io_write32(base + BSEC_OTP_CTRL_OFF, addr | BSEC_WRITE | BSEC_LOCK); 386 387 timeout_ref = timeout_init_us(BSEC_TIMEOUT_US); 388 while (!timeout_elapsed(timeout_ref)) 389 if (!(bsec_status() & BSEC_MODE_BUSY_MASK)) 390 break; 391 392 if (bsec_status() & (BSEC_MODE_BUSY_MASK | BSEC_MODE_PROGFAIL_MASK)) 393 result = TEE_ERROR_BAD_PARAMETERS; 394 else 395 result = check_no_error(otp_id); 396 397 power_down_safmem(); 398 399 bsec_unlock(exceptions); 400 401 return result; 402 } 403 404 TEE_Result stm32_bsec_write_debug_conf(uint32_t value) 405 { 406 TEE_Result result = TEE_ERROR_GENERIC; 407 uint32_t masked_val = value & BSEC_DEN_ALL_MSK; 408 uint32_t exceptions = 0; 409 410 exceptions = bsec_lock(); 411 412 io_write32(bsec_base() + BSEC_DEN_OFF, value); 413 414 if ((io_read32(bsec_base() + BSEC_DEN_OFF) ^ masked_val) == 0U) 415 result = TEE_SUCCESS; 416 417 bsec_unlock(exceptions); 418 419 return result; 420 } 421 422 uint32_t stm32_bsec_read_debug_conf(void) 423 { 424 return io_read32(bsec_base() + BSEC_DEN_OFF); 425 } 426 427 static TEE_Result set_bsec_lock(uint32_t otp_id, size_t lock_offset) 428 { 429 uint32_t bank = otp_bank_offset(otp_id); 430 uint32_t otp_mask = BIT(otp_id & BSEC_OTP_MASK); 431 vaddr_t lock_addr = bsec_base() + bank + lock_offset; 432 uint32_t exceptions = 0; 433 434 if (otp_id > STM32MP1_OTP_MAX_ID) 435 return TEE_ERROR_BAD_PARAMETERS; 436 437 exceptions = bsec_lock(); 438 439 io_write32(lock_addr, otp_mask); 440 441 bsec_unlock(exceptions); 442 443 return TEE_SUCCESS; 444 } 445 446 TEE_Result stm32_bsec_set_sr_lock(uint32_t otp_id) 447 { 448 return set_bsec_lock(otp_id, BSEC_SRLOCK_OFF); 449 } 450 451 TEE_Result stm32_bsec_set_sw_lock(uint32_t otp_id) 452 { 453 return set_bsec_lock(otp_id, BSEC_SWLOCK_OFF); 454 } 455 456 TEE_Result stm32_bsec_set_sp_lock(uint32_t otp_id) 457 { 458 return set_bsec_lock(otp_id, BSEC_SPLOCK_OFF); 459 } 460 461 static TEE_Result read_bsec_lock(uint32_t otp_id, bool *locked, 462 size_t lock_offset) 463 { 464 uint32_t bank = otp_bank_offset(otp_id); 465 uint32_t otp_mask = BIT(otp_id & BSEC_OTP_MASK); 466 vaddr_t lock_addr = bsec_base() + bank + lock_offset; 467 468 if (otp_id > STM32MP1_OTP_MAX_ID) 469 return TEE_ERROR_BAD_PARAMETERS; 470 471 *locked = (io_read32(lock_addr) & otp_mask) != 0; 472 473 return TEE_SUCCESS; 474 } 475 476 TEE_Result stm32_bsec_read_sr_lock(uint32_t otp_id, bool *locked) 477 { 478 return read_bsec_lock(otp_id, locked, BSEC_SRLOCK_OFF); 479 } 480 481 TEE_Result stm32_bsec_read_sw_lock(uint32_t otp_id, bool *locked) 482 { 483 return read_bsec_lock(otp_id, locked, BSEC_SWLOCK_OFF); 484 } 485 486 TEE_Result stm32_bsec_read_sp_lock(uint32_t otp_id, bool *locked) 487 { 488 return read_bsec_lock(otp_id, locked, BSEC_SPLOCK_OFF); 489 } 490 491 TEE_Result stm32_bsec_read_permanent_lock(uint32_t otp_id, bool *locked) 492 { 493 return read_bsec_lock(otp_id, locked, BSEC_WRLOCK_OFF); 494 } 495 496 TEE_Result stm32_bsec_otp_lock(uint32_t service) 497 { 498 vaddr_t addr = bsec_base() + BSEC_OTP_LOCK_OFF; 499 500 switch (service) { 501 case BSEC_LOCK_UPPER_OTP: 502 io_write32(addr, BIT(BSEC_LOCK_UPPER_OTP)); 503 break; 504 case BSEC_LOCK_DEBUG: 505 io_write32(addr, BIT(BSEC_LOCK_DEBUG)); 506 break; 507 case BSEC_LOCK_PROGRAM: 508 io_write32(addr, BIT(BSEC_LOCK_PROGRAM)); 509 break; 510 default: 511 return TEE_ERROR_BAD_PARAMETERS; 512 } 513 514 return TEE_SUCCESS; 515 } 516 517 bool stm32_bsec_nsec_can_access_otp(uint32_t otp_id) 518 { 519 if (otp_id > otp_max_id()) 520 return false; 521 522 return otp_id < bsec_dev.upper_base || !bsec_dev.closed_device; 523 } 524 525 static TEE_Result initialize_bsec(void) 526 { 527 struct stm32_bsec_static_cfg cfg = { 0 }; 528 uint32_t otp = 0; 529 TEE_Result result = 0; 530 531 stm32mp_get_bsec_static_cfg(&cfg); 532 533 bsec_dev.base.pa = cfg.base; 534 bsec_dev.upper_base = cfg.upper_start; 535 bsec_dev.max_id = cfg.max_id; 536 bsec_dev.closed_device = true; 537 538 /* Disable closed device mode upon platform closed device OTP value */ 539 result = stm32_bsec_shadow_read_otp(&otp, cfg.closed_device_id); 540 if (!result && !(otp & BIT(cfg.closed_device_position))) 541 bsec_dev.closed_device = false; 542 543 return TEE_SUCCESS; 544 } 545 546 driver_init(initialize_bsec); 547