1 /* SPDX-License-Identifier: BSD-3-Clause */
2 /*
3 * Copyright (c) 2015-2020, Arm Limited and Contributors. All rights reserved.
4 * Copyright (c) 2021, Linaro Limited
5 * Copyright (c) 2024, STMicroelectronics
6 */
7 #ifndef SCMI_MSG_PERF_DOMAIN_H
8 #define SCMI_MSG_PERF_DOMAIN_H
9
10 #include <stdint.h>
11 #include <util.h>
12
13 #include "common.h"
14
15 #define SCMI_PROTOCOL_VERSION_PERF_DOMAIN 0x10000
16
17 /*
18 * Identifiers of the SCMI Performance Domain Management Protocol commands
19 */
20 enum scmi_perf_domain_command_id {
21 SCMI_PERF_DOMAIN_ATTRIBUTES = 0x3,
22 SCMI_PERF_DESCRIBE_LEVELS = 0x4,
23 SCMI_PERF_LIMITS_SET = 0x5, /* Not supported */
24 SCMI_PERF_LIMITS_GET = 0x6, /* Not supported */
25 SCMI_PERF_LEVEL_SET = 0x7,
26 SCMI_PERF_LEVEL_GET = 0x8,
27 SCMI_PERF_NOTIFY_LIMITS = 0x9, /* Not supported */
28 SCMI_PERF_NOTIFY_LEVEL = 0xa, /* Not supported */
29 };
30
31 /*
32 * Payloads for SCMI_PROTOCOL_ATTRIBUTES for Performance Domains
33 */
34 #define SCMI_PERF_ATTRIBUTES_POWER_MW_BIT BIT(16)
35 #define SCMI_PERF_ATTRIBUTES_NUM_DOMAINS_MASK GENMASK_32(15, 0)
36
37 #define SCMI_PERF_PROTOCOL_ATTRIBUTES(_power_mw, _num_domains) \
38 (((_power_mw) ? SCMI_PERF_ATTRIBUTES_POWER_MW_BIT : 0) | \
39 ((_num_domains) & SCMI_PERF_ATTRIBUTES_NUM_DOMAINS_MASK))
40
41 struct scmi_perf_protocol_attributes_p2a {
42 int32_t status;
43 uint32_t attributes;
44 uint32_t statistics_address_low;
45 uint32_t statistics_address_high;
46 uint32_t statistics_len;
47 };
48
49 /*
50 * Payloads for SCMI_PERF_DOMAIN_ATTRIBUTES
51 */
52 struct scmi_perf_attributes_a2p {
53 uint32_t domain_id;
54 };
55
56 /* Macro for scmi_perf_domain_attributes_p2a:attributes */
57 #define SCMI_PERF_DOMAIN_ATTRIBUTES_CAN_SET_LEVEL BIT(30)
58
59 /* Macro for scmi_perf_domain_attributes_p2a:rate_limit */
60 #define SCMI_PERF_DOMAIN_RATE_LIMIT_MASK GENMASK_32(15, 0)
61
62 /* Macro for scmi_perf_domain_attributes_p2a:name */
63 #define SCMI_PERF_DOMAIN_ATTR_NAME_SZ 16
64
65 struct scmi_perf_attributes_p2a {
66 int32_t status;
67 uint32_t attributes;
68 uint32_t rate_limit;
69 uint32_t sustained_freq;
70 uint32_t sustained_perf_level;
71 char name[SCMI_PERF_DOMAIN_ATTR_NAME_SZ];
72 };
73
74 /*
75 * Payloads for SCMI_PERF_DESCRIBE_LEVELS
76 */
77 #define SCMI_PERF_LEVEL_ATTRIBUTES_LATENCY_US_MASK GENMASK_32(15, 0)
78
79 struct scmi_perf_level {
80 uint32_t performance_level;
81 uint32_t power_cost;
82 uint32_t attributes;
83 };
84
85 struct scmi_perf_describe_levels_a2p {
86 uint32_t domain_id;
87 uint32_t level_index;
88 };
89
90 #define SCMI_PERF_NUM_LEVELS_NUM_LEVELS_MASK GENMASK_32(11, 0)
91 #define SCMI_PERF_NUM_LEVELS_REMAINING_LEVELS_MASK GENMASK_32(31, 16)
92 #define SCMI_PERF_NUM_LEVELS_REMAINING_LEVELS_POS 16
93
94 #define SCMI_PERF_NUM_LEVELS(_num_levels, _rem_levels) \
95 (((_num_levels) & SCMI_PERF_NUM_LEVELS_NUM_LEVELS_MASK) | \
96 (((_rem_levels) << SCMI_PERF_NUM_LEVELS_REMAINING_LEVELS_POS) & \
97 SCMI_PERF_NUM_LEVELS_REMAINING_LEVELS_MASK))
98
99 struct scmi_perf_describe_levels_p2a {
100 int32_t status;
101 uint32_t num_levels;
102 struct scmi_perf_level perf_levels[];
103 };
104
105 /* Payloads for SCMI_PERF_LEVEL_SET */
106 struct scmi_perf_level_set_a2p {
107 uint32_t domain_id;
108 uint32_t performance_level;
109 };
110
111 struct scmi_perf_level_set_p2a {
112 int32_t status;
113 };
114
115 /* Payloads for SCMI_PERF_LEVEL_GET */
116 struct scmi_perf_level_get_a2p {
117 uint32_t domain_id;
118 };
119
120 struct scmi_perf_level_get_p2a {
121 int32_t status;
122 uint32_t performance_level;
123 };
124
125 #ifdef CFG_SCMI_MSG_PERF_DOMAIN
126 /*
127 * scmi_msg_get_perf_handler - Return a handler for a performance domain message
128 * @msg - message to process
129 * Return a function handler for the message or NULL
130 */
131 scmi_msg_handler_t scmi_msg_get_perf_handler(struct scmi_msg *msg);
132 #else
133 static inline
scmi_msg_get_perf_handler(struct scmi_msg * msg __unused)134 scmi_msg_handler_t scmi_msg_get_perf_handler(struct scmi_msg *msg __unused)
135 {
136 return NULL;
137 }
138 #endif
139 #endif /* SCMI_MSG_PERF_DOMAIN_H */
140