drivers: convert imx_uart driver to use struct serial_chip

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne

drivers: convert imx_uart driver to use struct serial_chip

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: convert hi16xx_uart driver to use struct serial_chip

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etien

drivers: convert hi16xx_uart driver to use struct serial_chip

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: convert pl011 driver to use struct serial_chip

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Car

drivers: convert pl011 driver to use struct serial_chip

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: pl022: Prevent possible rx fifo overflow

Signed-off-by: Victor Chong <victor.chong@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Etienne Carriere <eti

drivers: pl022: Prevent possible rx fifo overflow

Signed-off-by: Victor Chong <victor.chong@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
[jf: rebase on top of master]
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>

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drivers: pl022: Allow platforms to register CS control function

If a CS callback function is registered, the system provided one
will not be used.

Signed-off-by: Victor Chong <victor.chong@linaro.o

drivers: pl022: Allow platforms to register CS control function

If a CS callback function is registered, the system provided one
will not be used.

Signed-off-by: Victor Chong <victor.chong@linaro.org>
Tested-by: Victor Chong <victor.chong@linaro.org> (HiKey)
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
[jf: rebase on top of master]
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>

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drivers: spi: Make configure, start and end functions generic

Move configure, start and end functions from IP specific files into
spi_ops in spi.h to allow platforms to call and control them via
the

drivers: spi: Make configure, start and end functions generic

Move configure, start and end functions from IP specific files into
spi_ops in spi.h to allow platforms to call and control them via
the generic framework.

Signed-off-by: Victor Chong <victor.chong@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
[jf: rebase on top of master]
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>

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drivers: pl022: Add more checks and configuration

- Add checks for proper data size before packet transfer
- Check also busy status before exiting rx loop to avoid possible
endless looping
- Clear

drivers: pl022: Add more checks and configuration

- Add checks for proper data size before packet transfer
- Check also busy status before exiting rx loop to avoid possible
endless looping
- Clear interrupts during configure

Signed-off-by: Victor Chong <victor.chong@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
[jf: rebase on top of master]
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>

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drivers: spi: simplify code

1. SPI mandates that sizes of transmitted and received packet are of same
size [1]. As discussed in [2], this means that *num_rxpkts != num_txpkts
is not a valid use case

drivers: spi: simplify code

1. SPI mandates that sizes of transmitted and received packet are of same
size [1]. As discussed in [2], this means that *num_rxpkts != num_txpkts
is not a valid use case so there's no need for both and we can just merge
them and use num_pkts.

2. Remove tx{8,16} and rx{8,16} only functions as these are not
commonly used. If necessary, users can call just txrx{8,16} with
rdat or wdat as NULL for tx{8,16} and rx{8,16} respectively as
replacements. E.g.:

tx8:
txrx8(chip, wdat, NULL, num_pkts);

rx16:
txrx16(chip, NULL, rdat, num_pkts);

3. Remove unnecessary or repetitive enums and headers and line feeds

[1] http://www.quanser.com/products/quarc/documentation/spi_protocol.html
[2] https://github.com/OP-TEE/optee_os/pull/1215

Signed-off-by: Victor Chong <victor.chong@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
[jf: rebase on top of master]
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>

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drivers: Add TRNG driver for DRA7

Add driver for the True Random Number Generator (TRNG) available
on DRA7xx platforms.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Joakim Bech <joakim.

drivers: Add TRNG driver for DRA7

Add driver for the True Random Number Generator (TRNG) available
on DRA7xx platforms.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>

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hikey: enable spi by default and add sample test code

Suggested-by: Daniel Thompson <daniel.thompson@linaro.org>
Suggested-by: Leo Yan <leo.yan@linaro.org>
Suggested-by: Haojian Zhuang <haojian.zhua

hikey: enable spi by default and add sample test code

Suggested-by: Daniel Thompson <daniel.thompson@linaro.org>
Suggested-by: Leo Yan <leo.yan@linaro.org>
Suggested-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Signed-off-by: Victor Chong <victor.chong@linaro.org>
Tested-by: Victor Chong <victor.chong@linaro.org> (with CFG_SPI_TEST=y)
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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core: add code for the interrupt framework

With this commit, we add three more GIC APIs for the kernel of OPTEE-OS:
itr_raise_sgi : can raise software generate interrupt(SGI) from secure
world to no

core: add code for the interrupt framework

With this commit, we add three more GIC APIs for the kernel of OPTEE-OS:
itr_raise_sgi : can raise software generate interrupt(SGI) from secure
world to no-secure world, or secure world to secure world. It's a quick
communication between different worlds and different cores. Because SGI
is using the GIC N-N model, so with this API, every core can receive
the interrupt if want.

itr_raise_pi : can trigger the peripheral interrupt with the corresponding
interrupt number. When sending it to N cores, just one core can receive
the effective interrupt.

itr_set_affinity : can target the peripheral interrupt to the core you
want, it means that one can bind the interrupt to the corresponding core
use this API.

The usage may as follow:
itr_raise_sgi(11, 0x1 << 1)
it will raise SGI11 to core 1, and if you want not only core 1 can receive
SGI11 but also core 2, then you can change the code to
itr_raise_sgi(11, 0x1 << 1 || 0x1 << 2).

itr_set_affinity(61, 0x1 << 1)
itr_raise_pi(61)
These two APIs may use together, the operation set_affinity set the PI61
can just sent to core 1, then raise_pi, core 1 will receive the peripheral
interrupt 61.

Signed-off-by: Guanchao Liang <liang.guanchao@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Tested-by: Joakim Bech <joakim.bech@linaro.org> (QEMU)
[Update commit author to be same as S-o-b: above]
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>

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plat-stm: enable generic gic support

Change generic boot to call gic_cpu_init() for secondary boot cores.

Attempt (bss cleared?) to assert gic driver was initialized before
gic_pu_init() is called.

plat-stm: enable generic gic support

Change generic boot to call gic_cpu_init() for secondary boot cores.

Attempt (bss cleared?) to assert gic driver was initialized before
gic_pu_init() is called.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>

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drivers: add SCIF driver

SCIF stands for "Serial Communication Interface with FIFO".
It is an UART device used on different Renesas SoCs.

Signed-off-by: Volodymyr Babchuk <volodymyr.babchuk@globall

drivers: add SCIF driver

SCIF stands for "Serial Communication Interface with FIFO".
It is an UART device used on different Renesas SoCs.

Signed-off-by: Volodymyr Babchuk <volodymyr.babchuk@globallogic.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>

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drivers: hi16xx_uart: cleanup

- The FIFOs are automatically cleared when FIFO mode is enabled, so
don't use (UART_FCR_RX_FIFO_RST | UART_FCR_TX_FIFO_RST).
- hi16xx_uart_putc() waits for the TX FIFO

drivers: hi16xx_uart: cleanup

- The FIFOs are automatically cleared when FIFO mode is enabled, so
don't use (UART_FCR_RX_FIFO_RST | UART_FCR_TX_FIFO_RST).
- hi16xx_uart_putc() waits for the TX FIFO to be empty before pushing
a new character. It is a good thing to avoid losing several characters
when the control is transferred to another piece of software which may
be resetting the UART (such as the Linux kernel). Therefore, remove the
commented out code which deals with "TX FIFO not full".

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: David Brown <david.brown@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: hi16xx_uart: remove useless dsb()'s

Since we use write32() to operate on device memory, accesses are
necessarily ordered and there is no need for data synchronization
barriers.

Signed-off-

drivers: hi16xx_uart: remove useless dsb()'s

Since we use write32() to operate on device memory, accesses are
necessarily ordered and there is no need for data synchronization
barriers.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: David Brown <david.brown@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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core: add tzc400 driver

Reviewed-by: etienne carriere <etienne.carriere@linaro.org>
Reviewed-by: David Brown <david.brown@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

core: add ps2mouse driver

Adds a PS/2 mouse driver that uses serial abstract driver for
communication with the mouse.

Reviewed-by: etienne carriere <etienne.carriere@linaro.org>
Reviewed-by: David

core: add ps2mouse driver

Adds a PS/2 mouse driver that uses serial abstract driver for
communication with the mouse.

Reviewed-by: etienne carriere <etienne.carriere@linaro.org>
Reviewed-by: David Brown <david.brown@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: add pl050 (KMI) driver

Reviewed-by: etienne carriere <etienne.carriere@linaro.org>
Reviewed-by: David Brown <david.brown@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

core: add pl111 (LCD) driver

Reviewed-by: etienne carriere <etienne.carriere@linaro.org>
Reviewed-by: David Brown <david.brown@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

core: add generic framebuffer driver

Adds a generic framebuffer driver. Currently only supports framebuffers
configured for 24BPP.

Reviewed-by: etienne carriere <etienne.carriere@linaro.org>
Review

core: add generic framebuffer driver

Adds a generic framebuffer driver. Currently only supports framebuffers
configured for 24BPP.

Reviewed-by: etienne carriere <etienne.carriere@linaro.org>
Reviewed-by: David Brown <david.brown@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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drivers: add Hi16xx RNG driver

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: David Brown <david.brown@linaro.org>
Reviewed-by: etienne carriere <etienne.carriere@linaro.

drivers: add Hi16xx RNG driver

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: David Brown <david.brown@linaro.org>
Reviewed-by: etienne carriere <etienne.carriere@linaro.org>

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core: remove TEE_ASSERT()

TEE_ASSERT() can be confusing regarding assert() as assert() can
be disabled through NDEBUG while TEE_ASSERT() can't.
Instead one should explicitly implement "if (cond) { p

core: remove TEE_ASSERT()

TEE_ASSERT() can be confusing regarding assert() as assert() can
be disabled through NDEBUG while TEE_ASSERT() can't.
Instead one should explicitly implement "if (cond) { panic(); }"

This patch removes several inclusions on tee_common_unpg.h as it
used to define TEE_ASSERT() that has been removed.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jen.wiklander@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Tested-by: Etienne Carriere <etienne.carriere@linaro.org> (QEMU)

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assert/panic: fix misuse of assert/panic

Currently implementation of macro assert() does not expand to a
no-op when NDEBUG is defined. This will be done in a later change.
Before that, fix misuses o

assert/panic: fix misuse of assert/panic

Currently implementation of macro assert() does not expand to a
no-op when NDEBUG is defined. This will be done in a later change.
Before that, fix misuses of assert() and TEE_ASSERT():
- Correct misplaced assert() that should panic() whatever NDEBUG.
- Correct misplaced TEE_ASSERT() that should simply assert().

Also cleanup many inclusions of "assert.h" and few calls of assert().

Signed-off-by: Jens Wiklander <jen.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Tested-by: Etienne Carriere <etienne.carriere@linaro.org> (QEMU)

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Add UART driver for Hisilicon Hi16xx

Applies to SoCs in the Hi16xx family, and to Phosphor V660 a.k.a. hip05
(the CPU on the Hisilicon D02 development board).

Signed-off-by: Jerome Forissier <jerom

Add UART driver for Hisilicon Hi16xx

Applies to SoCs in the Hi16xx family, and to Phosphor V660 a.k.a. hip05
(the CPU on the Hisilicon D02 development board).

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: David Brown <david.brown@linaro.org>

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gpio/pl061: add get/set interrupt and mode control functions

Signed-off-by: Victor Chong <victor.chong@linaro.org>
Reviewed-by: David Brown <david.brown@linaro.org>
Reviewed-by: Jerome Forissier <je

gpio/pl061: add get/set interrupt and mode control functions

Signed-off-by: Victor Chong <victor.chong@linaro.org>
Reviewed-by: David Brown <david.brown@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>

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