drivers: hi16xx_uart: cleanup

- The FIFOs are automatically cleared when FIFO mode is enabled, so
don't use (UART_FCR_RX_FIFO_RST | UART_FCR_TX_FIFO_RST).
- hi16xx_uart_putc() waits for the TX FIFO

drivers: hi16xx_uart: cleanup

- The FIFOs are automatically cleared when FIFO mode is enabled, so
don't use (UART_FCR_RX_FIFO_RST | UART_FCR_TX_FIFO_RST).
- hi16xx_uart_putc() waits for the TX FIFO to be empty before pushing
a new character. It is a good thing to avoid losing several characters
when the control is transferred to another piece of software which may
be resetting the UART (such as the Linux kernel). Therefore, remove the
commented out code which deals with "TX FIFO not full".

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: David Brown <david.brown@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: hi16xx_uart: remove useless dsb()'s

Since we use write32() to operate on device memory, accesses are
necessarily ordered and there is no need for data synchronization
barriers.

Signed-off-

drivers: hi16xx_uart: remove useless dsb()'s

Since we use write32() to operate on device memory, accesses are
necessarily ordered and there is no need for data synchronization
barriers.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: David Brown <david.brown@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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core: add tzc400 driver

Reviewed-by: etienne carriere <etienne.carriere@linaro.org>
Reviewed-by: David Brown <david.brown@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

core: add ps2mouse driver

Adds a PS/2 mouse driver that uses serial abstract driver for
communication with the mouse.

Reviewed-by: etienne carriere <etienne.carriere@linaro.org>
Reviewed-by: David

core: add ps2mouse driver

Adds a PS/2 mouse driver that uses serial abstract driver for
communication with the mouse.

Reviewed-by: etienne carriere <etienne.carriere@linaro.org>
Reviewed-by: David Brown <david.brown@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: add pl050 (KMI) driver

Reviewed-by: etienne carriere <etienne.carriere@linaro.org>
Reviewed-by: David Brown <david.brown@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

core: add pl111 (LCD) driver

Reviewed-by: etienne carriere <etienne.carriere@linaro.org>
Reviewed-by: David Brown <david.brown@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

core: add generic framebuffer driver

Adds a generic framebuffer driver. Currently only supports framebuffers
configured for 24BPP.

Reviewed-by: etienne carriere <etienne.carriere@linaro.org>
Review

core: add generic framebuffer driver

Adds a generic framebuffer driver. Currently only supports framebuffers
configured for 24BPP.

Reviewed-by: etienne carriere <etienne.carriere@linaro.org>
Reviewed-by: David Brown <david.brown@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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drivers: add Hi16xx RNG driver

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: David Brown <david.brown@linaro.org>
Reviewed-by: etienne carriere <etienne.carriere@linaro.

drivers: add Hi16xx RNG driver

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: David Brown <david.brown@linaro.org>
Reviewed-by: etienne carriere <etienne.carriere@linaro.org>

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core: remove TEE_ASSERT()

TEE_ASSERT() can be confusing regarding assert() as assert() can
be disabled through NDEBUG while TEE_ASSERT() can't.
Instead one should explicitly implement "if (cond) { p

core: remove TEE_ASSERT()

TEE_ASSERT() can be confusing regarding assert() as assert() can
be disabled through NDEBUG while TEE_ASSERT() can't.
Instead one should explicitly implement "if (cond) { panic(); }"

This patch removes several inclusions on tee_common_unpg.h as it
used to define TEE_ASSERT() that has been removed.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jen.wiklander@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Tested-by: Etienne Carriere <etienne.carriere@linaro.org> (QEMU)

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assert/panic: fix misuse of assert/panic

Currently implementation of macro assert() does not expand to a
no-op when NDEBUG is defined. This will be done in a later change.
Before that, fix misuses o

assert/panic: fix misuse of assert/panic

Currently implementation of macro assert() does not expand to a
no-op when NDEBUG is defined. This will be done in a later change.
Before that, fix misuses of assert() and TEE_ASSERT():
- Correct misplaced assert() that should panic() whatever NDEBUG.
- Correct misplaced TEE_ASSERT() that should simply assert().

Also cleanup many inclusions of "assert.h" and few calls of assert().

Signed-off-by: Jens Wiklander <jen.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Tested-by: Etienne Carriere <etienne.carriere@linaro.org> (QEMU)

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Add UART driver for Hisilicon Hi16xx

Applies to SoCs in the Hi16xx family, and to Phosphor V660 a.k.a. hip05
(the CPU on the Hisilicon D02 development board).

Signed-off-by: Jerome Forissier <jerom

Add UART driver for Hisilicon Hi16xx

Applies to SoCs in the Hi16xx family, and to Phosphor V660 a.k.a. hip05
(the CPU on the Hisilicon D02 development board).

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: David Brown <david.brown@linaro.org>

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gpio/pl061: add get/set interrupt and mode control functions

Signed-off-by: Victor Chong <victor.chong@linaro.org>
Reviewed-by: David Brown <david.brown@linaro.org>
Reviewed-by: Jerome Forissier <je

gpio/pl061: add get/set interrupt and mode control functions

Signed-off-by: Victor Chong <victor.chong@linaro.org>
Reviewed-by: David Brown <david.brown@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>

show more ...

gpio: support multiple instances

Signed-off-by: Victor Chong <victor.chong@linaro.org>
Reviewed-by: David Brown <david.brown@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>

drivers: add spi framework and pl022 driver

Signed-off-by: Victor Chong <victor.chong@linaro.org>
Reviewed-by: etienne carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklan

drivers: add spi framework and pl022 driver

Signed-off-by: Victor Chong <victor.chong@linaro.org>
Reviewed-by: etienne carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>

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Add support for Spreadtrum SC9860(alias whale2) board

make PLATFORM=sprd-sc9860 [CFG_ARM64_core=y]

Signed-off-by: Aijun Sun <aijun.sun@spreadtrum.com>
Reviewed-by: Jerome Forissier <jerome.forissie

Add support for Spreadtrum SC9860(alias whale2) board

make PLATFORM=sprd-sc9860 [CFG_ARM64_core=y]

Signed-off-by: Aijun Sun <aijun.sun@spreadtrum.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>

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Add Cadence UART driver

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Revi

Add Cadence UART driver

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: fixes undefined behavior

Fixes undefined behavior detected with CFG_CORE_SANITIZE_UNDEFINED=y

Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@l

core: fixes undefined behavior

Fixes undefined behavior detected with CFG_CORE_SANITIZE_UNDEFINED=y

Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

show more ...

drivers: gpio: fix write8 function argument order

Signed-off-by: Victor Chong <victor.chong@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>

drivers: add gpio framework and pl061 driver

Suggested-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Signed-off-by: Victor Chong <victor.chong@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklande

drivers: add gpio framework and pl061 driver

Suggested-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Signed-off-by: Victor Chong <victor.chong@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>

show more ...

core: add interrupt framework

Adds interrupt frameworks and adjusts gic driver to fit in.

Update plat-vexpress and sunxi platforms to initialize gic with slightly
modified interface.

Reviewed-by:

core: add interrupt framework

Adds interrupt frameworks and adjusts gic driver to fit in.

Update plat-vexpress and sunxi platforms to initialize gic with slightly
modified interface.

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU, FVP)
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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drivers/core/gic.c: Set priority mask to allow NS interrupts

The non-secure world's view of interrupt priorities only allows
it to set priorities between 0x80 and 0xff. This means that the
secure wo

drivers/core/gic.c: Set priority mask to allow NS interrupts

The non-secure world's view of interrupt priorities only allows
it to set priorities between 0x80 and 0xff. This means that the
secure world has to set the GICC_PMR (priority mask register) to
a value that allows NS interrupts, otherwise the non-secure
world will never see interrupts and has no way to set the
priorities so that it will ever see them.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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drivers/core/gic.c: Fix indentation in gic_cpu_init()

The indentation in gic_cpu_init() is using spaces rather than
tabs. Since it's a very short function and we're about to add
some code to it, fix

drivers/core/gic.c: Fix indentation in gic_cpu_init()

The indentation in gic_cpu_init() is using spaces rather than
tabs. Since it's a very short function and we're about to add
some code to it, fix the indentation first.

Fix a comment typo while we're here.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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arm: imx: add i.MX 6UltraLite and EVK board support

The i.MX 6UltraLite[1] is a high performance, ultra-efficient processor
family featuring an advanced implementation of a single ARM® Cortex®-A7
co

arm: imx: add i.MX 6UltraLite and EVK board support

The i.MX 6UltraLite[1] is a high performance, ultra-efficient processor
family featuring an advanced implementation of a single ARM® Cortex®-A7
core.

This patch add i.MX 6Ulralite EVK board support:
1. Add a uart driver for i.MX platforms
2. Introduce plat-imx for i.MX platforms
3. Introduce i.MX6 UltraLite platform
4. This patch has been tested using the following step,
4.1. build step:
PLATFORM_FLAVOR=mx6ulevk make ARCH=arm PLATFORM=imx
${CROSS_COMPILE}-objcopy -O binary out/arm-plat-imx/core/tee.elf optee.bin
copy optee.bin to the first partition of SD card which is used for boot.
4.2. Boot setting in uboot:
run loadfdt;
run loadimage;
fatload mmc 1:1 0x9c100000 optee.bin;
run mmcargs;
bootz ${loadaddr} - ${fdt_addr};
5. pass xtest

Note:
CAAM is not implemented now, this will be added later.

[1] http://www.freescale.com/webapp/sps/site/prod_summary.jsp?
code=i.MX6UL&tid=redI.MX6UL-FAMILY&uc=true&lang_cd=en

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>

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Add fsl ls1021a platform support.

Added plat-ls, with initial support for fsl ls1021a platform.
Added uart driver (ns16550).

Signed-off-by: Sumit Garg <b49020@freescale.com>
Reviewed-by: Jens Wikla

Add fsl ls1021a platform support.

Added plat-ls, with initial support for fsl ls1021a platform.
Added uart driver (ns16550).

Signed-off-by: Sumit Garg <b49020@freescale.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>

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core pl011: enable RT interrupt

Enables Receive Timeout interrupt when initializing a PL011 uart. This
will generate an interrupt very soon after each key press in the
terminal.

Signed-off-by: Jens

core pl011: enable RT interrupt

Enables Receive Timeout interrupt when initializing a PL011 uart. This
will generate an interrupt very soon after each key press in the
terminal.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (FVP)
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>

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