pl022_spi: simplify receive of remaining data

If the expected number of packets are not received during the
transmit+receive cycle, just receive the remaining data after the
cycle if the Receive FIF

pl022_spi: simplify receive of remaining data

If the expected number of packets are not received during the
transmit+receive cycle, just receive the remaining data after the
cycle if the Receive FIFO (SSPSR_RNE) is not empty, without depending
on the busy (SSPSR_BSY) flag, else we might miss reading some data as
indicated in [1].

LINK: [1] https://github.com/OP-TEE/optee_os/issues/1461#issuecomment-306156463

Signed-off-by: Victor Chong <victor.chong@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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tzc380: add region auto configuration function

The tzc_auto_configure() function takes an address, a size, the attribute
and a region as arguments. It calculates the fitting tzc380 region
configurat

tzc380: add region auto configuration function

The tzc_auto_configure() function takes an address, a size, the attribute
and a region as arguments. It calculates the fitting tzc380 region
configuration and applies it to the controller.

Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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tzc380: add function to retrieve action register

The TZC380 IP has an action configuration which defines the action taken
if a region is accessed with the wrong permissions.
Devices do not have to s

tzc380: add function to retrieve action register

The TZC380 IP has an action configuration which defines the action taken
if a region is accessed with the wrong permissions.
Devices do not have to set the action register explicitly, add a
function to retrieve the default configuration.

Signed-off-by: Rouven Czerwinski <rouven@czerwinskis.de>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: bcm_sotp: add SOTP driver

low level driver for Broadcom SOTP controller.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Si

drivers: bcm_sotp: add SOTP driver

low level driver for Broadcom SOTP controller.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Rahul Gupta <rahul.gupta@broadcom.com>
Signed-off-by: Sandeep Tripathy <sandeep.tripathy@broadcom.com>

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drivers: bcm_hwrng: add HWRNG driver

low level driver for Broadcom random number generator IP.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Bharat Kumar Reddy Gooty <bharat.g

drivers: bcm_hwrng: add HWRNG driver

low level driver for Broadcom random number generator IP.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Bharat Kumar Reddy Gooty <bharat.gooty@broadcom.com>
Signed-off-by: Sandeep Tripathy <sandeep.tripathy@broadcom.com>

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stm32_gpio: fix inline comment on GPIO bank verification

Local function ckeck_gpio_bank() panics if expected conditions
are not met. This change corrects inline comment that state
the function retur

stm32_gpio: fix inline comment on GPIO bank verification

Local function ckeck_gpio_bank() panics if expected conditions
are not met. This change corrects inline comment that state
the function returns a error code.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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stm32_i2c: handle pinctrl

Get pinctrl support from stm32_gpio.h into STM32 I2C driver.
When device tree content defines pins related to an I2C interface,
the I2C driver saves the pins configuration

stm32_i2c: handle pinctrl

Get pinctrl support from stm32_gpio.h into STM32 I2C driver.
When device tree content defines pins related to an I2C interface,
the I2C driver saves the pins configuration instances and set the
registered pins in the expected power mode at runtime.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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stm32_uart: assert clock and register base address

Assert clock and UART base address were found from
DTB instead of panicking. This can help debugging.
Invalid clock or iomem base address already l

stm32_uart: assert clock and register base address

Assert clock and UART base address were found from
DTB instead of panicking. This can help debugging.
Invalid clock or iomem base address already lead to
core panic, an assertion here is far enough.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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stm32_uart: make all local variable be initialized

Update stm32_uart driver to conform with OP-TEE directive about local
variables initialization.

Signed-off-by: Etienne Carriere <etienne.carriere@

stm32_uart: make all local variable be initialized

Update stm32_uart driver to conform with OP-TEE directive about local
variables initialization.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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stm32_etzpc: make all local variables be initialized

Update stm32_etzpc driver to conform with OP-TEE directive about local
variables initialization.

Signed-off-by: Etienne Carriere <etienne.carrie

stm32_etzpc: make all local variables be initialized

Update stm32_etzpc driver to conform with OP-TEE directive about local
variables initialization.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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stm32_etzpc: local validation functions may be unused

Local functions valid_decprot_id() valid_tzma_id() are used only
in debug configuration. This adds a __maybe_unused attribute to
prevent compil

stm32_etzpc: local validation functions may be unused

Local functions valid_decprot_id() valid_tzma_id() are used only
in debug configuration. This adds a __maybe_unused attribute to
prevent compiler from warning with a trace like:

core/drivers/stm32_etzpc.c:100:13: warning: ‘valid_tzma_id’ defined but not used [-Wunused-function]
static bool valid_tzma_id(unsigned int id)
^~~~~~~~~~~~~
core/drivers/stm32_etzpc.c:95:13: warning: ‘valid_decprot_id’ defined but not used [-Wunused-function]
static bool valid_decprot_id(unsigned int id)
^~~~~~~~~~~~~~~~

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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stm32_gpio: rename excep into exceptions

Rename variable labels excep into exceptions as more explicit.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jerome Forissier <

stm32_gpio: rename excep into exceptions

Rename variable labels excep into exceptions as more explicit.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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stm32_gpio: make all local variables be initialized

Update stm32_gpio driver to conform with OP-TEE directive about local
variables initialization.

Signed-off-by: Etienne Carriere <etienne.carriere

stm32_gpio: make all local variables be initialized

Update stm32_gpio driver to conform with OP-TEE directive about local
variables initialization.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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stm32_rng: driver for STM32 RNG

Drivers is embedded upon CFG_STM32_RNG=y.

The driver main API functions are:
- stm32_rng_read() to get a buffer of random bytes,
- stm32_rng_read_raw() to get a buff

stm32_rng: driver for STM32 RNG

Drivers is embedded upon CFG_STM32_RNG=y.

The driver main API functions are:
- stm32_rng_read() to get a buffer of random bytes,
- stm32_rng_read_raw() to get a buffer of random bytes assuming the
RNG hardware is ready, i.e clock enabled.

The device driver is initialized from DT resource when a secure DTB,
currently the embedded DTB, is found.

STM32 RNG driver assumes the platform supports at most RNG instance
in the secure world.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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stm32_i2c: driver for STM32 I2C bus

Drivers is embedded upon CFG_STM32_I2C=y.

The driver main API functions are:
stm32_i2c_init() to initialize the device driver,
stm32_i2c_mem_{write|read}() for I

stm32_i2c: driver for STM32 I2C bus

Drivers is embedded upon CFG_STM32_I2C=y.

The driver main API functions are:
stm32_i2c_init() to initialize the device driver,
stm32_i2c_mem_{write|read}() for I2C memory mode transfer,
stm32_i2c_master_{transmit|receive}() for stream transfer.

2 helpers:
stm32_i2c_is_device_ready() checks the hardware I2C link,
stm32_i2c_get_setup_from_fdt() fills the I2C initialization
structure from the content found in the DT.

I2C driver instances do not register themselves to the PM
framework. Bus owner is responsible for calling the
stm32_i2c_{suspend|resume}() APIs when the owner device
executes a PM sequence.

stm32_i2c driver is dual licensed GPL-2.0/BSD-3-Clause.
The conversion algorithm for converting device tree bindings
timing information into STM32 I2C timings configuration
register is shared with other packages (Linux kernel, Arm
Trusted Firmware-A, U-Boot).

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Signed-off-by: Pascal Paillet <p.paillet@st.com>
Signed-off-by: Pierre-Yves MORDRET <pierre-yves.mordret@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>

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core: cleanup generic traces

Remove useless newline character in few generic debug traces.

Remove argument __func__ from a FMSG trace since already
output by macro FMSG().

Remove error trace from

core: cleanup generic traces

Remove useless newline character in few generic debug traces.

Remove argument __func__ from a FMSG trace since already
output by macro FMSG().

Remove error trace from syscall_storage_obj_read() that, prior
this change, output failing error code from storage read()
handler. This is useless and not done for other storage handlers
return code.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>

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stm32_bsec: OTP driver for stm32mp platforms

BSEC is a one time programmable (OTP) memory interface for stm32mp
SoCs. OTPs are grouped into 32bit words identified by a incremental ID
starting from 0

stm32_bsec: OTP driver for stm32mp platforms

BSEC is a one time programmable (OTP) memory interface for stm32mp
SoCs. OTPs are grouped into 32bit words identified by a incremental ID
starting from 0. Shadowed OTPs are loaded in a volatile memory yet
used as OTP values by the software.

The platform shall implement stm32mp_get_bsec_static_cfg() to
provide BSEC driver some information as the BSEC memory size and
its lower/upper threshold ID that split non-secure from secure OTPs.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Christophe Montaud <christophe.montaud@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Mathieu Belou <mathieu.belou@st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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drivers: GICv3: Configure native secure interrupt

OP-TEE dispatcher registers with TF-A to handle EL1S interrupts
by design. OP-TEE should own the G1S interrupts in GICv3.
-gic_it_add() should resul

drivers: GICv3: Configure native secure interrupt

OP-TEE dispatcher registers with TF-A to handle EL1S interrupts
by design. OP-TEE should own the G1S interrupts in GICv3.
-gic_it_add() should result in configuring a given interrupt to
G1S instead of G0 for GICv3.
-G1S interrupts to be enabled at distributor interface.
-system interface register ICC_IGRPEN1_EL1 to be used to enable
G1S interrupts.

Signed-off-by: Sandeep Tripathy <sandeep.tripathy@broadcom.com>
Reviewed-by: Soby Mathew <soby.mathew@arm.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: upgrade from write32() to io_write32() and friends

Replace use of readX() and writeX() with io_readX() and io_writeX().
The former function are about to be deprecated in favor to the later.

T

core: upgrade from write32() to io_write32() and friends

Replace use of readX() and writeX() with io_readX() and io_writeX().
The former function are about to be deprecated in favor to the later.

This change upgrades core generic code and drivers.
At some place, io_clrbitsX(), io_setbitsX() and io_clrsetbitsX()
replace the writeX(readX() ...) operations when obvious.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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core_mmu: do not restrict device memory mapping to PGDIR_SIZE granularity

Device memory registered via register_phys_mem() is currently rounded
up/down to CORE_MMU_PGDIR_SIZE (1 MiB, or 2 MiB for LP

core_mmu: do not restrict device memory mapping to PGDIR_SIZE granularity

Device memory registered via register_phys_mem() is currently rounded
up/down to CORE_MMU_PGDIR_SIZE (1 MiB, or 2 MiB for LPAE). This is not
needed and possibly incorrect for SoCs that define I/O memory maps with
regions aligned on a small page (4 KiB), because using a larger
granularity could result in overlaps between secure and non-secure
mappings. This could cause issues depending on the type of memory
firewall used by the SoC and its configuration. In any case, memory
types other than MEM_AREA_IO_{SEC,NSEC} *can* be mapped with small page
granularity using register_phys_mem(), so the situation is a bit
inconsistent.

This commit removes the rounding by default and provides a new macro:
register_phys_mem_pgdir(). Platforms that still need to use PGDIR_SIZE
granularity (typically because it consumes less page table space) need
to replace register_phys_mem() by register_phys_mem_pgdir().

In order to avoid any functional change in platform code, all calls to
register_phys_mem() with device memory are replaced with
register_phys_mem_pgdir(). In addition, CORE_MMU_DEVICE_SIZE is removed
and replaced with CORE_MMU_PGDIR_SIZE since there is no unique mapping
size for device memory anymore.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reported-by: Zeng Tao <prime.zeng@hisilicon.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: change io_{clr|set|clrset}bits32() address argument type

Change API for io_clrbits32(), io_setbits32() and io_clrsetbits32() to
have a vaddr_t type address argument, rather than uintptr_t as
p

core: change io_{clr|set|clrset}bits32() address argument type

Change API for io_clrbits32(), io_setbits32() and io_clrsetbits32() to
have a vaddr_t type address argument, rather than uintptr_t as
previously.

This change updates accordingly the callers of these functions
that cover only stm32mp1 related resources.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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stm32_gpio: driver for GPIO and pin control

Driver is embedded upon CFG_STM32_GPIO=y.

STM32 GPIO driver API main functions:
- stm32_gpio_set_output_level() sets target output GPIO level,
- stm32_gp

stm32_gpio: driver for GPIO and pin control

Driver is embedded upon CFG_STM32_GPIO=y.

STM32 GPIO driver API main functions:
- stm32_gpio_set_output_level() sets target output GPIO level,
- stm32_gpio_get_input_level() returns target input GPIO level,
- stm32_pinctrl_load_active_cfg() loads interface pin mux active state,
- stm32_pinctrl_load_standby_cfg() loads interface pin mux standby state,
- stm32_pinctrl_fdt_get_pinctrl() save pin configuration from DT content,
- stm32_gpio_set_secure_cfg() sets secure state for target GPIO/pin mux.

GPIO driver does not register to PM framework. It is the GPIO/pin owner
responsibility to call stm32_pinctrl_load_{active|standby}_cfg() on
peripherals power state transitions.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Mathieu Belou <mathieu.belou@st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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stm32_etzpc: STM32 Extended TrustZone Protection Controller

ETZPC is a hardware instance that control access permissions to
some stm32mp SoC peripheral interfaces and internal memories.

This change

stm32_etzpc: STM32 Extended TrustZone Protection Controller

ETZPC is a hardware instance that control access permissions to
some stm32mp SoC peripheral interfaces and internal memories.

This change introduce the stm32_etzpc driver. It is embedded upon
build directive CFG_STM32_ETZPC=y.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Mathieu BELOU <mathieu.belou@st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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pl011.c: use nex_malloc allocator

pl011 driver is a core code, so it should use nexus memory allocator.

Signed-off-by: Volodymyr Babchuk <vlad.babchuk@gmail.com>
Reviewed-by: Jens Wiklander <jens.w

pl011.c: use nex_malloc allocator

pl011 driver is a core code, so it should use nexus memory allocator.

Signed-off-by: Volodymyr Babchuk <vlad.babchuk@gmail.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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stm32_uart: API to init console bus from a DTB

Introduce stm32_uart_init_from_dt_node() that initializes an UART
device from the given DT node. The function returns the reference
to the created UART

stm32_uart: API to init console bus from a DTB

Introduce stm32_uart_init_from_dt_node() that initializes an UART
device from the given DT node. The function returns the reference
to the created UART instance.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Joakim Bech <joakim.bech@linaro.org>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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