dts: stm32: add TAMP RIF configuration for stm32mp257f-ev1 board

Add a TAMP RIF configuration for stm32mp257f-ev1 board to configure
backup registers and TAMP resources.

Signed-off-by: Gatien Cheva

dts: stm32: add TAMP RIF configuration for stm32mp257f-ev1 board

Add a TAMP RIF configuration for stm32mp257f-ev1 board to configure
backup registers and TAMP resources.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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dts: stm32: add TAMP peripheral node in stm32mp251.dtsi

Add TAMP peripheral node in stm32mp251.dtsi. The TAMP peripheral manages
monotonic counters, tamper events and backup registers.

Signed-off-b

dts: stm32: add TAMP peripheral node in stm32mp251.dtsi

Add TAMP peripheral node in stm32mp251.dtsi. The TAMP peripheral manages
monotonic counters, tamper events and backup registers.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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dts: stm32: add st,backup-zones property in TAMP node in stm32mp151.dtsi

Add st,backup-zones property in TAMP node in stm32mp151.dtsi.
It defines the topology of the backup registers zones. The numb

dts: stm32: add st,backup-zones property in TAMP node in stm32mp151.dtsi

Add st,backup-zones property in TAMP node in stm32mp151.dtsi.
It defines the topology of the backup registers zones. The number of zones
on stm32mp13x platforms is 3.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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dts: stm32: add st,backup-zones property in TAMP node in stm32mp131.dtsi

Add st,backup-zones property in TAMP node in stm32mp131.dtsi.
It defines the topology of the backup registers zones. The numb

dts: stm32: add st,backup-zones property in TAMP node in stm32mp131.dtsi

Add st,backup-zones property in TAMP node in stm32mp131.dtsi.
It defines the topology of the backup registers zones. The number of zones
on stm32mp13x platforms is 3.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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dts: stm32: fix stm32mp257f-ev1 clock tree configuration

Fix some mux and flexgen configurations for the stm32mp257f-ev1 board.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Revi

dts: stm32: fix stm32mp257f-ev1 clock tree configuration

Fix some mux and flexgen configurations for the stm32mp257f-ev1 board.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
Fixes: 9223d8a0fc1d ("dts: st: add RCC support on stm32mp257f-ev1")

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dts: stm32: support some RIF-aware peripherals

Update the RIF configuration of the stm32mp257f-ev1 board so to support
the configuration of HPDMA1/2/3, IPCC1/2 and HSEM peripherals.
While there, upd

dts: stm32: support some RIF-aware peripherals

Update the RIF configuration of the stm32mp257f-ev1 board so to support
the configuration of HPDMA1/2/3, IPCC1/2 and HSEM peripherals.
While there, update other parts of the RIF configuration.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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dts: stm32: update some RIF-aware peripherals nodes in stm32mp251

Add clock, interrupt and reset properties for HPDMA1/2/3, IPCC1/2,
FMC and HSEM.

Signed-off-by: Gatien Chevallier <gatien.chevallie

dts: stm32: update some RIF-aware peripherals nodes in stm32mp251

Add clock, interrupt and reset properties for HPDMA1/2/3, IPCC1/2,
FMC and HSEM.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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plat-stm32mp1: use firewall framework to configure internal RAMs

Use firewall API functions in stm32mp1 platform implementation to
configure the secure state of internal RAMs.

This change is a step

plat-stm32mp1: use firewall framework to configure internal RAMs

Use firewall API functions in stm32mp1 platform implementation to
configure the secure state of internal RAMs.

This change is a step in the removal of the shared_resource driver
that will be deprecated once the stm32mp1 platform drivers fully
move to the firewall framework resources.

This change also removes local SCMI_SHM_IS_IN_SRAMX macro (for
sake of simplicity) which can be replaced by testing
CFG_STM32MP1_SCMI_SHM_BASE!=0 that denotes that the SCMI shared
memory is not in an internal RAM in the platform configuration.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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plat-stm32mp1: define STM32MP13 SRAMs and STM32MP15 RETRAM

Define some platform internal RAMs base address and sizes for STM32MP13
and STM32MP15 SoCs.

Signed-off-by: Etienne Carriere <etienne.carri

plat-stm32mp1: define STM32MP13 SRAMs and STM32MP15 RETRAM

Define some platform internal RAMs base address and sizes for STM32MP13
and STM32MP15 SoCs.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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plat-stm32mp1: add stm32mp1_ram_intersect_pager_ram()

Add stm32mp1_ram_intersect_pager_ram() helper function to ease checking
when a memory range falls into OP-TEE pager pool. This will be needed
la

plat-stm32mp1: add stm32mp1_ram_intersect_pager_ram()

Add stm32mp1_ram_intersect_pager_ram() helper function to ease checking
when a memory range falls into OP-TEE pager pool. This will be needed
later to ensure memory used by OP-TEE pager is not re-assigned to
another purpose. This change only consider STM32MP15 variant where
OP-TEE pager can be used in internal RAMs.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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plat-stm32mp1: add stm32mp1_pa_or_sram_alias_pa()

Add stm32mp1_pa_or_sram_alias_pa() helper function to ease handling
SRAMx physical addresses that have aliases on STM32MP15 SoC.

Signed-off-by: Eti

plat-stm32mp1: add stm32mp1_pa_or_sram_alias_pa()

Add stm32mp1_pa_or_sram_alias_pa() helper function to ease handling
SRAMx physical addresses that have aliases on STM32MP15 SoC.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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core: change get_core_pos_mpidr() to support hypervisor

The secure hypervisor, such as Hafnium, is expected to manipulate
MPIDR_EL1 to indicate a VCPU ID.

This commit makes get_core_pos_mpidr() not

core: change get_core_pos_mpidr() to support hypervisor

The secure hypervisor, such as Hafnium, is expected to manipulate
MPIDR_EL1 to indicate a VCPU ID.

This commit makes get_core_pos_mpidr() not calculate a CPU ID
using the affinity bitfields of MPIDR_EL1 when there is a hypervisor
in SEL2.

Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
Signed-off-by: Sungbae Yoo <sungbaey@nvidia.com>

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plat-stm32mp1: shared_resource stops checking clock dependencies

Remove management of STM32MP15 secure clock support from the
platform specific share_resource.c driver. It is not needed STM32
ETZPC

plat-stm32mp1: shared_resource stops checking clock dependencies

Remove management of STM32MP15 secure clock support from the
platform specific share_resource.c driver. It is not needed STM32
ETZPC and RCC platform drivers now checks these dependencies.

Therefore the change removes stm32mp_register_clock_parents_secure()
and its related and ensures stm32mp_register_[non_]secure_xxx()
(from shared_resource.c driver) is not used for a clock (here PLL3).

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>

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drivers: clk: stm32mp15: default disable mckprot hardening

Default disable RCC MCKPROT hardening configuration for STM32MP15
platforms since remoteproc driver enables it when required.

Remove disab

drivers: clk: stm32mp15: default disable mckprot hardening

Default disable RCC MCKPROT hardening configuration for STM32MP15
platforms since remoteproc driver enables it when required.

Remove disabling of RCC MCKPROT from STM32MP15 shared_resource driver
since this is now done from the STM32MP15 clock driver.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>

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plat-ls: use fdt_reg_info()

Use fdt_reg_info() instead of fdt_reg_base_address() and fdt_reg_size()
to optimize look up in the DT due to finding parent node.

Signed-off-by: Etienne Carriere <etienn

plat-ls: use fdt_reg_info()

Use fdt_reg_info() instead of fdt_reg_base_address() and fdt_reg_size()
to optimize look up in the DT due to finding parent node.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-stm32mp1: move sanity of RCC secure state against BSEC state

Move implementation that verifies STM32MP1 device Secure Closed state
(read from BSEC OTP fuses) against RCC secure hardening config

plat-stm32mp1: move sanity of RCC secure state against BSEC state

Move implementation that verifies STM32MP1 device Secure Closed state
(read from BSEC OTP fuses) against RCC secure hardening configuration.
It is moved from shared_resource.c platform driver to platform main.c.
This change prepares the removal of shared_resource.c driver that is
no longer needed since integration of the firewall framework.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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plat-stm32mp1: remove unused stm32mp_nsec_can_access_pmic_regu()

Remove unused platform function stm32mp_nsec_can_access_pmic_regu().

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

plat-stm32mp1: remove unused stm32mp_nsec_can_access_pmic_regu()

Remove unused platform function stm32mp_nsec_can_access_pmic_regu().

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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plat-stm32mp1: scmi_server: remove useless assertion on rstctrl

Remove useless assertion on reset controller handle value.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by

plat-stm32mp1: scmi_server: remove useless assertion on rstctrl

Remove useless assertion on reset controller handle value.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>

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plat-stm32mp1: scmi_server: permit MCU reset upon remoteproc security

Forbid SCMI accesses to MCU reset controllers when remote processor
is to be managed through OP-TEE remoteproc services.

Signed

plat-stm32mp1: scmi_server: permit MCU reset upon remoteproc security

Forbid SCMI accesses to MCU reset controllers when remote processor
is to be managed through OP-TEE remoteproc services.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>

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plat-k3: disable PRNG by default for all K3

All K3 devices already have PRNG disabled, remove the check and
set this unconditionally.

Signed-off-by: Andrew Davis <afd@ti.com>
Acked-by: Jerome Foris

plat-k3: disable PRNG by default for all K3

All K3 devices already have PRNG disabled, remove the check and
set this unconditionally.

Signed-off-by: Andrew Davis <afd@ti.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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dts: stm32: secure optee_framebuffer memory region on stm32mp135f-dk

Add support for the TZC400 configuration for the optee_framebuffer
memory region on the stm32mp135f-dk board

Signed-off-by: Gati

dts: stm32: secure optee_framebuffer memory region on stm32mp135f-dk

Add support for the TZC400 configuration for the optee_framebuffer
memory region on the stm32mp135f-dk board

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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plat-stm32mp1: update the plat_tzc400 driver to support device tree

Add the usage of device tree memory regions defined to configure the
TZC400 firewall controller.

Signed-off-by: Gatien Chevallier

plat-stm32mp1: update the plat_tzc400 driver to support device tree

Add the usage of device tree memory regions defined to configure the
TZC400 firewall controller.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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dts: stm32: add TZC400 node in the stm32mp151 SoC device tree file

Add the TZC400 node in the stm32mp151 SoC device tree file and default
enable it.

Signed-off-by: Gatien Chevallier <gatien.chevall

dts: stm32: add TZC400 node in the stm32mp151 SoC device tree file

Add the TZC400 node in the stm32mp151 SoC device tree file and default
enable it.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: stm32_etzpc: new driver to use firewall API

Implement stm32_etzpc.c driver in the firewall driver directory.
Use the new firewall API to populate the firewall bus and register
the ETZPC as

drivers: stm32_etzpc: new driver to use firewall API

Implement stm32_etzpc.c driver in the firewall driver directory.
Use the new firewall API to populate the firewall bus and register
the ETZPC as a firewall provider.

Implement a driver specific firewall bus probe that will
only probe secure peripherals and implement firewall exceptions for
which no firewall operations will be done when CFG_INSECURE is set.
This allows, for example, to share a console with the non-secure world
for development purposes.

The ETZPC driver register the following ops:
-set_conf
-acquire_access
-acquire_memory_access

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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plat-stm32mp1: add CFG_STM32_ALLOW_UNSAFE_PROBE to probe unsafe peripherals

Add CFG_STM32_ALLOW_UNSAFE_PROBE that allows to unsafely probe
peripherals. This means that the firewall configuration wil

plat-stm32mp1: add CFG_STM32_ALLOW_UNSAFE_PROBE to probe unsafe peripherals

Add CFG_STM32_ALLOW_UNSAFE_PROBE that allows to unsafely probe
peripherals. This means that the firewall configuration will not be
checked before probing a peripheral. Default enable this switch for
DH platforms that use non-securable peripherals in OP-TEE.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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