core: imx: add support imx93evk platform

Add the support for imx93evk platform.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-b

core: imx: add support imx93evk platform

Add the support for imx93evk platform.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: imx: add imx93 SoC ID

Add the imx93 SoC ID.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklan

core: imx: add imx93 SoC ID

Add the imx93 SoC ID.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: imx: add imx93 registers

Add the imx93 registers.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.

core: imx: add imx93 registers

Add the imx93 registers.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: imx: simplify the error macro message

Simplify the error macro message for less maintenance when it comes to
introduce new platforms.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Revi

core: imx: simplify the error macro message

Simplify the error macro message for less maintenance when it comes to
introduce new platforms.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-corstone1000: add corstone1000 platform

These changes are to add corstone1000 platform to optee
core.
arch/arm/plat-vexpress is taken as a reference to make
these changes.

Signed-off-by: Vishn

plat-corstone1000: add corstone1000 platform

These changes are to add corstone1000 platform to optee
core.
arch/arm/plat-vexpress is taken as a reference to make
these changes.

Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: link: add --no-warn-rwx-segments

binutils ld.bfd generates one RWX LOAD segment by merging several sections
with mixed R/W/X attributes (.text, .rodata, .data). After version 2.38 it
also warn

core: link: add --no-warn-rwx-segments

binutils ld.bfd generates one RWX LOAD segment by merging several sections
with mixed R/W/X attributes (.text, .rodata, .data). After version 2.38 it
also warns by default when that happens [1], which breaks the build due to
--fatal-warnings. The RWX segment is not a problem for the TEE core, since
that information is not used to set memory permissions. Therefore, silence
the warning.

Link: [1] https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=ba951afb99912da01a6e8434126b8fac7aa75107
Link: https://sourceware.org/bugzilla/show_bug.cgi?id=29448
Reported-by: Dominique Martinet <dominique.martinet@atmark-techno.com>
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: plat-bcm: remove virtual address lookup from main_init_gic()

- Commit 60801696667d ("plat: arm: refactor GIC initialization")
refactored GIC initialization to have gic_init_base_addr() take

core: plat-bcm: remove virtual address lookup from main_init_gic()

- Commit 60801696667d ("plat: arm: refactor GIC initialization")
refactored GIC initialization to have gic_init_base_addr() take in a
physical address instead of a virtual one, meaning that a virtual
address lookup is no longer necessary within a platform's gic_init().
- BCM's main_init_gic() would still perform a virtual memory lookup and
hand over its virtual address instead of the expected physical one.
This caused the lookup in gic_init_base_addr() to fail and panic.
- This new commit removes the virtual memory lookup from BCM's
main_gic_init() and instead hands gic_init_base_addr() a physical
address.

Signed-off-by: Andrew Mustea <andrew.mustea@microsoft.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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dts: stm32mp15: bump to Linux v5.19-rc6 dts files
Synchronize with stm32mp15 dts(i) files from Linux v5.19-rc6.

Changes made to imported dts(i) files:
- stm32mp151.dtsi: add ETZPC node, declare PSCI

dts: stm32mp15: bump to Linux v5.19-rc6 dts files
Synchronize with stm32mp15 dts(i) files from Linux v5.19-rc6.

Changes made to imported dts(i) files:
- stm32mp151.dtsi: add ETZPC node, declare PSCI v1.0.
- stm32mp151.dtsi: add iwdg1 node as before
- stm32mp151.dtsi: add iwdg2 interrupt definition
- stm32mp151.dtsi: add tamp node clocks definition
- stm32mp151.dtsi: keep pin-controller{,-z} node names
- stm32mp157a-dk1.dts: disable RCC secure-status.
- stm32mp157c-dk2.dts: disable RCC secure-status.
- stm32mp157c-dk2.dts: drop cryp1 okay status
- stm32mp157c-ed1.dts (included by ev1): disable RCC secure-status.
- stm32mp157c-ed1.dts: (included by ev1): drop cryp1 okay status
- Remove resources related to input DT bindings using explicit inline
comments as those are under Linux kernel GPLv2 licensing model.

This update is required to add a new board based on Linux 5.19-rc6
dts file.

Signed-off-by: Johann Neuhauser <jneuhauser@dh-electronics.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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plat-totalcompute: Introduce TC2

Added TC2 platform support

Signed-off-by: Rupinderjit Singh <rupinderjit.singh@arm.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jerome Fo

plat-totalcompute: Introduce TC2

Added TC2 platform support

Signed-off-by: Rupinderjit Singh <rupinderjit.singh@arm.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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plat-stm: Switch to hw_get_random_bytes()

hw_get_random_byte() is no longer used. The default crypto_rng_read()
calls hw_get_random_bytes() now so implement just hw_get_random_bytes().

Signed-off-b

plat-stm: Switch to hw_get_random_bytes()

hw_get_random_byte() is no longer used. The default crypto_rng_read()
calls hw_get_random_bytes() now so implement just hw_get_random_bytes().

Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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plat-rcar: Switch to hw_get_random_bytes()

hw_get_random_byte() is no longer used. The default crypto_rng_read()
calls hw_get_random_bytes() now so implement just hw_get_random_bytes().

Signed-off-

plat-rcar: Switch to hw_get_random_bytes()

hw_get_random_byte() is no longer used. The default crypto_rng_read()
calls hw_get_random_bytes() now so implement just hw_get_random_bytes().

Signed-off-by: Andrew Davis <afd@ti.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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plat-k3: Switch to hw_get_random_bytes()

hw_get_random_byte() is no longer used. The default crypto_rng_read()
calls hw_get_random_bytes() now so implement just hw_get_random_bytes().

Signed-off-by

plat-k3: Switch to hw_get_random_bytes()

hw_get_random_byte() is no longer used. The default crypto_rng_read()
calls hw_get_random_bytes() now so implement just hw_get_random_bytes().

Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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plat-k3: Factor out sa2ul_rng_read128()

The core function is a 128bit RNG read. Factor this out into
its own function to help with the switch to hw_get_random_bytes().

Signed-off-by: Andrew Davis <

plat-k3: Factor out sa2ul_rng_read128()

The core function is a 128bit RNG read. Factor this out into
its own function to help with the switch to hw_get_random_bytes().

Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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plar: rcar: Use common crypto_rng_read() over hw_get_random_byte()

This has the same effect and removes the last user of
hw_get_random_byte() allowing us to start converting platforms
to hw_get_rand

plar: rcar: Use common crypto_rng_read() over hw_get_random_byte()

This has the same effect and removes the last user of
hw_get_random_byte() allowing us to start converting platforms
to hw_get_random_bytes() and removing hw_get_random_byte().

Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-rcar: Software PRNG should be disabled when using hardware generator

On RCAR_GEN3 platforms, a hardware random number generator is available
and the HWRNG_PTA is enabled. For this to work right

plat-rcar: Software PRNG should be disabled when using hardware generator

On RCAR_GEN3 platforms, a hardware random number generator is available
and the HWRNG_PTA is enabled. For this to work right the software PRNG
should be disabled.

Signed-off-by: Andrew Davis <afd@ti.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: stm32_gpio: temporary GPIO configuration for STM32MP13

This temporary change set all configured GPIOs to non-secure state
on STM32MP13 platform. This change is needed while we align all
com

drivers: stm32_gpio: temporary GPIO configuration for STM32MP13

This temporary change set all configured GPIOs to non-secure state
on STM32MP13 platform. This change is needed while we align all
components.

Changes I2C driver to assign I2C pins to secure world for STM32MP13.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-stm32mp1: temporary ETZPC configuration

As device-tree configuration for the ETZPC is not yet handled,
add a temporary configuration in the platform main.

Signed-off-by: Gatien Chevallier <gat

plat-stm32mp1: temporary ETZPC configuration

As device-tree configuration for the ETZPC is not yet handled,
add a temporary configuration in the platform main.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-stm32mp1: add APB6 memory mapping

This patch adds the secure memory mapping for APB6.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.ca

plat-stm32mp1: add APB6 memory mapping

This patch adds the secure memory mapping for APB6.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-stm32mp1: define specific STM32MP13 peripheral addresses

Some peripheral addresses differ from STM32MP15 to STM32MP13.
This change adds support for those differences.

Signed-off-by: Gatien Che

plat-stm32mp1: define specific STM32MP13 peripheral addresses

Some peripheral addresses differ from STM32MP15 to STM32MP13.
This change adds support for those differences.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-stm32mp1: tzc400: support STM32MP13

On STM32MP13 platforms, there is only one TZC filter unit.
Therefore, differentiate the TZC_FILTERS_MASK from the STM32MP15,
which has two.

Signed-off-by: G

plat-stm32mp1: tzc400: support STM32MP13

On STM32MP13 platforms, there is only one TZC filter unit.
Therefore, differentiate the TZC_FILTERS_MASK from the STM32MP15,
which has two.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-stm32mp1: conf: introduce STM32MP13 configuration

This change introduces STM32MP13 minimal configuration and
differentiates STM32MP15 platform from the STM32MP13 one by enabling
or disabling sp

plat-stm32mp1: conf: introduce STM32MP13 configuration

This change introduces STM32MP13 minimal configuration and
differentiates STM32MP15 platform from the STM32MP13 one by enabling
or disabling specific switches.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-stm32mp1: CFG_TZSRAM_START may not be defined

STM32MP13 SoCs do not use internal RAM to run OP-TEE hence do not
define CFG_TZSRAM_START/SIZE for that platform.

Signed-off-by: Gatien Chevallier

plat-stm32mp1: CFG_TZSRAM_START may not be defined

STM32MP13 SoCs do not use internal RAM to run OP-TEE hence do not
define CFG_TZSRAM_START/SIZE for that platform.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-stm32mp1: conf: set variant config before common default configs

Moves definition of variant config (MP15/MP13) to conf.mk file top,
before common switches default initialization. This is more

plat-stm32mp1: conf: set variant config before common default configs

Moves definition of variant config (MP15/MP13) to conf.mk file top,
before common switches default initialization. This is more flexible
to define target specific configuration.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-stm32mp1: conf: implement switch list for CFG_STM32MP15|13

CFG_STM32MP15 and CFG_STM32MP13 are part of a configuration choice list,
one and one only of the items shall be enabled.

Highlight th

plat-stm32mp1: conf: implement switch list for CFG_STM32MP15|13

CFG_STM32MP15 and CFG_STM32MP13 are part of a configuration choice list,
one and one only of the items shall be enabled.

Highlight that with an inline comment and some logic. The default target
is CFG_STM32MP15 for backward compatibility.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-stm32mp1: conf: introduce STM32MP1 flavorlists

Add flavorlist-MP13 to list boards currently supported for the
STM32MP13 SoC.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Re

plat-stm32mp1: conf: introduce STM32MP1 flavorlists

Add flavorlist-MP13 to list boards currently supported for the
STM32MP13 SoC.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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