1# 1GB and 512MB DDR targets do not locate secure DDR at the same place. 2flavor_dts_file-157A_DK1 = stm32mp157a-dk1.dts 3flavor_dts_file-157C_DK2 = stm32mp157c-dk2.dts 4flavor_dts_file-157C_ED1 = stm32mp157c-ed1.dts 5flavor_dts_file-157C_EV1 = stm32mp157c-ev1.dts 6 7flavor_dts_file-135F_DK = stm32mp135f-dk.dts 8 9flavorlist-cryp-512M = $(flavor_dts_file-157C_DK2) \ 10 $(flavor_dts_file-135F_DK) 11 12flavorlist-no_cryp-512M = $(flavor_dts_file-157A_DK1) 13 14flavorlist-cryp-1G = $(flavor_dts_file-157C_ED1) \ 15 $(flavor_dts_file-157C_EV1) 16 17flavorlist-no_cryp = $(flavorlist-no_cryp-512M) 18 19flavorlist-512M = $(flavorlist-cryp-512M) \ 20 $(flavorlist-no_cryp-512M) 21 22flavorlist-1G = $(flavorlist-cryp-1G) 23 24flavorlist-MP15 = $(flavor_dts_file-157A_DK1) \ 25 $(flavor_dts_file-157C_DK2) \ 26 $(flavor_dts_file-157C_ED1) \ 27 $(flavor_dts_file-157C_EV1) 28 29flavorlist-MP13 = $(flavor_dts_file-135F_DK) 30 31ifneq ($(PLATFORM_FLAVOR),) 32ifeq ($(flavor_dts_file-$(PLATFORM_FLAVOR)),) 33$(error Invalid platform flavor $(PLATFORM_FLAVOR)) 34endif 35CFG_EMBED_DTB_SOURCE_FILE ?= $(flavor_dts_file-$(PLATFORM_FLAVOR)) 36endif 37 38ifneq ($(filter $(CFG_EMBED_DTB_SOURCE_FILE),$(flavorlist-no_cryp)),) 39$(call force,CFG_STM32_CRYP,n) 40endif 41 42ifneq ($(filter $(CFG_EMBED_DTB_SOURCE_FILE),$(flavorlist-MP13)),) 43$(call force,CFG_STM32MP13,y) 44endif 45 46ifneq ($(filter $(CFG_EMBED_DTB_SOURCE_FILE),$(flavorlist-MP15)),) 47$(call force,CFG_STM32MP15,y) 48endif 49 50include core/arch/arm/cpu/cortex-a7.mk 51 52$(call force,CFG_BOOT_SECONDARY_REQUEST,y) 53$(call force,CFG_DRIVERS_CLK,y) 54$(call force,CFG_DRIVERS_CLK_FIXED,n) 55$(call force,CFG_GIC,y) 56$(call force,CFG_INIT_CNTVOFF,y) 57$(call force,CFG_PSCI_ARM32,y) 58$(call force,CFG_SECONDARY_INIT_CNTFRQ,y) 59$(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y) 60$(call force,CFG_SM_PLATFORM_HANDLER,y) 61$(call force,CFG_STM32_SHARED_IO,y) 62 63CFG_TEE_CORE_NB_CORE ?= 2 64CFG_WITH_PAGER ?= y 65CFG_WITH_LPAE ?= y 66CFG_WITH_SOFTWARE_PRNG ?= y 67CFG_MMAP_REGIONS ?= 23 68CFG_DTB_MAX_SIZE ?= (256 * 1024) 69CFG_CORE_ASLR ?= n 70 71ifeq ($(CFG_EMBED_DTB_SOURCE_FILE),) 72# Some drivers mandate DT support 73$(call force,CFG_DRIVERS_CLK_DT,n) 74$(call force,CFG_STM32_CRYP,n) 75$(call force,CFG_STM32_GPIO,n) 76$(call force,CFG_STM32_I2C,n) 77$(call force,CFG_STM32_IWDG,n) 78$(call force,CFG_STM32_TAMP,n) 79$(call force,CFG_STPMIC1,n) 80$(call force,CFG_STM32MP1_SCMI_SIP,n) 81$(call force,CFG_SCMI_PTA,n) 82else 83$(call force,CFG_DRIVERS_CLK_DT,y) 84endif 85 86ifeq ($(CFG_STM32MP13),y) 87$(call force,CFG_CORE_RESERVED_SHM,n) 88$(call force,CFG_STM32MP15,n) 89$(call force,CFG_STM32MP_CLK_CORE,y) 90$(call force,CFG_STM32MP1_SHARED_RESOURCES,n) 91$(call force,CFG_STM32MP13_CLK,y) 92$(call force,CFG_STM32MP15_CLK,n) 93CFG_STM32MP_OPP_COUNT ?= 2 94else 95$(call force,CFG_STM32MP1_SHARED_RESOURCES,y) 96CFG_CORE_RESERVED_SHM ?= y 97$(call force,CFG_STM32MP15,y) 98$(call force,CFG_STM32MP15_CLK,y) 99endif 100 101ifneq ($(filter $(CFG_EMBED_DTB_SOURCE_FILE),$(flavorlist-512M)),) 102CFG_TZDRAM_START ?= 0xde000000 103CFG_DRAM_SIZE ?= 0x20000000 104endif 105 106CFG_DRAM_BASE ?= 0xc0000000 107CFG_DRAM_SIZE ?= 0x40000000 108CFG_TZSRAM_START ?= 0x2ffc0000 109CFG_TZSRAM_SIZE ?= 0x0003f000 110CFG_STM32MP1_SCMI_SHM_BASE ?= 0x2ffff000 111CFG_STM32MP1_SCMI_SHM_SIZE ?= 0x00001000 112ifeq ($(CFG_STM32MP15),y) 113CFG_TZDRAM_START ?= 0xfe000000 114CFG_TZDRAM_SIZE ?= 0x01e00000 115ifeq ($(CFG_CORE_RESERVED_SHM),y) 116CFG_SHMEM_START ?= ($(CFG_TZDRAM_START) + $(CFG_TZDRAM_SIZE)) 117CFG_SHMEM_SIZE ?= ($(CFG_DRAM_BASE) + $(CFG_DRAM_SIZE) - $(CFG_SHMEM_START)) 118endif 119else 120CFG_TZDRAM_SIZE ?= 0x02000000 121CFG_TZDRAM_START ?= ($(CFG_DRAM_BASE) + $(CFG_DRAM_SIZE) - $(CFG_TZDRAM_SIZE)) 122endif #CFG_STM32MP15 123 124CFG_STM32_BSEC ?= y 125CFG_STM32_CRYP ?= y 126CFG_STM32_ETZPC ?= y 127CFG_STM32_GPIO ?= y 128CFG_STM32_I2C ?= y 129CFG_STM32_IWDG ?= y 130CFG_STM32_RNG ?= y 131CFG_STM32_RSTCTRL ?= y 132CFG_STM32_TAMP ?= y 133CFG_STM32_UART ?= y 134CFG_STPMIC1 ?= y 135CFG_TZC400 ?= y 136 137ifeq ($(CFG_STPMIC1),y) 138$(call force,CFG_STM32_I2C,y) 139$(call force,CFG_STM32_GPIO,y) 140endif 141 142# if any crypto driver is enabled, enable the crypto-framework layer 143ifeq ($(call cfg-one-enabled, CFG_STM32_CRYP),y) 144$(call force,CFG_STM32_CRYPTO_DRIVER,y) 145endif 146 147CFG_DRIVERS_RSTCTRL ?= $(CFG_STM32_RSTCTRL) 148$(eval $(call cfg-depends-all,CFG_STM32_RSTCTRL,CFG_DRIVERS_RSTCTRL)) 149 150CFG_WDT ?= $(CFG_STM32_IWDG) 151 152# Platform specific configuration 153CFG_STM32MP_PANIC_ON_TZC_PERM_VIOLATION ?= y 154 155# SiP/OEM service for non-secure world 156CFG_STM32_BSEC_SIP ?= y 157CFG_STM32MP1_SCMI_SIP ?= n 158ifeq ($(CFG_STM32MP1_SCMI_SIP),y) 159$(call force,CFG_SCMI_MSG_DRIVERS,y,Mandated by CFG_STM32MP1_SCMI_SIP) 160$(call force,CFG_SCMI_MSG_SMT,y,Mandated by CFG_STM32MP1_SCMI_SIP) 161$(call force,CFG_SCMI_MSG_SMT_FASTCALL_ENTRY,y,Mandated by CFG_STM32MP1_SCMI_SIP) 162endif 163 164# Default enable SCMI PTA support 165CFG_SCMI_PTA ?= y 166ifeq ($(CFG_SCMI_PTA),y) 167$(call force,CFG_SCMI_MSG_DRIVERS,y,Mandated by CFG_SCMI_PTA) 168$(call force,CFG_SCMI_MSG_SMT_THREAD_ENTRY,y,Mandated by CFG_SCMI_PTA) 169CFG_SCMI_MSG_SHM_MSG ?= y 170CFG_SCMI_MSG_SMT ?= y 171endif 172 173CFG_SCMI_MSG_DRIVERS ?= n 174ifeq ($(CFG_SCMI_MSG_DRIVERS),y) 175$(call force,CFG_SCMI_MSG_CLOCK,y) 176$(call force,CFG_SCMI_MSG_RESET_DOMAIN,y) 177CFG_SCMI_MSG_SHM_MSG ?= y 178CFG_SCMI_MSG_SMT ?= y 179CFG_SCMI_MSG_SMT_THREAD_ENTRY ?= y 180$(call force,CFG_SCMI_MSG_VOLTAGE_DOMAIN,y) 181endif 182 183ifneq ($(CFG_WITH_SOFTWARE_PRNG),y) 184CFG_HWRNG_PTA ?= y 185endif 186ifeq ($(CFG_HWRNG_PTA),y) 187$(call force,CFG_STM32_RNG,y,Mandated by CFG_HWRNG_PTA) 188$(call force,CFG_WITH_SOFTWARE_PRNG,n,Mandated by CFG_HWRNG_PTA) 189$(call force,CFG_HWRNG_QUALITY,1024) 190endif 191 192# Provision enough threads to pass xtest 193ifneq (,$(filter y,$(CFG_SCMI_PTA) $(CFG_STM32MP1_SCMI_SIP))) 194ifeq ($(CFG_WITH_PAGER),y) 195CFG_NUM_THREADS ?= 3 196else 197CFG_NUM_THREADS ?= 10 198endif 199endif 200 201# Default enable some test facitilites 202CFG_ENABLE_EMBEDDED_TESTS ?= y 203CFG_WITH_STATS ?= y 204 205# Enable to allow debug 206CFG_STM32_BSEC_WRITE ?= $(CFG_TEE_CORE_DEBUG) 207 208# Default disable some support for pager memory size constraint 209ifeq ($(CFG_WITH_PAGER),y) 210CFG_TEE_CORE_DEBUG ?= n 211CFG_UNWIND ?= n 212CFG_LOCKDEP ?= n 213CFG_TA_BGET_TEST ?= n 214# Default disable early TA compression to support a smaller HEAP size 215CFG_EARLY_TA_COMPRESS ?= n 216CFG_CORE_HEAP_SIZE ?= 49152 217endif 218 219# Non-secure UART and GPIO/pinctrl for the output console 220CFG_WITH_NSEC_GPIOS ?= y 221CFG_WITH_NSEC_UARTS ?= y 222# UART instance used for early console (0 disables early console) 223CFG_STM32_EARLY_CONSOLE_UART ?= 4 224