core: imx: add MU_BASE and MU_SIZE for i.MX943

Add MU_BASE and MU_SIZE for i.MX943

Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked-by: Rouven Czerwinski <rouven.czerwinski@linaro.org>

core: imx: add MU_BASE and MU_SIZE for i.MX943

Add MU_BASE and MU_SIZE for i.MX943

Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked-by: Rouven Czerwinski <rouven.czerwinski@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: imx: add i.MX943 registers

Add i.MX943 registers

Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked-by: Rouven Czerwinski <rouven.czerwinski@linaro.org>
Acked-by: Jens Wiklander <je

core: imx: add i.MX943 registers

Add i.MX943 registers

Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked-by: Rouven Czerwinski <rouven.czerwinski@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: imx: add MU_BASE and MU_SIZE for imx95

Add MU Base address and MU size for imx95

Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

drivers: ele: enable TRUST MU in OP-TEE for i.MX93-EVK/i.MX91-EVK

There is TRUST MU available on i.MX91 and i.MX93 platforms.

TRUST MU can be used to access some HW features of Edgelock Enclave whi

drivers: ele: enable TRUST MU in OP-TEE for i.MX93-EVK/i.MX91-EVK

There is TRUST MU available on i.MX91 and i.MX93 platforms.

TRUST MU can be used to access some HW features of Edgelock Enclave which
Normal MU cannot, but for now it is configured to be used to communicate
with ELE FW.

So Kernel will use Normal MU and OP-TEE will use TRUST MU.

There is special setup needed to write to Trust MU.
* First for TRUST-MU we must write a valid command to TR0 before we can
write any of the remaining registers, and TR15 is reserved for special
USM command.
* The CMD field for TR0 is bits 31:26 and must be greater than
the value of the watermark set in SCM_CR2[31:22]. Typically
if you just set the MSB (bit 31) its enough.
* SIZE must be programmed in bits 19:16 of TR0, we cannot write
TRn past the specified size in this bit field

Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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core: imx: add i.MX95 registers

Add i.MX95 registers

Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

core: imx: re-work GPCv2 driver

Re-work GPCv2 driver:
* use io_clr/set functions
* use timeout for register polling
Remove imx_gpcv2_set_core1_pdn_by_software() function.

Signed-off-by: Clement F

core: imx: re-work GPCv2 driver

Re-work GPCv2 driver:
* use io_clr/set functions
* use timeout for register polling
Remove imx_gpcv2_set_core1_pdn_by_software() function.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: imx: fix IOMUXC GPR5 register read

Define IOMUXC_SIZE value for imx7 platforms and re-work the way the GPR
register is read.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jen

core: imx: fix IOMUXC GPR5 register read

Define IOMUXC_SIZE value for imx7 platforms and re-work the way the GPR
register is read.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: imx: re-work SRC driver

Encapsulate all SRC register operations in dedicated functions.
Move SRC register offsets and values to SRC source file.
Define SRC_SIZE for i.MX6 and i.MX7 platforms.

core: imx: re-work SRC driver

Encapsulate all SRC register operations in dedicated functions.
Move SRC register offsets and values to SRC source file.
Define SRC_SIZE for i.MX6 and i.MX7 platforms.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: imx: add secure memory registers for imx8m platforms

Add SECMEM_BASE and SECMEM_SIZE values.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@lina

core: imx: add secure memory registers for imx8m platforms

Add SECMEM_BASE and SECMEM_SIZE values.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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drivers: imx_mu: add MU base address and size for imx93

Add definition of MU_BASE and MU_SIZE for imx93.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome.fori

drivers: imx_mu: add MU base address and size for imx93

Add definition of MU_BASE and MU_SIZE for imx93.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: imx_mu: add MU base address and size for imx8ulp

Add definition of MU_BASE and MU_SIZE for imx8ulp.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome.

drivers: imx_mu: add MU base address and size for imx8ulp

Add definition of MU_BASE and MU_SIZE for imx8ulp.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: imx-i2c: add support for imx8mn

Add i2c support for imx8mn platforms

Signed-off-by: Gerard Koskamp <gerard.koskamp@nedap.com>
Reviewed-by: Robert Krikke <robert.krikke@nedap.com>
Acked-by:

drivers: imx-i2c: add support for imx8mn

Add i2c support for imx8mn platforms

Signed-off-by: Gerard Koskamp <gerard.koskamp@nedap.com>
Reviewed-by: Robert Krikke <robert.krikke@nedap.com>
Acked-by: Jorge Ramirez-Ortiz <jorge@foundries.io>

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core: imx: add imx93 registers

Add the imx93 registers.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.

core: imx: add imx93 registers

Add the imx93 registers.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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drivers: imx: dcp: disable the use of UNIQUE KEY after HUK generation

Disable the use of DCP unique key (0xfe in the DCP key selection) after
the HUK generation.
The DCP unique key is used to genera

drivers: imx: dcp: disable the use of UNIQUE KEY after HUK generation

Disable the use of DCP unique key (0xfe in the DCP key selection) after
the HUK generation.
The DCP unique key is used to generate the HUK at boot time. Disabling
the use of the unique key prevents the non-secure world from
re-generating the HUK.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Tested-by: Ricardo Salveti <ricardo@foundries.io> (imx-mx6ullevk)

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