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Searched refs:rush_addr (Results 1 – 22 of 22) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dmx/hal/macan/fq/
H A DregFQ.h143 REG32_FQ rush_addr; //0x07 member
H A DhalFQ.c171 FQ32_W(&(_REGFIQ[u32FQEng].rush_addr), MIU_FQ(u32RushAddr) & FIQ_STR2MI2_ADDR_MASK); in HAL_FQ_PVR_SetRushAddr()
/utopia/UTPA2-700.0.x/modules/dmx/hal/manhattan/fq/
H A DregFQ.h143 REG32_FQ rush_addr; //0x07 member
H A DhalFQ.c174 FQ32_W(&(_REGFIQ[u32FQEng].rush_addr), MIU_FQ(u32RushAddr) & FIQ_STR2MI2_ADDR_MASK); in HAL_FQ_PVR_SetRushAddr()
/utopia/UTPA2-700.0.x/modules/dmx/hal/curry/fq/
H A DregFQ.h143 REG32_FQ rush_addr; //0x07 member
H A DhalFQ.c183 FQ32_W(&(_REGFIQ[u32FQEng].rush_addr), MIU_FQ(u32RushAddr) & FIQ_STR2MI2_ADDR_MASK); in HAL_FQ_PVR_SetRushAddr()
/utopia/UTPA2-700.0.x/modules/dmx/hal/kano/fq/
H A DregFQ.h143 REG32_FQ rush_addr; //0x07 member
H A DhalFQ.c161 FQ32_W(&(_REGFIQ[u32FQEng].rush_addr), MIU_FQ(u32RushAddr) & FIQ_STR2MI2_ADDR_MASK); in HAL_FQ_PVR_SetRushAddr()
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6/fq/
H A DregFQ.h143 REG32_FQ rush_addr; //0x07 member
H A DhalFQ.c160 FQ32_W(&(_REGFIQ[u32FQEng].rush_addr), MIU_FQ(u32RushAddr) & FIQ_STR2MI2_ADDR_MASK); in HAL_FQ_PVR_SetRushAddr()
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6lite/fq/
H A DregFQ.h143 REG32_FQ rush_addr; //0x07 member
H A DhalFQ.c160 FQ32_W(&(_REGFIQ[u32FQEng].rush_addr), MIU_FQ(u32RushAddr) & FIQ_STR2MI2_ADDR_MASK); in HAL_FQ_PVR_SetRushAddr()
/utopia/UTPA2-700.0.x/modules/dmx/hal/maserati/fq/
H A DregFQ.h145 REG32_FQ rush_addr; //0x47 member
H A DhalFQ.c203 …FQ32_W(&(_REGFIQ[u32FQEng].rush_addr), MIU_FQ((MS_U32)(phyRushAddr-_phyFQMiuOffset[u32FQEng])) & F… in HAL_FQ_PVR_SetRushAddr()
/utopia/UTPA2-700.0.x/modules/dmx/hal/M7621/fq/
H A DregFQ.h145 REG32_FQ rush_addr; //0x47 member
H A DhalFQ.c202 …FQ32_W(&(_REGFIQ[u32FQEng].rush_addr), MIU_FQ((MS_U32)(phyRushAddr-_phyFQMiuOffset[u32FQEng])) & F… in HAL_FQ_PVR_SetRushAddr()
/utopia/UTPA2-700.0.x/modules/dmx/hal/M7821/fq/
H A DregFQ.h145 REG32_FQ rush_addr; //0x47 member
H A DhalFQ.c203 …FQ32_W(&(_REGFIQ[u32FQEng].rush_addr), MIU_FQ((MS_U32)(phyRushAddr-_phyFQMiuOffset[u32FQEng])) & F… in HAL_FQ_PVR_SetRushAddr()
/utopia/UTPA2-700.0.x/modules/dmx/hal/maxim/fq/
H A DregFQ.h145 REG32_FQ rush_addr; //0x47 member
H A DhalFQ.c202 …FQ32_W(&(_REGFIQ[u32FQEng].rush_addr), MIU_FQ((MS_U32)(phyRushAddr-_phyFQMiuOffset[u32FQEng])) & F… in HAL_FQ_PVR_SetRushAddr()
/utopia/UTPA2-700.0.x/modules/dmx/hal/k7u/fq/
H A DregFQ.h146 REG32_FQ rush_addr; //0x07 member
H A DhalFQ.c160 FQ32_W(&(_REGFIQ[u32FQEng].rush_addr), MIU_FQ(u32RushAddr) & FIQ_STR2MI2_ADDR_MASK); in HAL_FQ_PVR_SetRushAddr()