Searched refs:_virtTSORegBase (Results 1 – 8 of 8) sorted by relevance
125 static MS_VIRT _virtTSORegBase = 0; variable144 #define TSO0_REG(addr) (*((volatile MS_U16*)(_virtTSORegBase + REG_CTRL_BASE_TSO + ((a…145 #define TSO1_REG(addr) (*((volatile MS_U16*)(_virtTSORegBase + REG_CTRL_BASE_TSO1 + ((…156 #define TSO_CLKGEN0_REG(addr) (*((volatile MS_U16*)(_virtTSORegBase + 0x1600UL + ((addr)<<2UL…208 #define TSO_CLKGEN2_REG(addr) (*((volatile MS_U16*)(_virtTSORegBase + 0x1400UL + ((addr)<<2UL…236 #define TSP_TOP_REG(addr) (*((volatile MS_U16*)(_virtTSORegBase + 0x3c00UL + ((addr)<<2UL…306 #define TSP_TSP5_REG(addr) (*((volatile MS_U16*)(_virtTSORegBase + 0xc7600 + ((addr)…317 #define TSP_TS_SAMPLE_REG(addr) (*((volatile MS_U16*)(_virtTSORegBase + 0x21600 + ((addr)…358 _virtTSORegBase = virtBankAddr; in HAL_TSO_SetBank()359 _TSOCtrl = (REG_Ctrl_TSO*)(_virtTSORegBase+ REG_CTRL_BASE_TSO); in HAL_TSO_SetBank()[all …]
131 static MS_VIRT _virtTSORegBase = 0; variable152 #define TSO0_REG(addr) (*((volatile MS_U16*)(_virtTSORegBase + REG_CTRL_BASE_TSO + ((a…153 #define TSO1_REG(addr) (*((volatile MS_U16*)(_virtTSORegBase + REG_CTRL_BASE_TSO1 + ((…164 #define TSO_CLKGEN0_REG(addr) (*((volatile MS_U16*)(_virtTSORegBase + 0x1600UL + ((addr)<<2UL…214 #define TSO_CLKGEN2_REG(addr) (*((volatile MS_U16*)(_virtTSORegBase + 0x1400UL + ((addr)<<2UL…255 #define TSP_TOP_REG(addr) (*((volatile MS_U16*)(_virtTSORegBase + 0x3c00UL + ((addr)<<2UL…296 #define TSP_TSP5_REG(addr) (*((volatile MS_U16*)(_virtTSORegBase + 0xc7600 + ((addr)…316 #define TSP_TS_SAMPLE_REG(addr) (*((volatile MS_U16*)(_virtTSORegBase + 0x21600 + ((addr)…357 _virtTSORegBase = virtBankAddr; in HAL_TSO_SetBank()358 _TSOCtrl = (REG_Ctrl_TSO*)(_virtTSORegBase+ REG_CTRL_BASE_TSO); in HAL_TSO_SetBank()[all …]
131 static MS_VIRT _virtTSORegBase = 0; variable152 #define TSO0_REG(addr) (*((volatile MS_U16*)(_virtTSORegBase + REG_CTRL_BASE_TSO + ((a…153 #define TSO1_REG(addr) (*((volatile MS_U16*)(_virtTSORegBase + REG_CTRL_BASE_TSO1 + ((…164 #define TSO_CLKGEN0_REG(addr) (*((volatile MS_U16*)(_virtTSORegBase + 0x1600UL + ((addr)<<2UL…216 #define TSO_CLKGEN2_REG(addr) (*((volatile MS_U16*)(_virtTSORegBase + 0x1400UL + ((addr)<<2UL…260 #define TSP_TOP_REG(addr) (*((volatile MS_U16*)(_virtTSORegBase + 0x3c00UL + ((addr)<<2UL…304 #define TSP_TSP5_REG(addr) (*((volatile MS_U16*)(_virtTSORegBase + 0xc7600 + ((addr)…325 #define TSP_TS_SAMPLE_REG(addr) (*((volatile MS_U16*)(_virtTSORegBase + 0x21600 + ((addr)…366 _virtTSORegBase = virtBankAddr; in HAL_TSO_SetBank()367 _TSOCtrl = (REG_Ctrl_TSO*)(_virtTSORegBase+ REG_CTRL_BASE_TSO); in HAL_TSO_SetBank()[all …]
130 static MS_VIRT _virtTSORegBase = 0; variable150 #define TSO0_REG(addr) (*((volatile MS_U16*)(_virtTSORegBase + REG_CTRL_BASE_TSO + ((a…151 #define TSO1_REG(addr) (*((volatile MS_U16*)(_virtTSORegBase + REG_CTRL_BASE_TSO1 + ((…162 #define TSO_CLKGEN1_REG(addr) (*((volatile MS_U16*)(_virtTSORegBase + 0x6600UL + ((addr)<<2UL…229 #define TSO_TOP_REG(addr) (*((volatile MS_U16*)(_virtTSORegBase + 0x3c00UL + ((addr)<<2UL…251 #define TSP_TSP5_REG(addr) (*((volatile MS_U16*)(_virtTSORegBase + 0xc7600 + ((addr)…269 #define TSP_TS_SAMPLE_REG(addr) (*((volatile MS_U16*)(_virtTSORegBase + 0x21600 + ((addr)…310 _virtTSORegBase = virtBankAddr; in HAL_TSO_SetBank()311 _TSOCtrl = (REG_Ctrl_TSO*)(_virtTSORegBase+ REG_CTRL_BASE_TSO); in HAL_TSO_SetBank()312 _TSOCtrl1 = (REG_Ctrl_TSO1*)(_virtTSORegBase+ REG_CTRL_BASE_TSO1); in HAL_TSO_SetBank()
125 static MS_VIRT _virtTSORegBase = 0; variable148 #define TSO_CLKGEN0_REG(addr) (*((volatile MS_U16*)(_virtTSORegBase + 0x1600UL + ((addr)<<2UL…200 #define TSO_CLKGEN2_REG(addr) (*((volatile MS_U16*)(_virtTSORegBase + 0x1400UL + ((addr)<<2UL…228 #define TSP_TOP_REG(addr) (*((volatile MS_U16*)(_virtTSORegBase + 0x3c00UL + ((addr)<<2UL…298 #define TSP_TSP5_REG(addr) (*((volatile MS_U16*)(_virtTSORegBase + 0xc7600 + ((addr)…309 #define TSP_TS_SAMPLE_REG(addr) (*((volatile MS_U16*)(_virtTSORegBase + 0x21600 + ((addr)…350 _virtTSORegBase = virtBankAddr; in HAL_TSO_SetBank()351 _TSOCtrl = (REG_Ctrl_TSO*)(_virtTSORegBase+ REG_CTRL_BASE_TSO); in HAL_TSO_SetBank()352 _TSOCtrl1 = (REG_Ctrl_TSO1*)(_virtTSORegBase+ REG_CTRL_BASE_TSO1); in HAL_TSO_SetBank()
125 static MS_VIRT _virtTSORegBase = 0; variable148 #define TSO_CLKGEN1_REG(addr) (*((volatile MS_U16*)(_virtTSORegBase + 0x6600 + ((addr)<<2))))208 #define TSP_TOP_REG(addr) (*((volatile MS_U16*)(_virtTSORegBase + 0x3c00 + ((addr)<<2))))236 #define TSP_TSP5_REG(addr) (*((volatile MS_U16*)(_virtTSORegBase + 0xc7600 + ((addr)<<2))))246 #define TSP_TS_SAMPLE_REG(addr) (*((volatile MS_U16*)(_virtTSORegBase + 0x21600 + ((addr)…294 _virtTSORegBase = virtBankAddr; in HAL_TSO_SetBank()295 _TSOCtrl = (REG_Ctrl_TSO*)(_virtTSORegBase+ REG_CTRL_BASE_TSO); in HAL_TSO_SetBank()296 _TSOCtrl1 = (REG_Ctrl_TSO1*)(_virtTSORegBase+ REG_CTRL_BASE_TSO1); in HAL_TSO_SetBank()