Home
last modified time | relevance | path

Searched refs:REG_MHL_CBUS_25 (Results 1 – 25 of 35) sorted by relevance

12

/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/include/
H A Dhwreg_mhl.h114 #define REG_MHL_CBUS_25 (REG_MHL_CBUS_BANK + 0x4A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/include/
H A Dhwreg_mhl.h114 #define REG_MHL_CBUS_25 (REG_MHL_CBUS_BANK + 0x4A) macro
/utopia/UTPA2-700.0.x/modules/hdmi/hal/mustang/mhl/internal/
H A DhwregMHL.h137 #define REG_MHL_CBUS_25 (REG_MHL_CBUS_BANK + 0x4A) macro
H A DhalMHL.c187 …{REG_MHL_CBUS_25, BIT(9)|BIT(5)|BIT(1), BIT(9)|BIT(5)|BIT(1)}, // [9]: response_pkt_msc_hw_int mas…
2737 W2BYTEMSK(REG_MHL_CBUS_25, BIT(12), BIT(12)); // trigger to send in mhal_mhl_CBusWrite()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/maldives/mhl/internal/
H A DhwregMHL.h137 #define REG_MHL_CBUS_25 (REG_MHL_CBUS_BANK + 0x4A) macro
H A DhalMHL.c187 …{REG_MHL_CBUS_25, BIT(9)|BIT(5)|BIT(1), BIT(9)|BIT(5)|BIT(1)}, // [9]: response_pkt_msc_hw_int mas…
2734 W2BYTEMSK(REG_MHL_CBUS_25, BIT(12), BIT(12)); // trigger to send in mhal_mhl_CBusWrite()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/messi/mhl/internal/
H A DhalMHL.c209 …{REG_MHL_CBUS_25, BIT(9)|BIT(5)|BIT(1), BIT(9)|BIT(5)|BIT(1)}, // [9]: response_pkt_msc_hw_int mas…
3144 W2BYTEMSK(REG_MHL_CBUS_25, BIT(12), BIT(12)); // trigger to send in mhal_mhl_CBusWrite()
H A DhwregMHL.h153 #define REG_MHL_CBUS_25 (REG_MHL_CBUS_BANK + 0x4A) macro
/utopia/UTPA2-700.0.x/modules/hdmi/hal/mainz/mhl/internal/
H A DhalMHL.c209 …{REG_MHL_CBUS_25, BIT(9)|BIT(5)|BIT(1), BIT(9)|BIT(5)|BIT(1)}, // [9]: response_pkt_msc_hw_int mas…
3144 W2BYTEMSK(REG_MHL_CBUS_25, BIT(12), BIT(12)); // trigger to send in mhal_mhl_CBusWrite()
H A DhwregMHL.h153 #define REG_MHL_CBUS_25 (REG_MHL_CBUS_BANK + 0x4A) macro
/utopia/UTPA2-700.0.x/modules/hdmi/hal/macan/mhl/internal/
H A DhwregMHL.h153 #define REG_MHL_CBUS_25 (REG_MHL_CBUS_BANK + 0x4A) macro
H A DhalMHL.c193 …{REG_MHL_CBUS_25, BIT(9)|BIT(5)|BIT(1), BIT(9)|BIT(5)|BIT(1)}, // [9]: response_pkt_msc_hw_int mas…
3625 W2BYTEMSK(REG_MHL_CBUS_25, BIT(12), BIT(12)); // trigger to send in mhal_mhl_CBusWrite()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/M7621/mhl/internal/
H A DhwregMHL.h153 #define REG_MHL_CBUS_25 (REG_MHL_CBUS_BANK + 0x4A) macro
/utopia/UTPA2-700.0.x/modules/hdmi/hal/manhattan/mhl/internal/
H A DhwregMHL.h153 #define REG_MHL_CBUS_25 (REG_MHL_CBUS_BANK + 0x4A) macro
/utopia/UTPA2-700.0.x/modules/hdmi/hal/mooney/mhl/internal/
H A DhwregMHL.h153 #define REG_MHL_CBUS_25 (REG_MHL_CBUS_BANK + 0x4A) macro
H A DhalMHL.c193 …{REG_MHL_CBUS_25, BIT(9)|BIT(5)|BIT(1), BIT(9)|BIT(5)|BIT(1)}, // [9]: response_pkt_msc_hw_int mas…
3601 W2BYTEMSK(REG_MHL_CBUS_25, BIT(12), BIT(12)); // trigger to send in mhal_mhl_CBusWrite()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/maserati/mhl/internal/
H A DhwregMHL.h153 #define REG_MHL_CBUS_25 (REG_MHL_CBUS_BANK + 0x4A) macro
/utopia/UTPA2-700.0.x/modules/hdmi/hal/maxim/mhl/internal/
H A DhwregMHL.h153 #define REG_MHL_CBUS_25 (REG_MHL_CBUS_BANK + 0x4A) macro
/utopia/UTPA2-700.0.x/modules/hdmi/hal/M7821/mhl/internal/
H A DhwregMHL.h153 #define REG_MHL_CBUS_25 (REG_MHL_CBUS_BANK + 0x4A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A Dhwreg_pm_sleep.h564 #define REG_MHL_CBUS_25 (REG_MHL_CBUS_BANK + 0x4A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dhwreg_pm_sleep.h562 #define REG_MHL_CBUS_25 (REG_MHL_CBUS_BANK + 0x4A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/
H A Dhwreg_pm_sleep.h563 #define REG_MHL_CBUS_25 (REG_MHL_CBUS_BANK + 0x4A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dhwreg_pm_sleep.h564 #define REG_MHL_CBUS_25 (REG_MHL_CBUS_BANK + 0x4A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A Dhwreg_pm_sleep.h564 #define REG_MHL_CBUS_25 (REG_MHL_CBUS_BANK + 0x4A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/
H A Dhwreg_pm_sleep.h565 #define REG_MHL_CBUS_25 (REG_MHL_CBUS_BANK + 0x4A) macro

12