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Searched refs:REG_C_IRQ_HYP_MASK (Results 1 – 22 of 22) sorted by relevance

/utopia/UTPA2-700.0.x/modules/irq/hal/M7821/irq/
H A DregIRQ.h215 #define REG_C_IRQ_HYP_MASK REG_FRC_C_IRQ_HYP_MASK macro
236 #define REG_C_IRQ_HYP_MASK REG_AEON_C_IRQ_HYP_MASK macro
261 #define REG_C_IRQ_HYP_MASK REG_MIPS_C_IRQ_HYP_MASK macro
287 #define REG_C_IRQ_HYP_MASK REG_MIPS_C_IRQ_HYP_MASK macro
311 #define REG_C_IRQ_HYP_MASK REG_MIPS_C_IRQ_HYP_MASK macro
334 #define REG_C_IRQ_HYP_MASK REG_MIPS_C_IRQ_HYP_MASK macro
358 #define REG_C_IRQ_HYP_MASK REG_MIPS_C_IRQ_HYP_MASK macro
381 #define REG_C_IRQ_HYP_MASK REG_MIPS_C_IRQ_HYP_MASK macro
H A DhalIRQ.c652 reg = REG_C_IRQ_HYP_MASK; in _HAL_IRQ_Enable()
/utopia/UTPA2-700.0.x/modules/irq/hal/macan/irq/
H A DregIRQ.h215 #define REG_C_IRQ_HYP_MASK REG_FRC_C_IRQ_HYP_MASK macro
236 #define REG_C_IRQ_HYP_MASK REG_AEON_C_IRQ_HYP_MASK macro
261 #define REG_C_IRQ_HYP_MASK REG_MIPS_C_IRQ_HYP_MASK macro
287 #define REG_C_IRQ_HYP_MASK REG_MIPS_C_IRQ_HYP_MASK macro
311 #define REG_C_IRQ_HYP_MASK REG_MIPS_C_IRQ_HYP_MASK macro
334 #define REG_C_IRQ_HYP_MASK REG_MIPS_C_IRQ_HYP_MASK macro
358 #define REG_C_IRQ_HYP_MASK REG_MIPS_C_IRQ_HYP_MASK macro
381 #define REG_C_IRQ_HYP_MASK REG_MIPS_C_IRQ_HYP_MASK macro
H A DhalIRQ.c646 reg = REG_C_IRQ_HYP_MASK; in _HAL_IRQ_Enable()
/utopia/UTPA2-700.0.x/modules/irq/hal/maserati/irq/
H A DregIRQ.h215 #define REG_C_IRQ_HYP_MASK REG_FRC_C_IRQ_HYP_MASK macro
236 #define REG_C_IRQ_HYP_MASK REG_AEON_C_IRQ_HYP_MASK macro
261 #define REG_C_IRQ_HYP_MASK REG_MIPS_C_IRQ_HYP_MASK macro
287 #define REG_C_IRQ_HYP_MASK REG_MIPS_C_IRQ_HYP_MASK macro
311 #define REG_C_IRQ_HYP_MASK REG_MIPS_C_IRQ_HYP_MASK macro
334 #define REG_C_IRQ_HYP_MASK REG_MIPS_C_IRQ_HYP_MASK macro
358 #define REG_C_IRQ_HYP_MASK REG_MIPS_C_IRQ_HYP_MASK macro
H A DhalIRQ.c650 reg = REG_C_IRQ_HYP_MASK; in _HAL_IRQ_Enable()
/utopia/UTPA2-700.0.x/modules/irq/hal/manhattan/irq/
H A DregIRQ.h215 #define REG_C_IRQ_HYP_MASK REG_FRC_C_IRQ_HYP_MASK macro
236 #define REG_C_IRQ_HYP_MASK REG_AEON_C_IRQ_HYP_MASK macro
261 #define REG_C_IRQ_HYP_MASK REG_MIPS_C_IRQ_HYP_MASK macro
287 #define REG_C_IRQ_HYP_MASK REG_MIPS_C_IRQ_HYP_MASK macro
311 #define REG_C_IRQ_HYP_MASK REG_MIPS_C_IRQ_HYP_MASK macro
334 #define REG_C_IRQ_HYP_MASK REG_MIPS_C_IRQ_HYP_MASK macro
358 #define REG_C_IRQ_HYP_MASK REG_MIPS_C_IRQ_HYP_MASK macro
H A DhalIRQ.c646 reg = REG_C_IRQ_HYP_MASK; in _HAL_IRQ_Enable()
/utopia/UTPA2-700.0.x/modules/irq/hal/maxim/irq/
H A DregIRQ.h215 #define REG_C_IRQ_HYP_MASK REG_FRC_C_IRQ_HYP_MASK macro
236 #define REG_C_IRQ_HYP_MASK REG_AEON_C_IRQ_HYP_MASK macro
261 #define REG_C_IRQ_HYP_MASK REG_MIPS_C_IRQ_HYP_MASK macro
287 #define REG_C_IRQ_HYP_MASK REG_MIPS_C_IRQ_HYP_MASK macro
311 #define REG_C_IRQ_HYP_MASK REG_MIPS_C_IRQ_HYP_MASK macro
334 #define REG_C_IRQ_HYP_MASK REG_MIPS_C_IRQ_HYP_MASK macro
358 #define REG_C_IRQ_HYP_MASK REG_MIPS_C_IRQ_HYP_MASK macro
H A DhalIRQ.c650 reg = REG_C_IRQ_HYP_MASK; in _HAL_IRQ_Enable()
/utopia/UTPA2-700.0.x/modules/irq/hal/M7621/irq/
H A DregIRQ.h215 #define REG_C_IRQ_HYP_MASK REG_FRC_C_IRQ_HYP_MASK macro
236 #define REG_C_IRQ_HYP_MASK REG_AEON_C_IRQ_HYP_MASK macro
261 #define REG_C_IRQ_HYP_MASK REG_MIPS_C_IRQ_HYP_MASK macro
287 #define REG_C_IRQ_HYP_MASK REG_MIPS_C_IRQ_HYP_MASK macro
311 #define REG_C_IRQ_HYP_MASK REG_MIPS_C_IRQ_HYP_MASK macro
334 #define REG_C_IRQ_HYP_MASK REG_MIPS_C_IRQ_HYP_MASK macro
358 #define REG_C_IRQ_HYP_MASK REG_MIPS_C_IRQ_HYP_MASK macro
H A DhalIRQ.c650 reg = REG_C_IRQ_HYP_MASK; in _HAL_IRQ_Enable()
/utopia/UTPA2-700.0.x/modules/irq/hal/kano/irq/
H A DregIRQ.h173 #define REG_C_IRQ_HYP_MASK REG_AEON_C_IRQ_HYP_MASK macro
195 #define REG_C_IRQ_HYP_MASK REG_MIPS_C_IRQ_HYP_MASK macro
H A DhalIRQ.c590 reg = REG_C_IRQ_HYP_MASK; in _HAL_IRQ_Enable()
/utopia/UTPA2-700.0.x/modules/irq/hal/k7u/irq/
H A DregIRQ.h173 #define REG_C_IRQ_HYP_MASK REG_AEON_C_IRQ_HYP_MASK macro
195 #define REG_C_IRQ_HYP_MASK REG_MIPS_C_IRQ_HYP_MASK macro
H A DhalIRQ.c590 reg = REG_C_IRQ_HYP_MASK; in _HAL_IRQ_Enable()
/utopia/UTPA2-700.0.x/modules/irq/hal/k6lite/irq/
H A DregIRQ.h173 #define REG_C_IRQ_HYP_MASK REG_AEON_C_IRQ_HYP_MASK macro
195 #define REG_C_IRQ_HYP_MASK REG_MIPS_C_IRQ_HYP_MASK macro
H A DhalIRQ.c590 reg = REG_C_IRQ_HYP_MASK; in _HAL_IRQ_Enable()
/utopia/UTPA2-700.0.x/modules/irq/hal/curry/irq/
H A DregIRQ.h173 #define REG_C_IRQ_HYP_MASK REG_AEON_C_IRQ_HYP_MASK macro
195 #define REG_C_IRQ_HYP_MASK REG_MIPS_C_IRQ_HYP_MASK macro
H A DhalIRQ.c590 reg = REG_C_IRQ_HYP_MASK; in _HAL_IRQ_Enable()
/utopia/UTPA2-700.0.x/modules/irq/hal/k6/irq/
H A DregIRQ.h173 #define REG_C_IRQ_HYP_MASK REG_AEON_C_IRQ_HYP_MASK macro
195 #define REG_C_IRQ_HYP_MASK REG_MIPS_C_IRQ_HYP_MASK macro
H A DhalIRQ.c590 reg = REG_C_IRQ_HYP_MASK; in _HAL_IRQ_Enable()