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Searched refs:MIU_ARB_REG_BASE (Results 1 – 22 of 22) sorted by relevance

/utopia/UTPA2-700.0.x/modules/miu/hal/k6lite/miu/
H A DregMIU.h123 #define MIU_ARB_REG_BASE (0x61500UL) macro
133 … (Reg = (Group < 4 )? (MIU_REG_BASE + 0x46 + 0x20*Group) : (MIU_ARB_REG_BASE + 0x06 + 0x20…
134 … (Reg = (Group < 4 )? (MIU_REG_BASE + 0x48 + 0x20*Group) : (MIU_ARB_REG_BASE + 0x08 + 0x20…
170 #define REG_MIU_DDR_STATUS (MIU_ARB_REG_BASE+0x66)
/utopia/UTPA2-700.0.x/modules/miu/hal/k6/miu/
H A DregMIU.h123 #define MIU_ARB_REG_BASE (0x61500UL) macro
133 … (Reg = (Group < 4 )? (MIU_REG_BASE + 0x46 + 0x20*Group) : (MIU_ARB_REG_BASE + 0x06 + 0x20…
134 … (Reg = (Group < 4 )? (MIU_REG_BASE + 0x48 + 0x20*Group) : (MIU_ARB_REG_BASE + 0x08 + 0x20…
170 #define REG_MIU_DDR_STATUS (MIU_ARB_REG_BASE+0x66)
/utopia/UTPA2-700.0.x/modules/miu/hal/k7u/miu/
H A DregMIU.h123 #define MIU_ARB_REG_BASE (0x61500UL) macro
133 … (Reg = (Group < 4 )? (MIU_REG_BASE + 0x46 + 0x20*Group) : (MIU_ARB_REG_BASE + 0x06 + 0x20…
134 … (Reg = (Group < 4 )? (MIU_REG_BASE + 0x48 + 0x20*Group) : (MIU_ARB_REG_BASE + 0x08 + 0x20…
170 #define REG_MIU_DDR_STATUS (MIU_ARB_REG_BASE+0x66)
/utopia/UTPA2-700.0.x/modules/miu/hal/curry/miu/
H A DregMIU.h123 #define MIU_ARB_REG_BASE (0x61500UL) macro
141 … (Reg = (Group < 4 )? (MIU_REG_BASE + 0x46 + 0x20*Group) : (MIU_ARB_REG_BASE + 0x06 + 0x20…
142 … (Reg = (Group < 4 )? (MIU_REG_BASE + 0x48 + 0x20*Group) : (MIU_ARB_REG_BASE + 0x08 + 0x20…
187 #define REG_MIU_DDR_STATUS (MIU_ARB_REG_BASE+0x66)
/utopia/UTPA2-700.0.x/modules/miu/hal/kano/miu/
H A DregMIU.h123 #define MIU_ARB_REG_BASE (0x61500UL) macro
141 … (Reg = (Group < 4 )? (MIU_REG_BASE + 0x46 + 0x20*Group) : (MIU_ARB_REG_BASE + 0x06 + 0x20…
142 … (Reg = (Group < 4 )? (MIU_REG_BASE + 0x48 + 0x20*Group) : (MIU_ARB_REG_BASE + 0x08 + 0x20…
187 #define REG_MIU_DDR_STATUS (MIU_ARB_REG_BASE+0x66)
/utopia/UTPA2-700.0.x/modules/miu/hal/M7621/miu/
H A DregMIU.h122 #define MIU_ARB_REG_BASE (0x61500UL) macro
166 #define REG_MIU_DDR_STATUS (MIU_ARB_REG_BASE+0x66)
H A DhalMIU.c1368 u32RegBase = (u8Miu == E_MIU_0 ? MIU_ARB_REG_BASE : MIU1_ARB_REG_BASE); in HAL_MIU_MaskReq()
1420 u32RegBase = (u8Miu == E_MIU_0 ? MIU_ARB_REG_BASE : MIU1_ARB_REG_BASE); in HAL_MIU_UnMaskReq()
/utopia/UTPA2-700.0.x/modules/miu/hal/mustang/miu/
H A DregMIU.h122 #define MIU_ARB_REG_BASE (0x61500UL) macro
163 #define REG_MIU_DDR_STATUS (MIU_ARB_REG_BASE+0x66)
/utopia/UTPA2-700.0.x/modules/miu/hal/maxim/miu/
H A DregMIU.h122 #define MIU_ARB_REG_BASE (0x61500UL) macro
166 #define REG_MIU_DDR_STATUS (MIU_ARB_REG_BASE+0x66)
H A DhalMIU.c1362 u32RegBase = (u8Miu == E_MIU_0 ? MIU_ARB_REG_BASE : MIU1_ARB_REG_BASE); in HAL_MIU_MaskReq()
1414 u32RegBase = (u8Miu == E_MIU_0 ? MIU_ARB_REG_BASE : MIU1_ARB_REG_BASE); in HAL_MIU_UnMaskReq()
/utopia/UTPA2-700.0.x/modules/miu/hal/M7821/miu/
H A DregMIU.h127 #define MIU_ARB_REG_BASE (0x61500UL) macro
192 #define REG_MIU_DDR_STATUS (MIU_ARB_REG_BASE+0x66)
H A DhalMIU.c1615 …u32RegBase = (u8Miu == E_MIU_0 ? MIU_ARB_REG_BASE : (u8Miu == E_MIU_1 ? MIU1_ARB_REG_BASE : MIU2_A… in HAL_MIU_MaskReq()
1667 …u32RegBase = (u8Miu == E_MIU_0 ? MIU_ARB_REG_BASE : (u8Miu == E_MIU_1 ? MIU1_ARB_REG_BASE : MIU2_A… in HAL_MIU_UnMaskReq()
/utopia/UTPA2-700.0.x/modules/miu/hal/maserati/miu/
H A DregMIU.h127 #define MIU_ARB_REG_BASE (0x61500UL) macro
192 #define REG_MIU_DDR_STATUS (MIU_ARB_REG_BASE+0x66)
H A DhalMIU.c1609 …u32RegBase = (u8Miu == E_MIU_0 ? MIU_ARB_REG_BASE : (u8Miu == E_MIU_1 ? MIU1_ARB_REG_BASE : MIU2_A… in HAL_MIU_MaskReq()
1661 …u32RegBase = (u8Miu == E_MIU_0 ? MIU_ARB_REG_BASE : (u8Miu == E_MIU_1 ? MIU1_ARB_REG_BASE : MIU2_A… in HAL_MIU_UnMaskReq()
/utopia/UTPA2-700.0.x/modules/miu/hal/messi/miu/
H A DregMIU.h96 #define MIU_ARB_REG_BASE (0x61500UL) //MIU0, Group 4~7 macro
H A DhalMIU.c1482 u32Reg += MIU_ARB_REG_BASE; in HAL_MIU_MaskReq()
1556 u32Reg += MIU_ARB_REG_BASE; in HAL_MIU_UnMaskReq()
/utopia/UTPA2-700.0.x/modules/miu/hal/mooney/miu/
H A DregMIU.h96 #define MIU_ARB_REG_BASE (0x61500UL) //MIU0, Group 4~7 macro
H A DhalMIU.c1441 u32Reg += MIU_ARB_REG_BASE; in HAL_MIU_MaskReq()
1515 u32Reg += MIU_ARB_REG_BASE; in HAL_MIU_UnMaskReq()
/utopia/UTPA2-700.0.x/modules/miu/hal/mainz/miu/
H A DregMIU.h96 #define MIU_ARB_REG_BASE (0x61500UL) //MIU0, Group 4~7 macro
H A DhalMIU.c1482 u32Reg += MIU_ARB_REG_BASE; in HAL_MIU_MaskReq()
1556 u32Reg += MIU_ARB_REG_BASE; in HAL_MIU_UnMaskReq()
/utopia/UTPA2-700.0.x/modules/miu/hal/manhattan/miu/
H A DregMIU.h127 #define MIU_ARB_REG_BASE (0x61500UL) macro
/utopia/UTPA2-700.0.x/modules/miu/hal/macan/miu/
H A DregMIU.h127 #define MIU_ARB_REG_BASE (0x61500UL) macro