Searched refs:MIU2_ARB_REG_BASE (Results 1 – 12 of 12) sorted by relevance
129 #define MIU2_ARB_REG_BASE (0x62300UL) macro229 #define REG_MIU2_DDR_STATUS (MIU2_ARB_REG_BASE+0x66)
1615 …(u8Miu == E_MIU_0 ? MIU_ARB_REG_BASE : (u8Miu == E_MIU_1 ? MIU1_ARB_REG_BASE : MIU2_ARB_REG_BASE)); in HAL_MIU_MaskReq()1667 …(u8Miu == E_MIU_0 ? MIU_ARB_REG_BASE : (u8Miu == E_MIU_1 ? MIU1_ARB_REG_BASE : MIU2_ARB_REG_BASE)); in HAL_MIU_UnMaskReq()
1609 …(u8Miu == E_MIU_0 ? MIU_ARB_REG_BASE : (u8Miu == E_MIU_1 ? MIU1_ARB_REG_BASE : MIU2_ARB_REG_BASE)); in HAL_MIU_MaskReq()1661 …(u8Miu == E_MIU_0 ? MIU_ARB_REG_BASE : (u8Miu == E_MIU_1 ? MIU1_ARB_REG_BASE : MIU2_ARB_REG_BASE)); in HAL_MIU_UnMaskReq()
98 #define MIU2_ARB_REG_BASE (0x62300UL) //MIU2, Group 4~7 macro
1490 u32Reg += MIU2_ARB_REG_BASE; in HAL_MIU_MaskReq()1564 u32Reg += MIU2_ARB_REG_BASE; in HAL_MIU_UnMaskReq()
1449 u32Reg += MIU2_ARB_REG_BASE; in HAL_MIU_MaskReq()1523 u32Reg += MIU2_ARB_REG_BASE; in HAL_MIU_UnMaskReq()
129 #define MIU2_ARB_REG_BASE (0x62300UL) macro