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Searched refs:MIU1_PROTECT_DDR_SIZE (Results 1 – 25 of 31) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/miu/hal/M7621/miu/
H A DregMIU.h173 #define MIU1_PROTECT_DDR_SIZE (MIU1_REG_BASE+0xD3) macro
H A DhalMIU.c823 u32RegAddr = MIU1_PROTECT_DDR_SIZE; in HAL_MIU_Dram_Size()
900 u32RegAddr = MIU1_PROTECT_DDR_SIZE; in HAL_MIU_Dram_ReadSize()
/utopia/UTPA2-700.0.x/modules/miu/hal/mustang/miu/
H A DregMIU.h169 #define MIU1_PROTECT_DDR_SIZE (MIU1_REG_BASE+0xD3) macro
/utopia/UTPA2-700.0.x/modules/miu/hal/maxim/miu/
H A DregMIU.h173 #define MIU1_PROTECT_DDR_SIZE (MIU1_REG_BASE+0xD3) macro
H A DhalMIU.c817 u32RegAddr = MIU1_PROTECT_DDR_SIZE; in HAL_MIU_Dram_Size()
894 u32RegAddr = MIU1_PROTECT_DDR_SIZE; in HAL_MIU_Dram_ReadSize()
/utopia/UTPA2-700.0.x/modules/miu/hal/k6lite/miu/
H A DregMIU.h175 #define MIU1_PROTECT_DDR_SIZE (MIU1_REG_BASE+0xD3) macro
/utopia/UTPA2-700.0.x/modules/miu/hal/k6/miu/
H A DregMIU.h175 #define MIU1_PROTECT_DDR_SIZE (MIU1_REG_BASE+0xD3) macro
H A DhalMIU.c932 u32RegAddr = MIU1_PROTECT_DDR_SIZE; in HAL_MIU_Dram_Size()
/utopia/UTPA2-700.0.x/modules/miu/hal/k7u/miu/
H A DregMIU.h175 #define MIU1_PROTECT_DDR_SIZE (MIU1_REG_BASE+0xD3) macro
/utopia/UTPA2-700.0.x/modules/miu/hal/maldives/miu/
H A DregMIU.h189 #define MIU1_PROTECT_DDR_SIZE (MIU1_REG_BASE+0xD3) macro
H A DhalMIU.c854 u32RegAddr = MIU1_PROTECT_DDR_SIZE; in HAL_MIU_Dram_Size()
/utopia/UTPA2-700.0.x/modules/miu/hal/messi/miu/
H A DregMIU.h163 #define MIU1_PROTECT_DDR_SIZE (MIU1_REG_BASE + 0xD3) macro
H A DhalMIU.c881 u32RegAddr = MIU1_PROTECT_DDR_SIZE; in HAL_MIU_Dram_Size()
962 u32RegAddr = MIU1_PROTECT_DDR_SIZE; in HAL_MIU_Dram_ReadSize()
/utopia/UTPA2-700.0.x/modules/miu/hal/mooney/miu/
H A DregMIU.h163 #define MIU1_PROTECT_DDR_SIZE (MIU1_REG_BASE + 0xD3) macro
H A DhalMIU.c880 u32RegAddr = MIU1_PROTECT_DDR_SIZE; in HAL_MIU_Dram_Size()
/utopia/UTPA2-700.0.x/modules/miu/hal/mainz/miu/
H A DregMIU.h163 #define MIU1_PROTECT_DDR_SIZE (MIU1_REG_BASE + 0xD3) macro
H A DhalMIU.c881 u32RegAddr = MIU1_PROTECT_DDR_SIZE; in HAL_MIU_Dram_Size()
962 u32RegAddr = MIU1_PROTECT_DDR_SIZE; in HAL_MIU_Dram_ReadSize()
/utopia/UTPA2-700.0.x/modules/miu/hal/manhattan/miu/
H A DregMIU.h187 #define MIU1_PROTECT_DDR_SIZE (MIU1_REG_BASE+0xD3) macro
/utopia/UTPA2-700.0.x/modules/miu/hal/curry/miu/
H A DregMIU.h193 #define MIU1_PROTECT_DDR_SIZE (MIU1_REG_BASE+0xD3) macro
/utopia/UTPA2-700.0.x/modules/miu/hal/kano/miu/
H A DregMIU.h193 #define MIU1_PROTECT_DDR_SIZE (MIU1_REG_BASE+0xD3) macro
/utopia/UTPA2-700.0.x/modules/miu/hal/M7821/miu/
H A DregMIU.h196 #define MIU1_PROTECT_DDR_SIZE (MIU1_REG_BASE+0xD3) macro
H A DhalMIU.c962 u32RegAddr = MIU1_PROTECT_DDR_SIZE; in HAL_MIU_Dram_Size()
1061 u32RegAddr = MIU1_PROTECT_DDR_SIZE; in HAL_MIU_Dram_ReadSize()
/utopia/UTPA2-700.0.x/modules/miu/hal/maserati/miu/
H A DregMIU.h196 #define MIU1_PROTECT_DDR_SIZE (MIU1_REG_BASE+0xD3) macro
H A DhalMIU.c956 u32RegAddr = MIU1_PROTECT_DDR_SIZE; in HAL_MIU_Dram_Size()
1055 u32RegAddr = MIU1_PROTECT_DDR_SIZE; in HAL_MIU_Dram_ReadSize()
/utopia/UTPA2-700.0.x/modules/miu/hal/macan/miu/
H A DregMIU.h194 #define MIU1_PROTECT_DDR_SIZE (MIU1_REG_BASE+0xD3) macro

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