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Searched refs:MHalHdcpRegMaskWrite (Results 1 – 13 of 13) sorted by relevance

/utopia/UTPA2-700.0.x/modules/hdmi/hal/maxim/hdcp/
H A DhalHDCP.c184 void MHalHdcpRegMaskWrite(MS_U32 bank, MS_U16 address, MS_U16 reg_mask, MS_U16 reg_data) in MHalHdcpRegMaskWrite() function
220 MHalHdcpRegMaskWrite(DEF_HDCP14_TX_REG_BANK, 0x0001, 0x8000, 0x8000); // Enable HDCP encryption in MHal_HDCP_HDCP14TxInitHdcp()
221MHalHdcpRegMaskWrite(DEF_HDCP14_TX_REG_BANK, 0x0002, 0x001C, 0x0000); //[4]: 1: km new mode; 0: km… in MHal_HDCP_HDCP14TxInitHdcp()
236 MHalHdcpRegMaskWrite(DEF_HDCP14_TX_REG_BANK, 0x0002, 0x000F, 0x000C); in MHal_HDCP_HDCP14TxSetAuthPass()
244 MHalHdcpRegMaskWrite(DEF_HDCP14_TX_REG_BANK, 0x0002, 0x0008, 0x0008); in MHal_HDCP_HDCP14TxEnableENC_EN()
246 MHalHdcpRegMaskWrite(DEF_HDCP14_TX_REG_BANK, 0x0002, 0x0008, 0x0000); in MHal_HDCP_HDCP14TxEnableENC_EN()
256 MHalHdcpRegMaskWrite(DEF_HDCP14_TX_REG_BANK, 0x0001, 0x0100, 0x0100); in MHal_HDCP_HDCP14TxProcessAn()
257 MHalHdcpRegMaskWrite(DEF_HDCP14_TX_REG_BANK, 0x0002, 0x0002, 0x0002); in MHal_HDCP_HDCP14TxProcessAn()
258 MHalHdcpRegMaskWrite(DEF_HDCP14_TX_REG_BANK, 0x0002, 0x0002, 0x0000); in MHal_HDCP_HDCP14TxProcessAn()
270 MHalHdcpRegMaskWrite(DEF_HDCP14_TX_REG_BANK, 0x0001, 0x0100, 0x0000); in MHal_HDCP_HDCP14TxProcessAn()
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/utopia/UTPA2-700.0.x/modules/hdmi/hal/kano/hdcp/
H A DhalHDCP.c184 void MHalHdcpRegMaskWrite(MS_U32 bank, MS_U16 address, MS_U16 reg_mask, MS_U16 reg_data) in MHalHdcpRegMaskWrite() function
221 MHalHdcpRegMaskWrite(DEF_HDCP14_TX_REG_BANK, 0x0001, 0x8000, 0x8000); // Enable HDCP encryption in MHal_HDCP_HDCP14TxInitHdcp()
222MHalHdcpRegMaskWrite(DEF_HDCP14_TX_REG_BANK, 0x0002, 0x001C, 0x0000); //[4]: 1: km new mode; 0: km… in MHal_HDCP_HDCP14TxInitHdcp()
238 MHalHdcpRegMaskWrite(DEF_HDCP14_TX_REG_BANK, 0x0002, 0x000F, 0x000C); in MHal_HDCP_HDCP14TxSetAuthPass()
247 MHalHdcpRegMaskWrite(DEF_HDCP14_TX_REG_BANK, 0x0002, 0x0008, 0x0008); in MHal_HDCP_HDCP14TxEnableENC_EN()
249 MHalHdcpRegMaskWrite(DEF_HDCP14_TX_REG_BANK, 0x0002, 0x0008, 0x0000); in MHal_HDCP_HDCP14TxEnableENC_EN()
260 MHalHdcpRegMaskWrite(DEF_HDCP14_TX_REG_BANK, 0x0001, 0x0100, 0x0100); in MHal_HDCP_HDCP14TxProcessAn()
261 MHalHdcpRegMaskWrite(DEF_HDCP14_TX_REG_BANK, 0x0002, 0x0002, 0x0002); in MHal_HDCP_HDCP14TxProcessAn()
262 MHalHdcpRegMaskWrite(DEF_HDCP14_TX_REG_BANK, 0x0002, 0x0002, 0x0000); in MHal_HDCP_HDCP14TxProcessAn()
274 MHalHdcpRegMaskWrite(DEF_HDCP14_TX_REG_BANK, 0x0001, 0x0100, 0x0000); in MHal_HDCP_HDCP14TxProcessAn()
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/utopia/UTPA2-700.0.x/modules/hdmi/hal/M7621/hdcp/
H A DhalHDCP.c184 void MHalHdcpRegMaskWrite(MS_U32 bank, MS_U16 address, MS_U16 reg_mask, MS_U16 reg_data) in MHalHdcpRegMaskWrite() function
220 MHalHdcpRegMaskWrite(DEF_HDCP14_TX_REG_BANK, 0x0001, 0x8000, 0x8000); // Enable HDCP encryption in MHal_HDCP_HDCP14TxInitHdcp()
221MHalHdcpRegMaskWrite(DEF_HDCP14_TX_REG_BANK, 0x0002, 0x001C, 0x0000); //[4]: 1: km new mode; 0: km… in MHal_HDCP_HDCP14TxInitHdcp()
236 MHalHdcpRegMaskWrite(DEF_HDCP14_TX_REG_BANK, 0x0002, 0x000F, 0x000C); in MHal_HDCP_HDCP14TxSetAuthPass()
244 MHalHdcpRegMaskWrite(DEF_HDCP14_TX_REG_BANK, 0x0002, 0x0008, 0x0008); in MHal_HDCP_HDCP14TxEnableENC_EN()
246 MHalHdcpRegMaskWrite(DEF_HDCP14_TX_REG_BANK, 0x0002, 0x0008, 0x0000); in MHal_HDCP_HDCP14TxEnableENC_EN()
256 MHalHdcpRegMaskWrite(DEF_HDCP14_TX_REG_BANK, 0x0001, 0x0100, 0x0100); in MHal_HDCP_HDCP14TxProcessAn()
257 MHalHdcpRegMaskWrite(DEF_HDCP14_TX_REG_BANK, 0x0002, 0x0002, 0x0002); in MHal_HDCP_HDCP14TxProcessAn()
258 MHalHdcpRegMaskWrite(DEF_HDCP14_TX_REG_BANK, 0x0002, 0x0002, 0x0000); in MHal_HDCP_HDCP14TxProcessAn()
270 MHalHdcpRegMaskWrite(DEF_HDCP14_TX_REG_BANK, 0x0001, 0x0100, 0x0000); in MHal_HDCP_HDCP14TxProcessAn()
[all …]
/utopia/UTPA2-700.0.x/modules/hdmi/hal/k6lite/hdcp/
H A DhalHDCP.c184 void MHalHdcpRegMaskWrite(MS_U32 bank, MS_U16 address, MS_U16 reg_mask, MS_U16 reg_data) in MHalHdcpRegMaskWrite() function
221 MHalHdcpRegMaskWrite(DEF_HDCP14_TX_REG_BANK, 0x0001, 0x8000, 0x8000); // Enable HDCP encryption in MHal_HDCP_HDCP14TxInitHdcp()
222MHalHdcpRegMaskWrite(DEF_HDCP14_TX_REG_BANK, 0x0002, 0x001C, 0x0000); //[4]: 1: km new mode; 0: km… in MHal_HDCP_HDCP14TxInitHdcp()
238 MHalHdcpRegMaskWrite(DEF_HDCP14_TX_REG_BANK, 0x0002, 0x000F, 0x000C); in MHal_HDCP_HDCP14TxSetAuthPass()
247 MHalHdcpRegMaskWrite(DEF_HDCP14_TX_REG_BANK, 0x0002, 0x0008, 0x0008); in MHal_HDCP_HDCP14TxEnableENC_EN()
249 MHalHdcpRegMaskWrite(DEF_HDCP14_TX_REG_BANK, 0x0002, 0x0008, 0x0000); in MHal_HDCP_HDCP14TxEnableENC_EN()
260 MHalHdcpRegMaskWrite(DEF_HDCP14_TX_REG_BANK, 0x0001, 0x0100, 0x0100); in MHal_HDCP_HDCP14TxProcessAn()
261 MHalHdcpRegMaskWrite(DEF_HDCP14_TX_REG_BANK, 0x0002, 0x0002, 0x0002); in MHal_HDCP_HDCP14TxProcessAn()
262 MHalHdcpRegMaskWrite(DEF_HDCP14_TX_REG_BANK, 0x0002, 0x0002, 0x0000); in MHal_HDCP_HDCP14TxProcessAn()
274 MHalHdcpRegMaskWrite(DEF_HDCP14_TX_REG_BANK, 0x0001, 0x0100, 0x0000); in MHal_HDCP_HDCP14TxProcessAn()
[all …]
/utopia/UTPA2-700.0.x/modules/hdmi/hal/curry/hdcp/
H A DhalHDCP.c184 void MHalHdcpRegMaskWrite(MS_U32 bank, MS_U16 address, MS_U16 reg_mask, MS_U16 reg_data) in MHalHdcpRegMaskWrite() function
221 MHalHdcpRegMaskWrite(DEF_HDCP14_TX_REG_BANK, 0x0001, 0x8000, 0x8000); // Enable HDCP encryption in MHal_HDCP_HDCP14TxInitHdcp()
222MHalHdcpRegMaskWrite(DEF_HDCP14_TX_REG_BANK, 0x0002, 0x001C, 0x0000); //[4]: 1: km new mode; 0: km… in MHal_HDCP_HDCP14TxInitHdcp()
238 MHalHdcpRegMaskWrite(DEF_HDCP14_TX_REG_BANK, 0x0002, 0x000F, 0x000C); in MHal_HDCP_HDCP14TxSetAuthPass()
247 MHalHdcpRegMaskWrite(DEF_HDCP14_TX_REG_BANK, 0x0002, 0x0008, 0x0008); in MHal_HDCP_HDCP14TxEnableENC_EN()
249 MHalHdcpRegMaskWrite(DEF_HDCP14_TX_REG_BANK, 0x0002, 0x0008, 0x0000); in MHal_HDCP_HDCP14TxEnableENC_EN()
260 MHalHdcpRegMaskWrite(DEF_HDCP14_TX_REG_BANK, 0x0001, 0x0100, 0x0100); in MHal_HDCP_HDCP14TxProcessAn()
261 MHalHdcpRegMaskWrite(DEF_HDCP14_TX_REG_BANK, 0x0002, 0x0002, 0x0002); in MHal_HDCP_HDCP14TxProcessAn()
262 MHalHdcpRegMaskWrite(DEF_HDCP14_TX_REG_BANK, 0x0002, 0x0002, 0x0000); in MHal_HDCP_HDCP14TxProcessAn()
274 MHalHdcpRegMaskWrite(DEF_HDCP14_TX_REG_BANK, 0x0001, 0x0100, 0x0000); in MHal_HDCP_HDCP14TxProcessAn()
[all …]
/utopia/UTPA2-700.0.x/modules/hdmi/hal/k6/hdcp/
H A DhalHDCP.c184 void MHalHdcpRegMaskWrite(MS_U32 bank, MS_U16 address, MS_U16 reg_mask, MS_U16 reg_data) in MHalHdcpRegMaskWrite() function
221 MHalHdcpRegMaskWrite(DEF_HDCP14_TX_REG_BANK, 0x0001, 0x8000, 0x8000); // Enable HDCP encryption in MHal_HDCP_HDCP14TxInitHdcp()
222MHalHdcpRegMaskWrite(DEF_HDCP14_TX_REG_BANK, 0x0002, 0x001C, 0x0000); //[4]: 1: km new mode; 0: km… in MHal_HDCP_HDCP14TxInitHdcp()
238 MHalHdcpRegMaskWrite(DEF_HDCP14_TX_REG_BANK, 0x0002, 0x000F, 0x000C); in MHal_HDCP_HDCP14TxSetAuthPass()
247 MHalHdcpRegMaskWrite(DEF_HDCP14_TX_REG_BANK, 0x0002, 0x0008, 0x0008); in MHal_HDCP_HDCP14TxEnableENC_EN()
249 MHalHdcpRegMaskWrite(DEF_HDCP14_TX_REG_BANK, 0x0002, 0x0008, 0x0000); in MHal_HDCP_HDCP14TxEnableENC_EN()
260 MHalHdcpRegMaskWrite(DEF_HDCP14_TX_REG_BANK, 0x0001, 0x0100, 0x0100); in MHal_HDCP_HDCP14TxProcessAn()
261 MHalHdcpRegMaskWrite(DEF_HDCP14_TX_REG_BANK, 0x0002, 0x0002, 0x0002); in MHal_HDCP_HDCP14TxProcessAn()
262 MHalHdcpRegMaskWrite(DEF_HDCP14_TX_REG_BANK, 0x0002, 0x0002, 0x0000); in MHal_HDCP_HDCP14TxProcessAn()
274 MHalHdcpRegMaskWrite(DEF_HDCP14_TX_REG_BANK, 0x0001, 0x0100, 0x0000); in MHal_HDCP_HDCP14TxProcessAn()
[all …]
/utopia/UTPA2-700.0.x/modules/hdmi/hal/manhattan/hdcp/
H A DhalHDCP.c175 void MHalHdcpRegMaskWrite(MS_U32 bank, MS_U16 address, MS_U16 reg_mask, MS_U16 reg_data) in MHalHdcpRegMaskWrite() function
317 MHalHdcpRegMaskWrite(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x17, BIT(10), BIT(10)); in MHal_HDCP_HDCP14FillBksv()
318MHalHdcpRegMaskWrite(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x19, BIT(15)|BIT(14), BIT(15)); // … in MHal_HDCP_HDCP14FillBksv()
320MHalHdcpRegMaskWrite(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x17, BMASK(9:0), 0x00); // address in MHal_HDCP_HDCP14FillBksv()
321 MHalHdcpRegMaskWrite(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x19, BIT(5), BIT(5)); in MHal_HDCP_HDCP14FillBksv()
325MHalHdcpRegMaskWrite(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x18, BMASK(7:0), pu8BksvData[uctemp… in MHal_HDCP_HDCP14FillBksv()
326MHalHdcpRegMaskWrite(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x19, BIT(4), BIT(4)); // trigger la… in MHal_HDCP_HDCP14FillBksv()
333MHalHdcpRegMaskWrite(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x17, BMASK(9:0), 0x40); // address in MHal_HDCP_HDCP14FillBksv()
334 MHalHdcpRegMaskWrite(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x19, BIT(5), BIT(5)); in MHal_HDCP_HDCP14FillBksv()
336MHalHdcpRegMaskWrite(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x18, BMASK(7:0), 0x80); // data in MHal_HDCP_HDCP14FillBksv()
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/utopia/UTPA2-700.0.x/modules/hdmi/hal/maserati/hdcp/
H A DhalHDCP.c175 void MHalHdcpRegMaskWrite(MS_U32 bank, MS_U16 address, MS_U16 reg_mask, MS_U16 reg_data) in MHalHdcpRegMaskWrite() function
317 MHalHdcpRegMaskWrite(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x17, BIT(10), BIT(10)); in MHal_HDCP_HDCP14FillBksv()
318MHalHdcpRegMaskWrite(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x19, BIT(15)|BIT(14), BIT(15)); // … in MHal_HDCP_HDCP14FillBksv()
320MHalHdcpRegMaskWrite(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x17, BMASK(9:0), 0x00); // address in MHal_HDCP_HDCP14FillBksv()
321 MHalHdcpRegMaskWrite(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x19, BIT(5), BIT(5)); in MHal_HDCP_HDCP14FillBksv()
325MHalHdcpRegMaskWrite(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x18, BMASK(7:0), pu8BksvData[uctemp… in MHal_HDCP_HDCP14FillBksv()
326MHalHdcpRegMaskWrite(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x19, BIT(4), BIT(4)); // trigger la… in MHal_HDCP_HDCP14FillBksv()
333MHalHdcpRegMaskWrite(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x17, BMASK(9:0), 0x40); // address in MHal_HDCP_HDCP14FillBksv()
334 MHalHdcpRegMaskWrite(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x19, BIT(5), BIT(5)); in MHal_HDCP_HDCP14FillBksv()
336MHalHdcpRegMaskWrite(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x18, BMASK(7:0), 0x80); // data in MHal_HDCP_HDCP14FillBksv()
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/utopia/UTPA2-700.0.x/modules/hdmi/hal/M7821/hdcp/
H A DhalHDCP.c175 void MHalHdcpRegMaskWrite(MS_U32 bank, MS_U16 address, MS_U16 reg_mask, MS_U16 reg_data) in MHalHdcpRegMaskWrite() function
317 MHalHdcpRegMaskWrite(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x17, BIT(10), BIT(10)); in MHal_HDCP_HDCP14FillBksv()
318MHalHdcpRegMaskWrite(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x19, BIT(15)|BIT(14), BIT(15)); // … in MHal_HDCP_HDCP14FillBksv()
320MHalHdcpRegMaskWrite(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x17, BMASK(9:0), 0x00); // address in MHal_HDCP_HDCP14FillBksv()
321 MHalHdcpRegMaskWrite(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x19, BIT(5), BIT(5)); in MHal_HDCP_HDCP14FillBksv()
325MHalHdcpRegMaskWrite(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x18, BMASK(7:0), pu8BksvData[uctemp… in MHal_HDCP_HDCP14FillBksv()
326MHalHdcpRegMaskWrite(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x19, BIT(4), BIT(4)); // trigger la… in MHal_HDCP_HDCP14FillBksv()
333MHalHdcpRegMaskWrite(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x17, BMASK(9:0), 0x40); // address in MHal_HDCP_HDCP14FillBksv()
334 MHalHdcpRegMaskWrite(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x19, BIT(5), BIT(5)); in MHal_HDCP_HDCP14FillBksv()
336MHalHdcpRegMaskWrite(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x18, BMASK(7:0), 0x80); // data in MHal_HDCP_HDCP14FillBksv()
[all …]
/utopia/UTPA2-700.0.x/modules/hdmi/hal/mainz/hdcp/
H A DhalHDCP.c175 void MHalHdcpRegMaskWrite(MS_U32 bank, MS_U16 address, MS_U16 reg_mask, MS_U16 reg_data) in MHalHdcpRegMaskWrite() function
290 MHalHdcpRegMaskWrite(DEF_HDCPKEY_REG_BANK, REG_HDCPKEY_BANK_02_L, BIT(8), BIT(8)); in MHal_HDCP_HDCP14FillKey()
293MHalHdcpRegMaskWrite(DEF_COMBO_GP_TOP_REG_BANK, REG_COMBO_GP_TOP_40_L, BIT(3)|BIT(2)|BIT(0), BIT(3… in MHal_HDCP_HDCP14FillKey()
295 MHalHdcpRegMaskWrite(DEF_HDCPKEY_REG_BANK, REG_HDCPKEY_BANK_00_L, 0x05, BMASK(9:0)); // address in MHal_HDCP_HDCP14FillKey()
299MHalHdcpRegMaskWrite(DEF_HDCPKEY_REG_BANK, REG_HDCPKEY_BANK_01_L, *(pu8KeyData +ustemp), BMASK(7:0… in MHal_HDCP_HDCP14FillKey()
302MHalHdcpRegMaskWrite(DEF_COMBO_GP_TOP_REG_BANK, REG_COMBO_GP_TOP_40_L, 0, BIT(3)|BIT(2)|BIT(0)); /… in MHal_HDCP_HDCP14FillKey()
343 MHalHdcpRegMaskWrite(DEF_HDCP22_RX_REG_BANK + u16BKOffset, 0x4E, 0x0006, 0x0006); in MHal_HDCP_HDCP2RxInit()
361 MHalHdcpRegMaskWrite(DEF_HDCP22_RX_REG_BANK + u16BKOffset, 0x4E, 0x0001, 0x0001); in MHal_HDCP_HDCP2RxProcessCipher()
370MHalHdcpRegMaskWrite(DEF_HDCP22_RX_REG_BANK + u16BKOffset, 0x4E, 0x0001, bEnable ? 0x0001 : 0x0000… in MHal_HDCP_HDCP2RxSetSKEPass()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/messi/hdcp/
H A DhalHDCP.c175 void MHalHdcpRegMaskWrite(MS_U32 bank, MS_U16 address, MS_U16 reg_mask, MS_U16 reg_data) in MHalHdcpRegMaskWrite() function
290 MHalHdcpRegMaskWrite(DEF_HDCPKEY_REG_BANK, REG_HDCPKEY_BANK_02_L, BIT(8), BIT(8)); in MHal_HDCP_HDCP14FillKey()
293MHalHdcpRegMaskWrite(DEF_COMBO_GP_TOP_REG_BANK, REG_COMBO_GP_TOP_40_L, BIT(3)|BIT(2)|BIT(0), BIT(3… in MHal_HDCP_HDCP14FillKey()
295 MHalHdcpRegMaskWrite(DEF_HDCPKEY_REG_BANK, REG_HDCPKEY_BANK_00_L, 0x05, BMASK(9:0)); // address in MHal_HDCP_HDCP14FillKey()
299MHalHdcpRegMaskWrite(DEF_HDCPKEY_REG_BANK, REG_HDCPKEY_BANK_01_L, *(pu8KeyData +ustemp), BMASK(7:0… in MHal_HDCP_HDCP14FillKey()
302MHalHdcpRegMaskWrite(DEF_COMBO_GP_TOP_REG_BANK, REG_COMBO_GP_TOP_40_L, 0, BIT(3)|BIT(2)|BIT(0)); /… in MHal_HDCP_HDCP14FillKey()
343 MHalHdcpRegMaskWrite(DEF_HDCP22_RX_REG_BANK + u16BKOffset, 0x4E, 0x0006, 0x0006); in MHal_HDCP_HDCP2RxInit()
361 MHalHdcpRegMaskWrite(DEF_HDCP22_RX_REG_BANK + u16BKOffset, 0x4E, 0x0001, 0x0001); in MHal_HDCP_HDCP2RxProcessCipher()
370MHalHdcpRegMaskWrite(DEF_HDCP22_RX_REG_BANK + u16BKOffset, 0x4E, 0x0001, bEnable ? 0x0001 : 0x0000… in MHal_HDCP_HDCP2RxSetSKEPass()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/macan/hdcp/
H A DhalHDCP.c187 void MHalHdcpRegMaskWrite(MS_U32 bank, MS_U16 address, MS_U16 reg_mask, MS_U16 reg_data) in MHalHdcpRegMaskWrite() function
345 MHalHdcpRegMaskWrite(DEF_HDCP22_RX_REG_BANK + u16BKOffset, 0x4E, 0x0001, 0x0001); in MHal_HDCP_HDCP2RxProcessCipher()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/mooney/hdcp/
H A DhalHDCP.c175 void MHalHdcpRegMaskWrite(MS_U32 bank, MS_U16 address, MS_U16 reg_mask, MS_U16 reg_data) in MHalHdcpRegMaskWrite() function
333 MHalHdcpRegMaskWrite(DEF_HDCP22_RX_REG_BANK + u16BKOffset, 0x4E, 0x0001, 0x0001); in MHal_HDCP_HDCP2RxProcessCipher()