Lines Matching refs:MHalHdcpRegMaskWrite
184 void MHalHdcpRegMaskWrite(MS_U32 bank, MS_U16 address, MS_U16 reg_mask, MS_U16 reg_data) in MHalHdcpRegMaskWrite() function
221 MHalHdcpRegMaskWrite(DEF_HDCP14_TX_REG_BANK, 0x0001, 0x8000, 0x8000); // Enable HDCP encryption in MHal_HDCP_HDCP14TxInitHdcp()
222 …MHalHdcpRegMaskWrite(DEF_HDCP14_TX_REG_BANK, 0x0002, 0x001C, 0x0000); //[4]: 1: km new mode; 0: km… in MHal_HDCP_HDCP14TxInitHdcp()
238 MHalHdcpRegMaskWrite(DEF_HDCP14_TX_REG_BANK, 0x0002, 0x000F, 0x000C); in MHal_HDCP_HDCP14TxSetAuthPass()
247 MHalHdcpRegMaskWrite(DEF_HDCP14_TX_REG_BANK, 0x0002, 0x0008, 0x0008); in MHal_HDCP_HDCP14TxEnableENC_EN()
249 MHalHdcpRegMaskWrite(DEF_HDCP14_TX_REG_BANK, 0x0002, 0x0008, 0x0000); in MHal_HDCP_HDCP14TxEnableENC_EN()
260 MHalHdcpRegMaskWrite(DEF_HDCP14_TX_REG_BANK, 0x0001, 0x0100, 0x0100); in MHal_HDCP_HDCP14TxProcessAn()
261 MHalHdcpRegMaskWrite(DEF_HDCP14_TX_REG_BANK, 0x0002, 0x0002, 0x0002); in MHal_HDCP_HDCP14TxProcessAn()
262 MHalHdcpRegMaskWrite(DEF_HDCP14_TX_REG_BANK, 0x0002, 0x0002, 0x0000); in MHal_HDCP_HDCP14TxProcessAn()
274 MHalHdcpRegMaskWrite(DEF_HDCP14_TX_REG_BANK, 0x0001, 0x0100, 0x0000); in MHal_HDCP_HDCP14TxProcessAn()
334 MHalHdcpRegMaskWrite(DEF_HDCP14_TX_REG_BANK, 0x0001, 0x0E00, u8Mode << 8); in MHal_HDCP_HDCP14TxConfigMode()
398 MHalHdcpRegMaskWrite(DEF_HDCP14_TX_REG_BANK, 0x0002, 0x000F, 0x0000); in MHal_HDCP_HDCP14TxProcessR0()
399 MHalHdcpRegMaskWrite(DEF_HDCP14_TX_REG_BANK, 0x0002, 0x000F, 0x0001); in MHal_HDCP_HDCP14TxProcessR0()
400 MHalHdcpRegMaskWrite(DEF_HDCP14_TX_REG_BANK, 0x0002, 0x000F, 0x0000); in MHal_HDCP_HDCP14TxProcessR0()
476 MHalHdcpRegMaskWrite(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x17, BIT(10), BIT(10)); in MHal_HDCP_HDCP14FillBksv()
477 …MHalHdcpRegMaskWrite(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x19, BIT(15)|BIT(14), BIT(15)); // … in MHal_HDCP_HDCP14FillBksv()
479 … MHalHdcpRegMaskWrite(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x17, BMASK(9:0), 0x00); // address in MHal_HDCP_HDCP14FillBksv()
480 MHalHdcpRegMaskWrite(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x19, BIT(5), BIT(5)); in MHal_HDCP_HDCP14FillBksv()
484 …MHalHdcpRegMaskWrite(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x18, BMASK(7:0), pu8BksvData[uctemp… in MHal_HDCP_HDCP14FillBksv()
485 …MHalHdcpRegMaskWrite(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x19, BIT(4), BIT(4)); // trigger la… in MHal_HDCP_HDCP14FillBksv()
492 … MHalHdcpRegMaskWrite(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x17, BMASK(9:0), 0x40); // address in MHal_HDCP_HDCP14FillBksv()
493 MHalHdcpRegMaskWrite(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x19, BIT(5), BIT(5)); in MHal_HDCP_HDCP14FillBksv()
495 … MHalHdcpRegMaskWrite(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x18, BMASK(7:0), 0x80); // data in MHal_HDCP_HDCP14FillBksv()
496 …MHalHdcpRegMaskWrite(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x19, BIT(4), BIT(4)); // trigger la… in MHal_HDCP_HDCP14FillBksv()
500 …MHalHdcpRegMaskWrite(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x19, BIT(15)|BIT(14), 0); // [15]: … in MHal_HDCP_HDCP14FillBksv()
503 …MHalHdcpRegMaskWrite(DEF_HDCP14_RX_REG_BANK +ulMACBankOffset, 0x00, BIT(10)|BIT(9)|BIT(8)|BIT(5)|B… in MHal_HDCP_HDCP14FillBksv()
511 MHalHdcpRegMaskWrite(DEF_HDCPKEY_REG_BANK, REG_HDCPKEY_BANK_02_L, BIT(8), BIT(8)); in MHal_HDCP_HDCP14FillKey()
514 …MHalHdcpRegMaskWrite(DEF_COMBO_GP_TOP_REG_BANK, REG_COMBO_GP_TOP_40_L, BIT(3)|BIT(2)|BIT(0), BIT(3… in MHal_HDCP_HDCP14FillKey()
516 MHalHdcpRegMaskWrite(DEF_HDCPKEY_REG_BANK, REG_HDCPKEY_BANK_00_L, BMASK(9:0), 0x05); // address in MHal_HDCP_HDCP14FillKey()
520 …MHalHdcpRegMaskWrite(DEF_HDCPKEY_REG_BANK, REG_HDCPKEY_BANK_01_L, BMASK(7:0), *(pu8KeyData +ustemp… in MHal_HDCP_HDCP14FillKey()
523 …MHalHdcpRegMaskWrite(DEF_COMBO_GP_TOP_REG_BANK, REG_COMBO_GP_TOP_40_L, BIT(3)|BIT(2)|BIT(0), 0); /… in MHal_HDCP_HDCP14FillKey()
537 …MHalHdcpRegMaskWrite(DEF_HDCP22_TX_REG_BANK + u16BKOffset, 0x0000, 0x11, bEnable ? 0x11 : 0x00); /… in MHal_HDCP_HDCP2TxInit()
540 … MHalHdcpRegMaskWrite(DEF_HDCP22_TX_REG_BANK + u16BKOffset, 0x0000, 0x02, 0x02); //reset hdcp22 FSM in MHal_HDCP_HDCP2TxInit()
541 MHalHdcpRegMaskWrite(DEF_HDCP22_TX_REG_BANK + u16BKOffset, 0x0000, 0x02, 0x00); in MHal_HDCP_HDCP2TxInit()
549 …MHalHdcpRegMaskWrite(DEF_HDCP22_TX_REG_BANK + u16BKOffset, 0x0000, 0x04, bEnable ? 0x04 : 0x00); /… in MHal_HDCP_HDCP2TxEnableEncrypt()
550 …MHalHdcpRegMaskWrite(DEF_HDCP22_TX_REG_BANK + u16BKOffset, 0x0000, 0x08, bEnable ? 0x08 : 0x00); /… in MHal_HDCP_HDCP2TxEnableEncrypt()
585 …MHalHdcpRegMaskWrite(DEF_HDCP22_TX_REG_BANK + u16BKOffset, 0x0000, 0x04, bEnable ? 0x04 : 0x00); /… in MHal_HDCP_HDCP2TxSetAuthPass()
593 MHalHdcpRegMaskWrite(DEF_HDCP22_RX_REG_BANK + u16BKOffset, 0x4E, 0x0006, 0x0006); in MHal_HDCP_HDCP2RxInit()
615 MHalHdcpRegMaskWrite(DEF_HDCP22_RX_REG_BANK + u16BKOffset, 0x4E, 0x0001, 0x0001); in MHal_HDCP_HDCP2RxProcessCipher()
624 …MHalHdcpRegMaskWrite(DEF_HDCP22_RX_REG_BANK + u16BKOffset, 0x4E, 0x0001, bEnable ? 0x0001 : 0x0000… in MHal_HDCP_HDCP2RxSetSKEPass()
658 …MHalHdcpRegMaskWrite(DEF_HDCP14_TX_REG_BANK, REG_HDCP14_TX_02_L, BIT(3), u32SetStatus? BIT(3): 0);… in MHal_HDCP_HDCP1TxEncrytionStatus()
676 …MHalHdcpRegMaskWrite(DEF_HDCP22_TX_REG_BANK, REG_HDCP22_TX_00_L, BIT(3), u32SetStatus? BIT(3): 0);… in MHal_HDCP_HDCP2TxEncrytionStatus()
694 …MHalHdcpRegMaskWrite(DEF_HDMITX_PHY_REG_BANK, REG_HDMITX_PHY_39_L, 0xFFFF, u32SetStatus? 0xF000: 0… in MHal_HDCP_HDCPTxHDMIStatus()
695 …MHalHdcpRegMaskWrite(DEF_HDMITX_PHY_REG_BANK, REG_HDMITX_PHY_2E_L, 0xE800, u32SetStatus? 0xE800: 0… in MHal_HDCP_HDCPTxHDMIStatus()