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/rk3399_rockchip-uboot/arch/arm/dts/
H A Dexynos5250-pinctrl.dtsi18 gpio-controller;
21 interrupt-controller;
26 gpio-controller;
29 interrupt-controller;
34 gpio-controller;
37 interrupt-controller;
42 gpio-controller;
45 interrupt-controller;
50 gpio-controller;
53 interrupt-controller;
[all …]
H A Dexynos4x12-pinctrl.dtsi18 gpio-controller;
21 interrupt-controller;
26 gpio-controller;
29 interrupt-controller;
34 gpio-controller;
37 interrupt-controller;
42 gpio-controller;
45 interrupt-controller;
50 gpio-controller;
53 interrupt-controller;
[all …]
H A Dexynos4210-pinctrl.dtsi20 gpio-controller;
23 interrupt-controller;
28 gpio-controller;
31 interrupt-controller;
36 gpio-controller;
39 interrupt-controller;
44 gpio-controller;
47 interrupt-controller;
52 gpio-controller;
55 interrupt-controller;
[all …]
H A Dexynos54xx-pinctrl.dtsi20 gpio-controller;
23 interrupt-controller;
28 gpio-controller;
31 interrupt-controller;
39 gpio-controller;
42 interrupt-controller;
50 gpio-controller;
53 interrupt-controller;
58 gpio-controller;
61 interrupt-controller;
[all …]
H A Ds5pc110-pinctrl.dtsi14 gpio-controller;
19 gpio-controller;
24 gpio-controller;
29 gpio-controller;
34 gpio-controller;
39 gpio-controller;
44 gpio-controller;
49 gpio-controller;
54 gpio-controller;
59 gpio-controller;
[all …]
H A Ds5pc100-pinctrl.dtsi12 gpio-controller;
17 gpio-controller;
22 gpio-controller;
27 gpio-controller;
32 gpio-controller;
37 gpio-controller;
42 gpio-controller;
47 gpio-controller;
52 gpio-controller;
57 gpio-controller;
[all …]
H A Dhi3798cv200.dtsi11 #include <dt-bindings/interrupt-controller/arm-gic.h>
58 gic: interrupt-controller@f1001000 {
64 interrupt-controller;
85 crg: clock-reset-controller@8a22000 {
91 gmacphyrst: reset-controller {
102 sysctrl: system-controller@8000000 {
208 gpio-controller;
210 interrupt-controller;
221 gpio-controller;
223 interrupt-controller;
[all …]
H A Duniphier-pro4.dtsi122 gpio-controller;
129 gpio-controller;
136 gpio-controller;
143 gpio-controller;
150 gpio-controller;
157 gpio-controller;
164 gpio-controller;
171 gpio-controller;
178 gpio-controller;
185 gpio-controller;
[all …]
H A Duniphier-pxs2.dtsi184 gpio-controller;
191 gpio-controller;
198 gpio-controller;
205 gpio-controller;
212 gpio-controller;
219 gpio-controller;
226 gpio-controller;
233 gpio-controller;
240 gpio-controller;
247 gpio-controller;
[all …]
H A Dstm32mp157-pinctrl.dtsi10 pinctrl: pin-controller@50002000 {
20 gpio-controller;
22 interrupt-controller;
32 gpio-controller;
34 interrupt-controller;
44 gpio-controller;
46 interrupt-controller;
56 gpio-controller;
58 interrupt-controller;
68 gpio-controller;
[all …]
H A Duniphier-pro5.dtsi209 gpio-controller;
216 gpio-controller;
223 gpio-controller;
230 gpio-controller;
237 gpio-controller;
244 gpio-controller;
251 gpio-controller;
258 gpio-controller;
265 gpio-controller;
272 gpio-controller;
[all …]
/rk3399_rockchip-uboot/drivers/usb/gadget/
H A Dci_udc.c137 static struct ci_drv controller = { variable
155 return &controller.epts[(ep_num * 2) + dir_in]; in ci_get_qh()
169 uint8_t *imem = controller.items_mem + (index * ILIST_ENT_SZ); in ci_get_qtd()
269 if (num == 0 && controller.ep0_req) in ci_ep_alloc_request()
270 return &controller.ep0_req->req; in ci_ep_alloc_request()
279 controller.ep0_req = ci_req; in ci_ep_alloc_request()
294 if (!controller.ep0_req) in ci_ep_free_request()
296 controller.ep0_req = 0; in ci_ep_free_request()
306 struct ci_udc *udc = (struct ci_udc *)controller.ctrl->hcor; in ep_enable()
336 if ((max > 64) && (controller.gadget.speed == USB_SPEED_FULL)) in ci_ep_enable()
[all …]
/rk3399_rockchip-uboot/drivers/usb/cdns3/
H A DKconfig5 Say Y here if your system has a Cadence USB3 dual-role controller.
11 bool "Cadence USB3 device controller"
15 Say Y here to enable device controller functionality of the
18 This controller supports FF and HS mode. It doesn't support
22 bool "Cadence USB3 host controller"
25 Say Y here to enable host controller functionality of the
28 Host controller is compliant with XHCI so it will use
32 bool "SPL support for Cadence USB3 device controller"
36 Say Y here to enable device controller functionality of the
39 This controller supports FF and HS mode. It doesn't support
[all …]
/rk3399_rockchip-uboot/drivers/usb/host/
H A DKconfig14 "SuperSpeed" host controller hardware.
22 USB controller based on the DesignWare USB3 IP Core.
30 USB controller based on the DesignWare USB3 IP Core.
43 bool "Support for PCI-based xHCI USB controller"
47 Enables support for the PCI-based xHCI controller.
74 "high speed" (480 Mbit/sec, 60 Mbyte/sec) host controller hardware.
75 If your USB host controller supports USB 2.0, you will likely want to
81 connect to a companion controller. If you configure EHCI, you should
91 bool "Support for Atmel on-chip EHCI USB controller"
95 Enables support for the on-chip EHCI controller on Atmel chips.
[all …]
/rk3399_rockchip-uboot/doc/device-tree-bindings/gpio/
H A Dnvidia,tegra20-gpio.txt1 NVIDIA Tegra GPIO controller
5 - reg : Physical base address and length of the controller's registers.
6 - interrupts : The interrupt outputs from the controller. For Tegra20,
12 - gpio-controller : Marks the device node as a GPIO controller.
22 - interrupt-controller : Marks the device node as an interrupt controller.
37 gpio-controller;
39 interrupt-controller;
H A Dgpio-msm.txt1 Qualcomm Snapdragon GPIO controller
5 - reg : Physical base address and length of the controller's registers.
6 This controller is called "Top Level Mode Multiplexing" in
9 - gpio-controller : Marks the device node as a GPIO controller.
18 gpio-controller;
H A Dgpio.txt12 gpio-phandle : phandle to gpio controller node
14 (controller specific)
34 gpio-controller
38 gpio-controller
49 Note that gpio-specifier length is controller dependent. In the
55 Exact meaning of each specifier cell is controller specific, and must
66 GPIO pin number, and GPIO flags as accepted by the "qe_pio_e" gpio-controller.
76 GPIO controller that achieves (or represents, for inputs) a logically asserted
79 the GPIO controller and the device, then the gpio-specifier will represent the
106 (at the GPIO controller) assuming that the device is configured for this
[all …]
H A Dgpio-samsung.txt6 - reg: Physical base address of the controller and length of memory mapped
11 <[phandle of the gpio controller node]
12 [pin number within the gpio controller]
28 - gpio-controller: Specifies that the node is a gpio controller.
34 gpa0: gpio-controller@11400000 {
40 gpio-controller;
/rk3399_rockchip-uboot/drivers/usb/musb-new/
H A DKconfig11 Enables the MUSB USB dual-role controller in host mode.
19 Enables the MUSB USB dual-role controller in gadget mode.
26 speed USB controller based on the Mentor Graphics
30 bool "Enable TI OTG USB controller"
35 speed USB controller based on the Mentor Graphics
41 bool "Enable Microchip PIC32 DRC USB controller"
44 Say y to enable PIC32 USB DRC controller support
48 bool "Enable sunxi OTG / DRC USB controller"
52 Say y here to enable support for the sunxi OTG / DRC USB controller
/rk3399_rockchip-uboot/drivers/reset/
H A DKconfig7 Enable support for the reset controller driver class. Many hardware
9 reset controller hardware module within the chip. In U-Boot, reset
10 controller drivers allow control over these reset signals. In some
19 Enable support for the reset controller driver class. Many hardware
21 reset controller hardware module within the chip. In U-Boot, reset
22 controller drivers allow control over these reset signals. In some
31 Enable support for a test reset controller implementation, which
48 direct register access to the Tegra CAR (Clock And Reset controller).
58 bool "Reset controller driver for BCM6345"
61 Support reset controller on BCM6345.
[all …]
/rk3399_rockchip-uboot/doc/device-tree-bindings/usb/
H A Ddwc2.txt1 Platform DesignWare HS OTG USB 2.0 controller
6 - brcm,bcm2835-usb: The DWC2 USB controller instance in the BCM2835 SoC.
7 - hisilicon,hi6220-usb: The DWC2 USB controller instance in the hi6220 SoC.
8 - rockchip,rk3066-usb: The DWC2 USB controller instance in the rk3066 Soc;
12 - "lantiq,arx100-usb": The DWC2 USB controller instance in Lantiq ARX SoCs;
13 - "lantiq,xrx200-usb": The DWC2 USB controller instance in Lantiq XRX SoCs;
14 - "amlogic,meson8-usb": The DWC2 USB controller instance in Amlogic Meson8 SoCs;
15 - "amlogic,meson8b-usb": The DWC2 USB controller instance in Amlogic Meson8b SoCs;
16 - "amlogic,meson-gxbb-usb": The DWC2 USB controller instance in Amlogic S905 SoCs;
17 - "amcc,dwc-otg": The DWC2 USB controller instance in AMCC Canyonlands 460EX SoCs;
[all …]
/rk3399_rockchip-uboot/drivers/ddr/fsl/
H A DKconfig11 Select Freescale Multi Mode DDR controller (MMDC).
62 Enable Freescale DDR controller.
68 Enable Freescale DDR2 controller.
74 Enable Freescale DDR2 controller for MPC86xx SoCs.
80 Enable Freescale DDR3 controller for PowerPC SoCs.
86 Enable Freescale DDR3 controller for ARM SoCs.
91 Enable Freescale DDR4 controller.
113 bool "Freescale DDR4 controller"
118 bool "Freescale DDR3 controller"
124 bool "Freescale DDR2 controller"
[all …]
/rk3399_rockchip-uboot/arch/mips/dts/
H A Dpic32mzda.dtsi8 #include <dt-bindings/interrupt-controller/irq.h>
65 evic: interrupt-controller@1f810000 {
67 interrupt-controller;
86 gpio-controller;
93 gpio-controller;
100 gpio-controller;
107 gpio-controller;
114 gpio-controller;
121 gpio-controller;
128 gpio-controller;
[all …]
H A Dimg,boston.dts5 #include <dt-bindings/interrupt-controller/irq.h>
6 #include <dt-bindings/interrupt-controller/mips-gic.h>
34 gic: interrupt-controller {
37 interrupt-controller;
69 pci0_intc: interrupt-controller {
70 interrupt-controller;
98 pci1_intc: interrupt-controller {
99 interrupt-controller;
126 pci2_intc: interrupt-controller {
127 interrupt-controller;
[all …]
/rk3399_rockchip-uboot/doc/device-tree-bindings/pinctrl/
H A Drockchip,pinctrl.txt19 defined as gpio sub-nodes of the pinmux controller.
21 Required properties for iomux controller:
28 Optional properties for iomux controller:
30 as some SoCs carry parts of the iomux controller registers there.
33 Deprecated properties for iomux controller:
34 - reg: first element is the general register space of the iomux controller
42 - interrupts: base interrupt of the gpio bank in the interrupt controller
44 - gpio-controller: identifies the node as a gpio controller and pin bank.
48 - interrupt-controller: identifies the controller node as interrupt-parent.
51 bindings/interrupt-controller/interrupts.txt
[all …]

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