Home
last modified time | relevance | path

Searched refs:topology (Results 1 – 25 of 31) sorted by relevance

12

/rk3399_ARM-atf/plat/qemu/qemu_sbsa/
H A Dsbsa_sip_svc.c86 struct platform_cpu_topology topology; in sbsa_sip_smc_handler() local
88 topology = sbsa_platform_cpu_topology(); in sbsa_sip_smc_handler()
90 if (topology.cores > 0) { in sbsa_sip_smc_handler()
91 SMC_RET5(handle, NULL, topology.sockets, in sbsa_sip_smc_handler()
92 topology.clusters, topology.cores, in sbsa_sip_smc_handler()
93 topology.threads); in sbsa_sip_smc_handler()
/rk3399_ARM-atf/plat/mediatek/topology/
H A Drules.mk9 MODULE := topology
16 LOCAL_SRCS-y := $(LOCAL_DIR)/$(CPU_PWR_TOPOLOGY)/topology.c
18 LOCAL_SRCS-y := $(LOCAL_DIR)/$(ARCH_VERSION)/topology.c
/rk3399_ARM-atf/plat/mediatek/drivers/cpu_pm/
H A Drules.mk16 SUB_RULES-${CONFIG_MTK_CPU_PM_SUPPORT} += $(LOCAL_DIR)/topology/$(CPU_PWR_TOPOLOGY)
18 SUB_RULES-${CONFIG_MTK_CPU_PM_SUPPORT} += $(LOCAL_DIR)/topology/default
/rk3399_ARM-atf/plat/arm/board/fvp/
H A Dfvp_topology.c43 cluster_count = FCONF_GET_PROPERTY(hw_config, topology, plat_cluster_count); in plat_get_power_domain_tree_desc()
44 cpus_per_cluster = FCONF_GET_PROPERTY(hw_config, topology, cluster_cpu_count); in plat_get_power_domain_tree_desc()
/rk3399_ARM-atf/plat/mediatek/drivers/cpu_pm/cpcv5_4/
H A Dmt_cpu_pm.c236 const struct pwr_toplogy *topology) in cpupm_cpu_smp_afflv() argument
239 if (topology) in cpupm_cpu_smp_afflv()
240 mtk_set_mcupm_group_hint(topology->group); in cpupm_cpu_smp_afflv()
338 const struct pwr_toplogy *topology) in mcusys_prepare_suspend() argument
348 if (topology) in mcusys_prepare_suspend()
349 mtk_set_mcupm_group_hint(topology->group); in mcusys_prepare_suspend()
485 const struct pwr_toplogy *topology) in mcusys_prepare_resume() argument
493 if (topology) in mcusys_prepare_resume()
494 mtk_set_mcupm_group_hint(topology->group); in mcusys_prepare_resume()
/rk3399_ARM-atf/plat/qemu/common/sp_min/
H A Dsp_min-qemu.mk10 plat/qemu/topology.c
/rk3399_ARM-atf/plat/mediatek/mt8189/
H A Dplatform.mk17 -I${MTK_PLAT}/drivers/cpu_pm/topology/inc \
32 MODULES-y += $(MTK_PLAT)/topology
/rk3399_ARM-atf/plat/mediatek/mt8196/
H A Dplatform.mk31 -I${MTK_PLAT}/drivers/cpu_pm/topology/inc \
61 MODULES-y += $(MTK_PLAT)/topology
/rk3399_ARM-atf/lib/psci/
H A Dpsci_setup.c133 *topology) in populate_power_domain_tree()
162 num_children = topology[parent_node_index]; in populate_power_domain_tree()
/rk3399_ARM-atf/docs/plat/arm/fvp/
H A Dfvp-build-options.rst7 build the topology tree within TF-A. By default TF-A is configured for dual
8 cluster topology and this option can be used to override the default value.
/rk3399_ARM-atf/docs/components/fconf/
H A Dindex.rst46 captures the hardware topology of the platform from the HW_CONFIG device tree.
57 such as topology, GIC controller, PSCI hooks, CPU ID etc.
71 FCONF_REGISTER_POPULATOR(HW_CONFIG, topology, fconf_populate_topology);
/rk3399_ARM-atf/docs/design_documents/
H A Dpsci_osi_mode.rst17 A power domain topology is a logical hierarchy of power domains in a system that
24 Entry into low-power states for a topology node above the core level requires
40 states, and chooses the deepest power state for a topology node that can be
49 states, and may request for a topology node to enter a low-power state when
185 CPU_SUSPEND is for moving a topology node into a low-power state.
197 a low-power state is requested for a topology node above the core level,
202 low-power state is requested for a topology node above the core level,
224 * The requested level in the power domain topology to enter a low-power
278 cores in a topology node call CPU_OFF, the last core will power down the node.
280 In OS-initiated mode, if a subset of the cores in a topology node has called
/rk3399_ARM-atf/plat/mediatek/mt8188/
H A Dplatform.mk51 MODULES-y += $(MTK_PLAT)/topology
/rk3399_ARM-atf/fdts/
H A Dfvp-defs.dtsi10 /* Set default topology values if not passed from platform's makefile */
27 /* Get platform's topology */
H A Darm_fpga.dts7 * topology is auto-detected by BL31, and the /cpus node is created and
H A Dstm32mp15-ddr3-dhsom-2x4Gb-1066-binG.dtsi6 * 2x DDR3L 4Gb each, 16-bit, 533MHz, Single Die Package in flyby topology.
H A Dfvp-defs-dynamiq.dtsi10 /* Set default topology values if not passed from platform's makefile */
/rk3399_ARM-atf/docs/plat/arm/arm_fpga/
H A Dindex.rst22 As the number and topology layout of the CPU cores differs significantly
47 fill the CPU topology nodes. It will also be passed on to BL33, by
/rk3399_ARM-atf/plat/xilinx/zynqmp/pm_service/
H A Dpm_api_clock.h302 uint32_t *topology);
H A Dpm_api_clock.c2494 uint32_t *topology) in pm_api_clock_get_topology() argument
2511 (void)memset(topology, 0, CLK_TOPOLOGY_PAYLOAD_LEN); in pm_api_clock_get_topology()
2526 topology[i] = clock_nodes[index + i].type; in pm_api_clock_get_topology()
2527 topology[i] |= ((uint32_t)clock_nodes[index + i].clkflags << in pm_api_clock_get_topology()
2530 topology[i] |= ((uint32_t)(typeflags & CLK_TYPEFLAGS_BITS_MASK) << in pm_api_clock_get_topology()
2532 topology[i] |= ((uint32_t)(typeflags & CLK_TYPEFLAGS2_BITS_MASK) >> in pm_api_clock_get_topology()
/rk3399_ARM-atf/plat/arm/board/fvp/fconf/
H A Dfconf_hw_config_getter.c410 FCONF_REGISTER_POPULATOR(HW_CONFIG, topology, fconf_populate_topology);
/rk3399_ARM-atf/docs/design/
H A Dpsci-pd-tree.rst10 system. This approach is inflexible because a change to the topology
23 mechanism used to populate the power domain topology tree.
73 The following example power domain topology tree will be used to describe the
/rk3399_ARM-atf/plat/qemu/qemu/
H A Dplatform.mk163 ${PLAT_QEMU_COMMON_PATH}/topology.c
/rk3399_ARM-atf/plat/brcm/board/stingray/
H A Dplatform.mk199 plat/${SOC_DIR}/src/topology.c \
/rk3399_ARM-atf/docs/plat/marvell/armada/
H A Dbuild.rst159 The DDR topology map index/name, default is 0.
215 The DDR topology map index/name, default is 0.
342 the image has the preset CPU at 1000 MHz, preset DDR3 at 800 MHz, the DDR topology of DDR4 2CS,

12