| #
f341c10e |
| 11-Jul-2022 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes Ie650728a,Ie2736ef4 into integration
* changes:
refactor(stm32mp1-fdts): add missing spaces for consistent codestyle
refactor(stm32mp1-fdts): drop unused DDR calibration result on
Merge changes Ie650728a,Ie2736ef4 into integration
* changes:
refactor(stm32mp1-fdts): add missing spaces for consistent codestyle
refactor(stm32mp1-fdts): drop unused DDR calibration result on DHCOM
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| #
eef485ab |
| 16-Feb-2022 |
Johann Neuhauser <jneuhauser@dh-electronics.com> |
feat(stm32mp15-fdts): add support for STM32MP157C based DHCOM SoM on PDK2 board
This is an SoM in SODIMM-200 format on an evaluation board called
"DHCOM Premium Developer Kit #2" (DHCOM PDK2 for sho
feat(stm32mp15-fdts): add support for STM32MP157C based DHCOM SoM on PDK2 board
This is an SoM in SODIMM-200 format on an evaluation board called
"DHCOM Premium Developer Kit #2" (DHCOM PDK2 for short). The SoM features an
STM32MP157C SoC with 1 GB DDR3, 8 GB eMMC, microSD and 2 MB SPI flash.
The baseboard has multiple UART, USB, SPI, and I2C ports/headers and several
other interfaces that are not important for TF-A.
These dts(i) files are based on DHCOM dt's from Linux 5.16 and U-Boot 2022.01.
The DRAM calibration values are taken from U-Boot 2022.01 and are optimized for
industrial temperature range above 85° C.
TF-A on this board was fully tested with the latest OP-TEE developer setup.
Change-Id: I696c01742954d761fbad312cd1059e3ab01fa93c
Signed-off-by: Johann Neuhauser <jneuhauser@dh-electronics.com>
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