Merge "docs(marvell): fix typo 8K => A8K" into integration

Merge changes from topic "mp/ras_refactoring" into integration

* changes:
docs: document do_panic() and panic() helper functions
fix(ras): restrict RAS support for NS world

fix(ras): restrict RAS support for NS world

Current RAS framework in TF-A only supports handling errors originating
from NS world but the HANDLE_EA_EL3_FIRST flag configures it for all
lower Els. To

fix(ras): restrict RAS support for NS world

Current RAS framework in TF-A only supports handling errors originating
from NS world but the HANDLE_EA_EL3_FIRST flag configures it for all
lower Els. To make the current design of RAS explicit, rename this macro
to HANDLE_EA_EL3_FIRST_NS and set EA bit in scr_el3 only when
switching to NS world.

Note: I am unaware of any platform which traps errors originating in
Secure world to EL3, if there is any such platform then it need to
be explicitly implemented in TF-A

Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Change-Id: If58eb201d8fa792c16325c85c26056e9b409b750

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docs(marvell): fix typo 8K => A8K

It is Armada 80x0, hence A8K (like A7K).

Change-Id: I4888b472204ecd19bfe9b8c89adaa1a99b01dd5f
Signed-off-by: Pali Rohár <pali@kernel.org>

Merge "docs(a3k): update documentation about DEBUG mode for UART" into integration

docs(a3k): update documentation about DEBUG mode for UART

DEBUG mode can be enabled without any issue for Armada 37xx and also for
other A7K/A8K/CN913x. There is no incompatibility with Xmodem proto

docs(a3k): update documentation about DEBUG mode for UART

DEBUG mode can be enabled without any issue for Armada 37xx and also for
other A7K/A8K/CN913x. There is no incompatibility with Xmodem protocol
like it was written before, because Armada 37xx UART images do not print
anything on UART during image transfer and A7K/A8K/CN913x BLE image
automatically turn off debugging output when booting over UART. Looks
like this incorrect information is some relict from the past.

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I85adc3c21036656b4620c4692e04330cad11ea2f

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Merge "docs(a3k): add information about system-wide Crypto++ library" into integration

Merge "docs(a3k): fix information about SATA GPT booting" into integration

docs(a3k): add information about system-wide Crypto++ library

On Debian systems it is possible to use system-wide Crypto++ library.

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: Ib01d93767

docs(a3k): add information about system-wide Crypto++ library

On Debian systems it is possible to use system-wide Crypto++ library.

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: Ib01d9376776b8afcb1ca46c16076e28c3d2e581d

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docs(a3k): fix information about SATA GPT booting

Armada 3720 BootROM searches for GPT partition with partition type GUID
6828311A-BA55-42A4-BCDE-A89BB5EDECAE and completely ignores GPT
partition na

docs(a3k): fix information about SATA GPT booting

Armada 3720 BootROM searches for GPT partition with partition type GUID
6828311A-BA55-42A4-BCDE-A89BB5EDECAE and completely ignores GPT
partition name. It does not check for "MARVELL BOOT PARTITION".

This fact is incorrectly documented even in official Marvell Armada 3700
Functional Specification.

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I35279f39de2d12148fc16f2730a9a074dc0b58eb

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Merge "plat/marvell/a8k: add Globalscale Mochabin support" into integration

plat/marvell/a8k: add Globalscale Mochabin support

Add support for Globalscale MOCHAbin board.

Its based on Armada 7040 SoC and ships in multiple DRAM options:
* 2GB DDR4 (1CS)
* 4GB DDR4 (1CS)
* 8

plat/marvell/a8k: add Globalscale Mochabin support

Add support for Globalscale MOCHAbin board.

Its based on Armada 7040 SoC and ships in multiple DRAM options:
* 2GB DDR4 (1CS)
* 4GB DDR4 (1CS)
* 8GB DDR4 (2CS)

Since it ships in multiple DRAM configurations, an
Armada 3k style DDR_TOPOLOGY variable is added.
Currently, this only has effect on the MOCHAbin, but
I expect more boards with multiple DRAM sizes to be
supported.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Change-Id: I8a1ec9268fed34f6a81c5cbf1e891f638d461305

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Merge changes from topic "advk-serror" into integration

* changes:
fix(plat/marvell/a3k): disable HANDLE_EA_EL3_FIRST by default
fix(plat/marvell/a3k): update information about PCIe abort hack

Merge "docs(plat/marvell/a8k): document MSS_SUPPORT and SCP_BL2 build options" into integration

Merge changes I75a4554a,Idce603e4 into integration

* changes:
feat(plat/marvell): introduce t9130_cex7_eval
feat(plat/marvell/a8k): allow overriding default paths

feat(plat/marvell): introduce t9130_cex7_eval

This patch adds the necessary files to support
the SolidRun CN913X CEx7 Evaluation Board.

Because the DRAM connectivity and SerDes settings
is shared w

feat(plat/marvell): introduce t9130_cex7_eval

This patch adds the necessary files to support
the SolidRun CN913X CEx7 Evaluation Board.

Because the DRAM connectivity and SerDes settings
is shared with the CN913X DB - reuse relevant
board-specific files.

Change-Id: I75a4554a4373953ca3fdf3b04c4a29c2c4f8ea80
Signed-off-by: Marcin Wojtas <mw@semihalf.com>

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fix(plat/marvell/a3k): disable HANDLE_EA_EL3_FIRST by default

It was enabled in commit 3c7dcdac5c50 ("marvell/a3700: Prevent SError
accessing PCIe link while it is down") with a workaround for a bug

fix(plat/marvell/a3k): disable HANDLE_EA_EL3_FIRST by default

It was enabled in commit 3c7dcdac5c50 ("marvell/a3700: Prevent SError
accessing PCIe link while it is down") with a workaround for a bug found
in U-Boot and Linux kernel driver pci-aardvark.c (PCIe controller driver
for Armada 37xx SoC) which results in SError interrupt caused by AXI
SLVERR on external access (syndrome 0xbf000002) and immediate kernel
panic.

Now when proper patches are in both U-Boot and Linux kernel projects,
this workaround in TF-A should not have to be enabled by default
anymore as it has unwanted side effects like propagating all external
aborts, including non-fatal/correctable into EL3 and making them as
fatal which cause immediate abort.

Add documentation for HANDLE_EA_EL3_FIRST build option into Marvell
Armada build section.

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: Ic92b65bf9923505ab682830afb66c2f6cec70491

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docs(plat/marvell/a8k): document MSS_SUPPORT and SCP_BL2 build options

Add missing documentation for MSS_SUPPORT and SCP_BL2 build options used
on Marvell platforms.

Signed-off-by: Pali Rohár <pali

docs(plat/marvell/a8k): document MSS_SUPPORT and SCP_BL2 build options

Add missing documentation for MSS_SUPPORT and SCP_BL2 build options used
on Marvell platforms.

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I852f60569a9a49269ae296c56cc83eb438528bee

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Merge "refactor(plat/marvell): move doc platform build options into own subsections" into integration

refactor(plat/marvell): move doc platform build options into own subsections

Update documentation and group platform specific build options into
their own subsections.

Signed-off-by: Pali Rohár <pa

refactor(plat/marvell): move doc platform build options into own subsections

Update documentation and group platform specific build options into
their own subsections.

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I05927d8abf9f811493c49b856f06329220e7d8bb

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Merge changes from topic "marvell-a3k-a8k-updates" into integration

* changes:
fix(plat/marvell/a3k): Fix building uart-images.tgz.bin archive
refactor(plat/marvell/a3k): Rename *_CFG and *_SIG

Merge changes from topic "marvell-a3k-a8k-updates" into integration

* changes:
fix(plat/marvell/a3k): Fix building uart-images.tgz.bin archive
refactor(plat/marvell/a3k): Rename *_CFG and *_SIG variables
refactor(plat/marvell/a3k): Rename DOIMAGETOOL to TBB
refactor(plat/marvell/a3k): Remove useless DOIMAGEPATH variable
fix(plat/marvell/a3k): Fix check for external dependences
fix(plat/marvell/a8k): Add missing build dependency for BLE target
fix(plat/marvell/a8k): Correctly set include directories for individual targets
fix(plat/marvell/a8k): Require that MV_DDR_PATH is correctly set

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fix(plat/marvell/a3k): Fix check for external dependences

Old Marvell a3700_utils and mv-ddr tarballs do not have to work with
latest TF-A code base. Marvell do not provide these old tarballs on
Ext

fix(plat/marvell/a3k): Fix check for external dependences

Old Marvell a3700_utils and mv-ddr tarballs do not have to work with
latest TF-A code base. Marvell do not provide these old tarballs on
Extranet anymore. Public version on github repository contains all
patches and is working fine, so for public TF-A builds use only public
external dependencies from git.

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: Iee5ac6daa9a1826a5b80a8d54968bdbb8fe72f61

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fix(plat/marvell/a8k): Require that MV_DDR_PATH is correctly set

Target mrvl_flash depends on external mv_ddr source code which is not
part of TF-A project. Do not expect that it is pre-downloaded a

fix(plat/marvell/a8k): Require that MV_DDR_PATH is correctly set

Target mrvl_flash depends on external mv_ddr source code which is not
part of TF-A project. Do not expect that it is pre-downloaded at some
specific location and require user to specify correct path to mv_ddr
source code via MV_DDR_PATH build option.

TF-A code for Armada 37x0 platform also depends on mv_ddr source code
and already requires passing correct MV_DDR_PATH build option.

So for A8K implement same checks for validity of MV_DDR_PATH option as
are already used by TF-A code for Armada 37x0 platform.

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I792f2bfeab0cec89b1b64e88d7b2c456e22de43a

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Merge "plat: marvell: armada: a3k: Add new compile option A3720_DB_PM_WAKEUP_SRC" into integration

plat: marvell: armada: a3k: Add new compile option A3720_DB_PM_WAKEUP_SRC

This new compile option is only for Armada 3720 Development Board. When
it is set to 1 then TF-A will setup PM wake up src c

plat: marvell: armada: a3k: Add new compile option A3720_DB_PM_WAKEUP_SRC

This new compile option is only for Armada 3720 Development Board. When
it is set to 1 then TF-A will setup PM wake up src configuration.

By default this new option is disabled as it is board specific and no
other A37xx board has PM wake up src configuration.

Currently neither upstream U-Boot nor upstream Linux kernel has wakeup
support for A37xx platforms, so having it disabled does not cause any
issue.

Prior this commit PM wake up src configuration specific for Armada 3720
Development Board was enabled for every A37xx board. After this change it
is enabled only when compiling with build flag A3720_DB_PM_WAKEUP_SRC=1

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I09fea1172c532df639acb3bb009cfde32d3c5766

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