1a2847172SGrzegorz JaszczykTF-A Build Instructions for Marvell Platforms 2a2847172SGrzegorz Jaszczyk============================================= 3a2847172SGrzegorz Jaszczyk 4a2847172SGrzegorz JaszczykThis section describes how to compile the Trusted Firmware-A (TF-A) project for Marvell's platforms. 5a2847172SGrzegorz Jaszczyk 6a2847172SGrzegorz JaszczykBuild Instructions 7a2847172SGrzegorz Jaszczyk------------------ 8a2847172SGrzegorz Jaszczyk(1) Set the cross compiler 9a2847172SGrzegorz Jaszczyk 10a2847172SGrzegorz Jaszczyk .. code:: shell 11a2847172SGrzegorz Jaszczyk 12a2847172SGrzegorz Jaszczyk > export CROSS_COMPILE=/path/to/toolchain/aarch64-linux-gnu- 13a2847172SGrzegorz Jaszczyk 14a2847172SGrzegorz Jaszczyk(2) Set path for FIP images: 15a2847172SGrzegorz Jaszczyk 16a2847172SGrzegorz JaszczykSet U-Boot image path (relatively to TF-A root or absolute path) 17a2847172SGrzegorz Jaszczyk 18a2847172SGrzegorz Jaszczyk .. code:: shell 19a2847172SGrzegorz Jaszczyk 20a2847172SGrzegorz Jaszczyk > export BL33=path/to/u-boot.bin 21a2847172SGrzegorz Jaszczyk 22a2847172SGrzegorz JaszczykFor example: if U-Boot project (and its images) is located at ``~/project/u-boot``, 23a2847172SGrzegorz JaszczykBL33 should be ``~/project/u-boot/u-boot.bin`` 24a2847172SGrzegorz Jaszczyk 25a2847172SGrzegorz Jaszczyk .. note:: 26a2847172SGrzegorz Jaszczyk 27a2847172SGrzegorz Jaszczyk *u-boot.bin* should be used and not *u-boot-spl.bin* 28a2847172SGrzegorz Jaszczyk 29de89b282SPali RohárSet MSS/SCP image path (mandatory only for A7K/A8K/CN913x when MSS_SUPPORT=1) 30a2847172SGrzegorz Jaszczyk 31a2847172SGrzegorz Jaszczyk .. code:: shell 32a2847172SGrzegorz Jaszczyk 33a2847172SGrzegorz Jaszczyk > export SCP_BL2=path/to/mrvl_scp_bl2*.img 34a2847172SGrzegorz Jaszczyk 35a2847172SGrzegorz Jaszczyk(3) Armada-37x0 build requires WTP tools installation. 36a2847172SGrzegorz Jaszczyk 37a2847172SGrzegorz JaszczykSee below in the section "Tools and external components installation". 38a2847172SGrzegorz JaszczykInstall ARM 32-bit cross compiler, which is required for building WTMI image for CM3 39a2847172SGrzegorz Jaszczyk 40a2847172SGrzegorz Jaszczyk .. code:: shell 41a2847172SGrzegorz Jaszczyk 42a2847172SGrzegorz Jaszczyk > sudo apt-get install gcc-arm-linux-gnueabi 43a2847172SGrzegorz Jaszczyk 44a2847172SGrzegorz Jaszczyk(4) Clean previous build residuals (if any) 45a2847172SGrzegorz Jaszczyk 46a2847172SGrzegorz Jaszczyk .. code:: shell 47a2847172SGrzegorz Jaszczyk 48a2847172SGrzegorz Jaszczyk > make distclean 49a2847172SGrzegorz Jaszczyk 50a2847172SGrzegorz Jaszczyk(5) Build TF-A 51a2847172SGrzegorz Jaszczyk 52a2847172SGrzegorz JaszczykThere are several build options: 53a2847172SGrzegorz Jaszczyk 5424e6e10bSPali Rohár- PLAT 5524e6e10bSPali Rohár 5624e6e10bSPali Rohár Supported Marvell platforms are: 5724e6e10bSPali Rohár 5824e6e10bSPali Rohár - a3700 - A3720 DB, EspressoBin and Turris MOX 5924e6e10bSPali Rohár - a70x0 6024e6e10bSPali Rohár - a70x0_amc - AMC board 610a6e2147SRobert Marko - a70x0_mochabin - Globalscale MOCHAbin 6224e6e10bSPali Rohár - a80x0 6324e6e10bSPali Rohár - a80x0_mcbin - MacchiatoBin 6424e6e10bSPali Rohár - a80x0_puzzle - IEI Puzzle-M801 6524e6e10bSPali Rohár - t9130 - CN913x 66d01139f3SMarcin Wojtas - t9130_cex7_eval - CN913x CEx7 Evaluation Board 6724e6e10bSPali Rohár 68a2847172SGrzegorz Jaszczyk- DEBUG 69a2847172SGrzegorz Jaszczyk 70a2847172SGrzegorz Jaszczyk Default is without debug information (=0). in order to enable it use ``DEBUG=1``. 7119a2d518SPali Rohár Can be enabled also when building UART recovery images, there is no issue with it. 7219a2d518SPali Rohár 7319a2d518SPali Rohár Production TF-A images should be built without this debug option! 74a2847172SGrzegorz Jaszczyk 75a2847172SGrzegorz Jaszczyk- LOG_LEVEL 76a2847172SGrzegorz Jaszczyk 77a2847172SGrzegorz Jaszczyk Defines the level of logging which will be purged to the default output port. 78a2847172SGrzegorz Jaszczyk 79f20cb7e5SPali Rohár - 0 - LOG_LEVEL_NONE 80f20cb7e5SPali Rohár - 10 - LOG_LEVEL_ERROR 81f20cb7e5SPali Rohár - 20 - LOG_LEVEL_NOTICE (default for DEBUG=0) 82f20cb7e5SPali Rohár - 30 - LOG_LEVEL_WARNING 83f20cb7e5SPali Rohár - 40 - LOG_LEVEL_INFO (default for DEBUG=1) 84f20cb7e5SPali Rohár - 50 - LOG_LEVEL_VERBOSE 85a2847172SGrzegorz Jaszczyk 86a2847172SGrzegorz Jaszczyk- USE_COHERENT_MEM 87a2847172SGrzegorz Jaszczyk 88a2847172SGrzegorz Jaszczyk This flag determines whether to include the coherent memory region in the 89f20cb7e5SPali Rohár BL memory map or not. Enabled by default. 90a2847172SGrzegorz Jaszczyk 91a2847172SGrzegorz Jaszczyk- LLC_ENABLE 92a2847172SGrzegorz Jaszczyk 93a2847172SGrzegorz Jaszczyk Flag defining the LLC (L3) cache state. The cache is enabled by default (``LLC_ENABLE=1``). 94a2847172SGrzegorz Jaszczyk 955a40d70fSKonstantin Porotchkin- LLC_SRAM 965a40d70fSKonstantin Porotchkin 970a977b9bSKonstantin Porotchkin Flag enabling the LLC (L3) cache SRAM support. The LLC SRAM is activated and used 980a977b9bSKonstantin Porotchkin by Trusted OS (OP-TEE OS, BL32). The TF-A only prepares CCU address translation windows 990a977b9bSKonstantin Porotchkin for SRAM address range at BL31 execution stage with window target set to DRAM-0. 1000a977b9bSKonstantin Porotchkin When Trusted OS activates LLC SRAM, the CCU window target is changed to SRAM. 1010a977b9bSKonstantin Porotchkin There is no reason to enable this feature if OP-TEE OS built with CFG_WITH_PAGER=n. 1020a977b9bSKonstantin Porotchkin Only set LLC_SRAM=1 if OP-TEE OS is built with CFG_WITH_PAGER=y. 1035a40d70fSKonstantin Porotchkin 104a2847172SGrzegorz Jaszczyk- MARVELL_SECURE_BOOT 105a2847172SGrzegorz Jaszczyk 106a2847172SGrzegorz Jaszczyk Build trusted(=1)/non trusted(=0) image, default is non trusted. 10792024f81SPali Rohár This parameter is used only for ``mrvl_flash`` and ``mrvl_uart`` targets. 108a2847172SGrzegorz Jaszczyk 109a2847172SGrzegorz Jaszczyk- MV_DDR_PATH 110a2847172SGrzegorz Jaszczyk 111528dafc3SPali Rohár This parameter is required for ``mrvl_flash`` and ``mrvl_uart`` targets. 112de89b282SPali Rohár For A7K/A8K/CN913x it is used for BLE build and for Armada37x0 it used 1132baf5038SPali Rohár for ddr_tool build. 114528dafc3SPali Rohár 1152baf5038SPali Rohár Specify path to the full checkout of Marvell mv-ddr-marvell git 1162baf5038SPali Rohár repository. Checkout must contain also .git subdirectory because 1172baf5038SPali Rohár mv-ddr build process calls git commands. 118a2847172SGrzegorz Jaszczyk 1192baf5038SPali Rohár Do not remove any parts of git checkout becuase build process and other 1202baf5038SPali Rohár applications need them for correct building and version determination. 121494be3eeSPali Rohár 12292024f81SPali Rohár 12392024f81SPali RohárCN913x specific build options: 12492024f81SPali Rohár 125eed02440SKonstantin Porotchkin- CP_NUM 126eed02440SKonstantin Porotchkin 127eed02440SKonstantin Porotchkin Total amount of CPs (South Bridge) connected to AP. When the parameter is omitted, 128eed02440SKonstantin Porotchkin the build uses the default number of CPs, which is a number of embedded CPs inside the 129eed02440SKonstantin Porotchkin package: 1 or 2 depending on the SoC used. The parameter is valid for OcteonTX2 CN913x SoC 130eed02440SKonstantin Porotchkin family (PLAT=t9130), which can have external CPs connected to the MCI ports. Valid 131eed02440SKonstantin Porotchkin values with CP_NUM are in a range of 1 to 3. 132eed02440SKonstantin Porotchkin 13392024f81SPali Rohár 134de89b282SPali RohárA7K/A8K/CN913x specific build options: 13592024f81SPali Rohár 13692024f81SPali Rohár- BLE_PATH 13792024f81SPali Rohár 13892024f81SPali Rohár Points to BLE (Binary ROM extension) sources folder. 13992024f81SPali Rohár The parameter is optional, its default value is ``plat/marvell/armada/a8k/common/ble`` 14092024f81SPali Rohár which uses TF-A in-tree BLE implementation. 14192024f81SPali Rohár 142099c90b8SPali Rohár- MSS_SUPPORT 143099c90b8SPali Rohár 144099c90b8SPali Rohár When ``MSS_SUPPORT=1``, then TF-A includes support for Management SubSystem (MSS). 145099c90b8SPali Rohár When enabled it is required to specify path to the MSS firmware image via ``SCP_BL2`` 146099c90b8SPali Rohár option. 147099c90b8SPali Rohár 148099c90b8SPali Rohár This option is by default enabled. 149099c90b8SPali Rohár 150099c90b8SPali Rohár- SCP_BL2 151099c90b8SPali Rohár 152099c90b8SPali Rohár Specify path to the MSS fimware image binary which will run on Cortex-M3 coprocessor. 153099c90b8SPali Rohár It is available in Marvell binaries-marvell git repository. Required when ``MSS_SUPPORT=1``. 154099c90b8SPali Rohár 1550a6e2147SRobert MarkoGlobalscale MOCHAbin specific build options: 1560a6e2147SRobert Marko 1570a6e2147SRobert Marko- DDR_TOPOLOGY 1580a6e2147SRobert Marko 1590a6e2147SRobert Marko The DDR topology map index/name, default is 0. 1600a6e2147SRobert Marko 1610a6e2147SRobert Marko Supported Options: 1620a6e2147SRobert Marko - 0 - DDR4 1CS 2GB 1630a6e2147SRobert Marko - 1 - DDR4 1CS 4GB 1640a6e2147SRobert Marko - 2 - DDR4 2CS 8GB 16592024f81SPali Rohár 16692024f81SPali RohárArmada37x0 specific build options: 16792024f81SPali Rohár 168*46cc41d5SManish Pandey- HANDLE_EA_EL3_FIRST_NS 1693017e932SPali Rohár 170*46cc41d5SManish Pandey When ``HANDLE_EA_EL3_FIRST_NS=1``, External Aborts and SError Interrupts, resulting from errors 171*46cc41d5SManish Pandey in NS world, will be always trapped in TF-A. TF-A in this case enables dirty hack / workaround for 172*46cc41d5SManish Pandey a bug found in U-Boot and Linux kernel PCIe controller driver pci-aardvark.c, traps and then masks 173*46cc41d5SManish Pandey SError interrupt caused by AXI SLVERR on external access (syndrome 0xbf000002). 1743017e932SPali Rohár 175*46cc41d5SManish Pandey Otherwise when ``HANDLE_EA_EL3_FIRST_NS=0``, these exceptions will be trapped in the current 1763017e932SPali Rohár exception level (or in EL1 if the current exception level is EL0). So exceptions caused by 1773017e932SPali Rohár U-Boot will be trapped in U-Boot, exceptions caused by Linux kernel (or user applications) 1783017e932SPali Rohár will be trapped in Linux kernel. 1793017e932SPali Rohár 1803017e932SPali Rohár Mentioned bug in pci-aardvark.c driver is fixed in U-Boot version v2021.07 and Linux kernel 1813017e932SPali Rohár version v5.13 (workarounded since Linux kernel version 5.9) and also backported in Linux 1823017e932SPali Rohár kernel stable releases since versions v5.12.13, v5.10.46, v5.4.128, v4.19.198, v4.14.240. 1833017e932SPali Rohár 1843017e932SPali Rohár If target system has already patched version of U-Boot and Linux kernel then it is strongly 1853017e932SPali Rohár recommended to not enable this workaround as it disallows propagating of all External Aborts 1863017e932SPali Rohár to running Linux kernel and makes correctable errors as fatal aborts. 1873017e932SPali Rohár 188*46cc41d5SManish Pandey This option is now disabled by default. In past this option has different name "HANDLE_EA_EL3_FIRST" and 189*46cc41d5SManish Pandey was enabled by default in TF-A versions v2.2, v2.3, v2.4 and v2.5. 1903017e932SPali Rohár 19192024f81SPali Rohár- CM3_SYSTEM_RESET 19292024f81SPali Rohár 19392024f81SPali Rohár When ``CM3_SYSTEM_RESET=1``, the Cortex-M3 secure coprocessor will be used for system reset. 19492024f81SPali Rohár 19592024f81SPali Rohár TF-A will send command 0x0009 with a magic value via the rWTM mailbox interface to the 19692024f81SPali Rohár Cortex-M3 secure coprocessor. 19792024f81SPali Rohár The firmware running in the coprocessor must either implement this functionality or 19892024f81SPali Rohár ignore the 0x0009 command (which is true for the firmware from A3700-utils-marvell 19992024f81SPali Rohár repository). If this option is enabled but the firmware does not support this command, 20092024f81SPali Rohár an error message will be printed prior trying to reboot via the usual way. 20192024f81SPali Rohár 20292024f81SPali Rohár This option is needed on Turris MOX as a workaround to a HW bug which causes reset to 20392024f81SPali Rohár sometime hang the board. 20492024f81SPali Rohár 20592024f81SPali Rohár- A3720_DB_PM_WAKEUP_SRC 20692024f81SPali Rohár 20792024f81SPali Rohár For Armada 3720 Development Board only, when ``A3720_DB_PM_WAKEUP_SRC=1``, 20892024f81SPali Rohár TF-A will setup PM wake up src configuration. This option is disabled by default. 20992024f81SPali Rohár 21092024f81SPali Rohár 21192024f81SPali RohárArmada37x0 specific build options for ``mrvl_flash`` and ``mrvl_uart`` targets: 21292024f81SPali Rohár 213a2847172SGrzegorz Jaszczyk- DDR_TOPOLOGY 214a2847172SGrzegorz Jaszczyk 21592024f81SPali Rohár The DDR topology map index/name, default is 0. 216a2847172SGrzegorz Jaszczyk 217a2847172SGrzegorz Jaszczyk Supported Options: 2189c3fffdcSPali Rohár - 0 - DDR3 1CS 512MB (DB-88F3720-DDR3-Modular, EspressoBin V3-V5) 2199c3fffdcSPali Rohár - 1 - DDR4 1CS 512MB (DB-88F3720-DDR4-Modular) 2209c3fffdcSPali Rohár - 2 - DDR3 2CS 1GB (EspressoBin V3-V5) 2219c3fffdcSPali Rohár - 3 - DDR4 2CS 4GB (DB-88F3720-DDR4-Modular) 2229c3fffdcSPali Rohár - 4 - DDR3 1CS 1GB (DB-88F3720-DDR3-Modular, EspressoBin V3-V5) 2239c3fffdcSPali Rohár - 5 - DDR4 1CS 1GB (EspressoBin V7, EspressoBin-Ultra) 2249c3fffdcSPali Rohár - 6 - DDR4 2CS 2GB (EspressoBin V7) 2259c3fffdcSPali Rohár - 7 - DDR3 2CS 2GB (EspressoBin V3-V5) 2269c3fffdcSPali Rohár - CUST - CUSTOMER BOARD (Customer board settings) 227a2847172SGrzegorz Jaszczyk 228a2847172SGrzegorz Jaszczyk- CLOCKSPRESET 229a2847172SGrzegorz Jaszczyk 23092024f81SPali Rohár The clock tree configuration preset including CPU and DDR frequency, 231a2847172SGrzegorz Jaszczyk default is CPU_800_DDR_800. 232a2847172SGrzegorz Jaszczyk 233a2847172SGrzegorz Jaszczyk - CPU_600_DDR_600 - CPU at 600 MHz, DDR at 600 MHz 234a2847172SGrzegorz Jaszczyk - CPU_800_DDR_800 - CPU at 800 MHz, DDR at 800 MHz 235a2847172SGrzegorz Jaszczyk - CPU_1000_DDR_800 - CPU at 1000 MHz, DDR at 800 MHz 236a2847172SGrzegorz Jaszczyk - CPU_1200_DDR_750 - CPU at 1200 MHz, DDR at 750 MHz 237a2847172SGrzegorz Jaszczyk 23823abf07cSPali Rohár Look at Armada37x0 chip package marking on board to identify correct CPU frequency. 23923abf07cSPali Rohár The last line on package marking (next line after the 88F37x0 line) should contain: 24023abf07cSPali Rohár 24123abf07cSPali Rohár - C080 or I080 - chip with 800 MHz CPU - use ``CLOCKSPRESET=CPU_800_DDR_800`` 24223abf07cSPali Rohár - C100 or I100 - chip with 1000 MHz CPU - use ``CLOCKSPRESET=CPU_1000_DDR_800`` 24323abf07cSPali Rohár - C120 - chip with 1200 MHz CPU - use ``CLOCKSPRESET=CPU_1200_DDR_750`` 24423abf07cSPali Rohár 245a2847172SGrzegorz Jaszczyk- BOOTDEV 246a2847172SGrzegorz Jaszczyk 24792024f81SPali Rohár The flash boot device, default is ``SPINOR``. 248a2847172SGrzegorz Jaszczyk 249a2847172SGrzegorz Jaszczyk Currently, Armada37x0 only supports ``SPINOR``, ``SPINAND``, ``EMMCNORM`` and ``SATA``: 250a2847172SGrzegorz Jaszczyk 251a2847172SGrzegorz Jaszczyk - SPINOR - SPI NOR flash boot 252a2847172SGrzegorz Jaszczyk - SPINAND - SPI NAND flash boot 253a2847172SGrzegorz Jaszczyk - EMMCNORM - eMMC Download Mode 254a2847172SGrzegorz Jaszczyk 255a2847172SGrzegorz Jaszczyk Download boot loader or program code from eMMC flash into CM3 or CA53 256a2847172SGrzegorz Jaszczyk Requires full initialization and command sequence 257a2847172SGrzegorz Jaszczyk 258a2847172SGrzegorz Jaszczyk - SATA - SATA device boot 259a2847172SGrzegorz Jaszczyk 26033af2937SPali Rohár Image needs to be stored at disk LBA 0 or at disk partition with 26133af2937SPali Rohár MBR type 0x4d (ASCII 'M' as in Marvell) or at disk partition with 2622f452974SPali Rohár GPT partition type GUID ``6828311A-BA55-42A4-BCDE-A89BB5EDECAE``. 26333af2937SPali Rohár 264a2847172SGrzegorz Jaszczyk- PARTNUM 265a2847172SGrzegorz Jaszczyk 26692024f81SPali Rohár The boot partition number, default is 0. 267a2847172SGrzegorz Jaszczyk 268a2847172SGrzegorz Jaszczyk To boot from eMMC, the value should be aligned with the parameter in 269a2847172SGrzegorz Jaszczyk U-Boot with name of ``CONFIG_SYS_MMC_ENV_PART``, whose value by default is 270a2847172SGrzegorz Jaszczyk 1. For details about CONFIG_SYS_MMC_ENV_PART, please refer to the U-Boot 271a2847172SGrzegorz Jaszczyk build instructions. 272a2847172SGrzegorz Jaszczyk 273a2847172SGrzegorz Jaszczyk- WTMI_IMG 274a2847172SGrzegorz Jaszczyk 27592024f81SPali Rohár The path of the binary can point to an image which 276a2847172SGrzegorz Jaszczyk does nothing, an image which supports EFUSE or a customized CM3 firmware 277711a6bb7SPali Rohár binary. The default image is ``fuse.bin`` that built from sources in WTP 278a2847172SGrzegorz Jaszczyk folder, which is the next option. If the default image is OK, then this 279a2847172SGrzegorz Jaszczyk option should be skipped. 280a2847172SGrzegorz Jaszczyk 281711a6bb7SPali Rohár Please note that this is not a full WTMI image, just a main loop without 282711a6bb7SPali Rohár hardware initialization code. Final WTMI image is built from this WTMI_IMG 283711a6bb7SPali Rohár binary and sys-init code from the WTP directory which sets DDR and CPU 284711a6bb7SPali Rohár clocks according to DDR_TOPOLOGY and CLOCKSPRESET options. 285711a6bb7SPali Rohár 2864fe571b8SPali Rohár CZ.NIC as part of Turris project released free and open source WTMI 2874fe571b8SPali Rohár application firmware ``wtmi_app.bin`` for all Armada 3720 devices. 2884fe571b8SPali Rohár This firmware includes additional features like access to Hardware 2894fe571b8SPali Rohár Random Number Generator of Armada 3720 SoC which original Marvell's 2904fe571b8SPali Rohár ``fuse.bin`` image does not have. 2914fe571b8SPali Rohár 2924fe571b8SPali Rohár CZ.NIC's Armada 3720 Secure Firmware is available at website: 2934fe571b8SPali Rohár 2944fe571b8SPali Rohár https://gitlab.nic.cz/turris/mox-boot-builder/ 2954fe571b8SPali Rohár 296a2847172SGrzegorz Jaszczyk- WTP 297a2847172SGrzegorz Jaszczyk 2982baf5038SPali Rohár Specify path to the full checkout of Marvell A3700-utils-marvell git 2992baf5038SPali Rohár repository. Checkout must contain also .git subdirectory because WTP 3002baf5038SPali Rohár build process calls git commands. 3012baf5038SPali Rohár 3022baf5038SPali Rohár WTP build process uses also Marvell mv-ddr-marvell git repository 3032baf5038SPali Rohár specified in MV_DDR_PATH option. 3042baf5038SPali Rohár 3052baf5038SPali Rohár Do not remove any parts of git checkout becuase build process and other 3062baf5038SPali Rohár applications need them for correct building and version determination. 307494be3eeSPali Rohár 308f20cb7e5SPali Rohár- CRYPTOPP_PATH 309f20cb7e5SPali Rohár 31092024f81SPali Rohár Use this parameter to point to Crypto++ source code 3118708a884SPali Rohár directory. If this option is specified then Crypto++ source code in 3128708a884SPali Rohár CRYPTOPP_PATH directory will be automatically compiled. Crypto++ library 3138708a884SPali Rohár is required for building WTP image tool. Either CRYPTOPP_PATH or 3148708a884SPali Rohár CRYPTOPP_LIBDIR with CRYPTOPP_INCDIR needs to be specified for Armada37x0. 3158708a884SPali Rohár 3168708a884SPali Rohár- CRYPTOPP_LIBDIR 3178708a884SPali Rohár 31892024f81SPali Rohár Use this parameter to point to the directory with 3198708a884SPali Rohár compiled Crypto++ library. By default it points to the CRYPTOPP_PATH. 3208708a884SPali Rohár 32127bc2936SPali Rohár On Debian systems it is possible to install system-wide Crypto++ library 32227bc2936SPali Rohár via command ``apt install libcrypto++-dev`` and specify CRYPTOPP_LIBDIR 32327bc2936SPali Rohár to ``/usr/lib/``. 32427bc2936SPali Rohár 3258708a884SPali Rohár- CRYPTOPP_INCDIR 3268708a884SPali Rohár 32792024f81SPali Rohár Use this parameter to point to the directory with 3288708a884SPali Rohár header files of Crypto++ library. By default it points to the CRYPTOPP_PATH. 329f20cb7e5SPali Rohár 33027bc2936SPali Rohár On Debian systems it is possible to install system-wide Crypto++ library 33127bc2936SPali Rohár via command ``apt install libcrypto++-dev`` and specify CRYPTOPP_INCDIR 33227bc2936SPali Rohár to ``/usr/include/crypto++/``. 33327bc2936SPali Rohár 334f20cb7e5SPali Rohár 335a2847172SGrzegorz JaszczykFor example, in order to build the image in debug mode with log level up to 'notice' level run 336a2847172SGrzegorz Jaszczyk 337a2847172SGrzegorz Jaszczyk.. code:: shell 338a2847172SGrzegorz Jaszczyk 339f20cb7e5SPali Rohár > make DEBUG=1 USE_COHERENT_MEM=0 LOG_LEVEL=20 PLAT=<MARVELL_PLATFORM> mrvl_flash 340a2847172SGrzegorz Jaszczyk 341a2847172SGrzegorz JaszczykAnd if we want to build a Armada37x0 image in debug mode with log level up to 'notice' level, 342a2847172SGrzegorz Jaszczykthe image has the preset CPU at 1000 MHz, preset DDR3 at 800 MHz, the DDR topology of DDR4 2CS, 343a2847172SGrzegorz Jaszczykthe image boot from SPI NOR flash partition 0, and the image is non trusted in WTP, the command 344a2847172SGrzegorz Jaszczykline is as following 345a2847172SGrzegorz Jaszczyk 346a2847172SGrzegorz Jaszczyk.. code:: shell 347a2847172SGrzegorz Jaszczyk 348a2847172SGrzegorz Jaszczyk > make DEBUG=1 USE_COHERENT_MEM=0 LOG_LEVEL=20 CLOCKSPRESET=CPU_1000_DDR_800 \ 349f20cb7e5SPali Rohár MARVELL_SECURE_BOOT=0 DDR_TOPOLOGY=3 BOOTDEV=SPINOR PARTNUM=0 PLAT=a3700 \ 350f20cb7e5SPali Rohár MV_DDR_PATH=/path/to/mv-ddr-marvell/ WTP=/path/to/A3700-utils-marvell/ \ 351f20cb7e5SPali Rohár CRYPTOPP_PATH=/path/to/cryptopp/ BL33=/path/to/u-boot.bin \ 3528b920973SPali Rohár all fip mrvl_bootimage mrvl_flash mrvl_uart 353f20cb7e5SPali Rohár 354f20cb7e5SPali RohárTo build just TF-A without WTMI image (useful for A3720 Turris MOX board), run following command: 355f20cb7e5SPali Rohár 356f20cb7e5SPali Rohár.. code:: shell 357f20cb7e5SPali Rohár 358d9243f26SMarek Behún > make USE_COHERENT_MEM=0 PLAT=a3700 CM3_SYSTEM_RESET=1 BL33=/path/to/u-boot.bin \ 359d9243f26SMarek Behún CROSS_COMPILE=aarch64-linux-gnu- mrvl_bootimage 360a2847172SGrzegorz Jaszczyk 361ff46a41dSPali RohárHere is full example how to build production release of Marvell firmware image (concatenated 3624fe571b8SPali Rohárbinary of Marvell's A3720 sys-init, CZ.NIC's Armada 3720 Secure Firmware, TF-A and U-Boot) for 3634fe571b8SPali RohárEspressoBin board (PLAT=a3700) with 1GHz CPU (CLOCKSPRESET=CPU_1000_DDR_800) and 3644fe571b8SPali Rohár1GB DDR4 RAM (DDR_TOPOLOGY=5): 365d0b367b7SLuka Kovacic 366d0b367b7SLuka Kovacic.. code:: shell 367d0b367b7SLuka Kovacic 3684fe571b8SPali Rohár > git clone https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git 3694fe571b8SPali Rohár > git clone https://source.denx.de/u-boot/u-boot.git 370ff46a41dSPali Rohár > git clone https://github.com/weidai11/cryptopp.git 3714fe571b8SPali Rohár > git clone https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git 3724fe571b8SPali Rohár > git clone https://github.com/MarvellEmbeddedProcessors/A3700-utils-marvell.git 3734fe571b8SPali Rohár > git clone https://gitlab.nic.cz/turris/mox-boot-builder.git 374ff46a41dSPali Rohár > make -C u-boot CROSS_COMPILE=aarch64-linux-gnu- mvebu_espressobin-88f3720_defconfig u-boot.bin 3754fe571b8SPali Rohár > make -C mox-boot-builder CROSS_CM3=arm-linux-gnueabi- wtmi_app.bin 376ff46a41dSPali Rohár > make -C trusted-firmware-a CROSS_COMPILE=aarch64-linux-gnu- CROSS_CM3=arm-linux-gnueabi- \ 377ff46a41dSPali Rohár USE_COHERENT_MEM=0 PLAT=a3700 CLOCKSPRESET=CPU_1000_DDR_800 DDR_TOPOLOGY=5 \ 3784fe571b8SPali Rohár MV_DDR_PATH=$PWD/mv-ddr-marvell/ WTP=$PWD/A3700-utils-marvell/ \ 3794fe571b8SPali Rohár CRYPTOPP_PATH=$PWD/cryptopp/ BL33=$PWD/u-boot/u-boot.bin \ 3804fe571b8SPali Rohár WTMI_IMG=$PWD/mox-boot-builder/wtmi_app.bin FIP_ALIGN=0x100 mrvl_flash 381d0b367b7SLuka Kovacic 382ff46a41dSPali RohárProduced Marvell firmware flash image: ``trusted-firmware-a/build/a3700/release/flash-image.bin`` 383a2847172SGrzegorz Jaszczyk 384a2847172SGrzegorz JaszczykSpecial Build Flags 385a2847172SGrzegorz Jaszczyk-------------------- 386a2847172SGrzegorz Jaszczyk 387a2847172SGrzegorz Jaszczyk- PLAT_RECOVERY_IMAGE_ENABLE 388a2847172SGrzegorz Jaszczyk When set this option to enable secondary recovery function when build atf. 389a2847172SGrzegorz Jaszczyk In order to build UART recovery image this operation should be disabled for 390de89b282SPali Rohár A7K/A8K/CN913x because of hardware limitation (boot from secondary image 391a2847172SGrzegorz Jaszczyk can interrupt UART recovery process). This MACRO definition is set in 392a2847172SGrzegorz Jaszczyk ``plat/marvell/armada/a8k/common/include/platform_def.h`` file. 393a2847172SGrzegorz Jaszczyk 39457adbf37SAlex Leibovich- DDR32 39557adbf37SAlex Leibovich In order to work in 32bit DDR, instead of the default 64bit ECC DDR, 39657adbf37SAlex Leibovich this flag should be set to 1. 39757adbf37SAlex Leibovich 398a2847172SGrzegorz JaszczykFor more information about build options, please refer to the 399a2847172SGrzegorz Jaszczyk:ref:`Build Options` document. 400a2847172SGrzegorz Jaszczyk 401a2847172SGrzegorz Jaszczyk 402a2847172SGrzegorz JaszczykBuild output 403a2847172SGrzegorz Jaszczyk------------ 404f20cb7e5SPali RohárMarvell's TF-A compilation generates 8 files: 405a2847172SGrzegorz Jaszczyk 406f60f1e84SPali Rohár - ble.bin - BLe image (not available for Armada37x0) 407a2847172SGrzegorz Jaszczyk - bl1.bin - BL1 image 408a2847172SGrzegorz Jaszczyk - bl2.bin - BL2 image 409a2847172SGrzegorz Jaszczyk - bl31.bin - BL31 image 410a2847172SGrzegorz Jaszczyk - fip.bin - FIP image (contains BL2, BL31 & BL33 (U-Boot) images) 411a2847172SGrzegorz Jaszczyk - boot-image.bin - TF-A image (contains BL1 and FIP images) 412f60f1e84SPali Rohár - flash-image.bin - Flashable Marvell firmware image. For Armada37x0 it 413f60f1e84SPali Rohár contains TIM, WTMI and boot-image.bin images. For other platforms it contains 414f60f1e84SPali Rohár BLe and boot-image.bin images. Should be placed on the boot flash/device. 415f20cb7e5SPali Rohár - uart-images.tgz.bin - GZIPed TAR archive which contains Armada37x0 images 416f20cb7e5SPali Rohár for booting via UART. Could be loaded via Marvell's WtpDownload tool from 417f20cb7e5SPali Rohár A3700-utils-marvell repository. 418f20cb7e5SPali Rohár 4198b920973SPali RohárAdditional make target ``mrvl_bootimage`` produce ``boot-image.bin`` file. Target 4208b920973SPali Rohár``mrvl_flash`` produce final ``flash-image.bin`` file and target ``mrvl_uart`` 4218b920973SPali Rohárproduce ``uart-images.tgz.bin`` file. 422a2847172SGrzegorz Jaszczyk 423a2847172SGrzegorz Jaszczyk 424a2847172SGrzegorz JaszczykTools and external components installation 425a2847172SGrzegorz Jaszczyk------------------------------------------ 426a2847172SGrzegorz Jaszczyk 42792024f81SPali RohárArmada37x0 Builds require installation of additional components 42892024f81SPali Rohár~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 429a2847172SGrzegorz Jaszczyk 430a2847172SGrzegorz Jaszczyk(1) ARM cross compiler capable of building images for the service CPU (CM3). 431a2847172SGrzegorz Jaszczyk This component is usually included in the Linux host packages. 432a2847172SGrzegorz Jaszczyk On Debian/Ubuntu hosts the default GNU ARM tool chain can be installed 433a2847172SGrzegorz Jaszczyk using the following command 434a2847172SGrzegorz Jaszczyk 435a2847172SGrzegorz Jaszczyk .. code:: shell 436a2847172SGrzegorz Jaszczyk 437a2847172SGrzegorz Jaszczyk > sudo apt-get install gcc-arm-linux-gnueabi 438a2847172SGrzegorz Jaszczyk 439a2847172SGrzegorz Jaszczyk Only if required, the default tool chain prefix ``arm-linux-gnueabi-`` can be 440a2847172SGrzegorz Jaszczyk overwritten using the environment variable ``CROSS_CM3``. 441a2847172SGrzegorz Jaszczyk Example for BASH shell 442a2847172SGrzegorz Jaszczyk 443a2847172SGrzegorz Jaszczyk .. code:: shell 444a2847172SGrzegorz Jaszczyk 445a2847172SGrzegorz Jaszczyk > export CROSS_CM3=/opt/arm-cross/bin/arm-linux-gnueabi 446a2847172SGrzegorz Jaszczyk 447a2847172SGrzegorz Jaszczyk(2) DDR initialization library sources (mv_ddr) available at the following repository 4481cea0213SPali Rohár (use the "master" branch): 449a2847172SGrzegorz Jaszczyk 450a2847172SGrzegorz Jaszczyk https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git 451a2847172SGrzegorz Jaszczyk 452583079aeSPali Rohár(3) Armada3700 tools available at the following repository 4531cea0213SPali Rohár (use the "master" branch): 454a2847172SGrzegorz Jaszczyk 455a2847172SGrzegorz Jaszczyk https://github.com/MarvellEmbeddedProcessors/A3700-utils-marvell.git 456a2847172SGrzegorz Jaszczyk 457f20cb7e5SPali Rohár(4) Crypto++ library available at the following repository: 458f20cb7e5SPali Rohár 459f20cb7e5SPali Rohár https://github.com/weidai11/cryptopp.git 460f20cb7e5SPali Rohár 46192024f81SPali Rohár(5) Optional CZ.NIC's Armada 3720 Secure Firmware: 46292024f81SPali Rohár 46392024f81SPali Rohár https://gitlab.nic.cz/turris/mox-boot-builder.git 46492024f81SPali Rohár 465099c90b8SPali RohárArmada70x0, Armada80x0 and CN913x Builds require installation of additional components 466099c90b8SPali Rohár~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 467a2847172SGrzegorz Jaszczyk 468a2847172SGrzegorz Jaszczyk(1) DDR initialization library sources (mv_ddr) available at the following repository 4691cea0213SPali Rohár (use the "master" branch): 470a2847172SGrzegorz Jaszczyk 471a2847172SGrzegorz Jaszczyk https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git 472099c90b8SPali Rohár 473099c90b8SPali Rohár(2) MSS Management SubSystem Firmware available at the following repository 474099c90b8SPali Rohár (use the "binaries-marvell-armada-SDK10.0.1.0" branch): 475099c90b8SPali Rohár 476099c90b8SPali Rohár https://github.com/MarvellEmbeddedProcessors/binaries-marvell.git 477