History log of /rk3399_ARM-atf/docs/plat/arm/fvp/fvp-build-options.rst (Results 1 – 10 of 10)
Revision Date Author Comments
# 7924b69f 03-Sep-2025 Manish Pandey <manish.pandey2@arm.com>

Merge "feat(arm): unify Linux kernel as BL33 handling" into integration


# 2f5fd826 08-Oct-2024 Harrison Mutai <harrison.mutai@arm.com>

feat(arm): unify Linux kernel as BL33 handling

Streamlines and unifies how Arm platforms pass arguments to the Linux
kernel when it is loaded as BL33. It replaces the FVP specific macro
`FVP_HW_CONF

feat(arm): unify Linux kernel as BL33 handling

Streamlines and unifies how Arm platforms pass arguments to the Linux
kernel when it is loaded as BL33. It replaces the FVP specific macro
`FVP_HW_CONFIG_ADDR` with a common macro `ARM_HW_CONFIG_ADDR` for
accessing the device tree blob base address.

For FVP the DT address is set to use `ARM_PRELOADED_DTB_BASE` if
provided, falling back to a default address otherwise.

This provides a consistent mechanism for Arm platforms to define and
override the DTB base address used during kernel handoff. It reduces the
chance of misconfiguration, and simplifies platform integration.

Change-Id: Ib668dbb1de9d42cf41c0b0ee9a316f054891752a
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>

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# d154fe2b 13-Jun-2025 Manish Pandey <manish.pandey2@arm.com>

Merge changes I2af839ae,Ifd0c7b4e,I56763cb4,I93aec580,Icbd43503, ... into integration

* changes:
docs(fvp): add GICv5 build instructions and limitations
feat(fvp): add GICv5 support
feat(gicv5

Merge changes I2af839ae,Ifd0c7b4e,I56763cb4,I93aec580,Icbd43503, ... into integration

* changes:
docs(fvp): add GICv5 build instructions and limitations
feat(fvp): add GICv5 support
feat(gicv5): probe components
feat(gicv5): initialise the IWB
feat(gicv5): initialise the IRS
feat(gicv5): assign interrupt sources to appropriate security states
feat(gicv5): add a barebones GICv5 driver
feat(gicv5): add support for building with gicv5

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# e2e90fa1 13-Feb-2025 Boyan Karatotev <boyan.karatotev@arm.com>

feat(fvp): add GICv5 support

Factors out GICv3 specific code and replace it with GICv5. This can be
selected with FVP_USE_GIC_DRIVER=FVP_GICV5. Specifically, the FCONF
logic does not apply to GICv5

feat(fvp): add GICv5 support

Factors out GICv3 specific code and replace it with GICv5. This can be
selected with FVP_USE_GIC_DRIVER=FVP_GICV5. Specifically, the FCONF
logic does not apply to GICv5 as the bindings are completely different.

This patch does not include a device tree. This will be added at a later
date.

Change-Id: Ifd0c7b4e0bc2ea1e53a6779ab4c50c4aec39dafb
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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# e0c1fbbb 09-Jun-2025 Manish V Badarkhe <manish.badarkhe@arm.com>

Merge changes If4cd4e71,I0b5158ef into integration

* changes:
docs(fvp): add FVP_HW_CONFIG_ADDR documentation
feat(fvp): add FVP_HW_CONFIG_ADDR make variable


# 8ab34911 01-May-2025 Emily Boarer <emily.boarer@arm.com>

docs(fvp): add FVP_HW_CONFIG_ADDR documentation

Add documentation to describe FVP_HW_CONFIG_ADDR, its default, and its
intended use.

Change-Id: If4cd4e712aa914fee1aeab2fa9fbe682f180b956
Signed-off-

docs(fvp): add FVP_HW_CONFIG_ADDR documentation

Add documentation to describe FVP_HW_CONFIG_ADDR, its default, and its
intended use.

Change-Id: If4cd4e712aa914fee1aeab2fa9fbe682f180b956
Signed-off-by: emily.boarer@arm.com

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# 183f2ea2 04-Mar-2025 Manish Pandey <manish.pandey2@arm.com>

Merge changes I0396b597,I326f920f,I0437eec8,Ieadf01fc,I4e1d8c24, ... into integration

* changes:
feat(fvp): set defaults for build commandline
docs(arm): enable Linux boot from fip as BL33
fea

Merge changes I0396b597,I326f920f,I0437eec8,Ieadf01fc,I4e1d8c24, ... into integration

* changes:
feat(fvp): set defaults for build commandline
docs(arm): enable Linux boot from fip as BL33
feat(arm): enable Linux boot from fip as BL33
docs(fvp): update fvp build time options
docs(arm): add initrd props to dtb at build time
feat(arm): add initrd props to dtb at build time

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# 0d49a415 18-Dec-2024 Salman Nabi <salman.nabi@arm.com>

docs(fvp): update fvp build time options

Add new fvp specific build time options. Specifically the below:

- INITRD_SIZE
- INITRD_PATH
- INITRD_BASE

Change-Id: Ieadf01fce7a0a0a8e9e7582d7b7e371b2472

docs(fvp): update fvp build time options

Add new fvp specific build time options. Specifically the below:

- INITRD_SIZE
- INITRD_PATH
- INITRD_BASE

Change-Id: Ieadf01fce7a0a0a8e9e7582d7b7e371b247207c2
Signed-off-by: Salman Nabi <salman.nabi@arm.com>

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# 7d009327 07-May-2024 Manish V Badarkhe <manish.badarkhe@arm.com>

Merge "docs(fvp): restructure FVP platform documentation" into integration


# c5407693 23-Jan-2024 Sandrine Bailleux <sandrine.bailleux@arm.com>

docs(fvp): restructure FVP platform documentation

The Arm FVP documentation has grown organically over the years. As a
result, it has become a big document, which can be difficult to digest.

Also,

docs(fvp): restructure FVP platform documentation

The Arm FVP documentation has grown organically over the years. As a
result, it has become a big document, which can be difficult to digest.

Also, the organization of some of the sections does not make sense. In
particular, all "Running on the ... FVP" sections live under a section
named "Booting a preloaded kernel image (Base FVP)". To illustrate this,
here is the current table of contents:

Arm Fixed Virtual Platforms (FVP)
Fixed Virtual Platform (FVP) Support
Arm FVP Platform Specific Build Options
Booting Firmware Update images
Booting an EL3 payload
Booting a preloaded kernel image (Base FVP)
Obtaining the Flattened Device Treesp
Running on the Foundation FVP with reset to BL1 entrypoint
Running on the AEMv8 Base FVP with reset to BL1 entrypoint
Running on the AEMv8 Base FVP (AArch32) with reset to BL1 entrypoint
Running on the Cortex-A57-A53 Base FVP with reset to BL1 entrypoint
Running on the Cortex-A32 Base FVP (AArch32) with reset to BL1 entrypoint
Running on the AEMv8 Base FVP with reset to BL31 entrypoint
Running on the AEMv8 Base FVP (AArch32) with reset to SP_MIN entrypoint
Running on the Cortex-A57-A53 Base FVP with reset to BL31 entrypoint
Running on the Cortex-A32 Base FVP (AArch32) with reset to SP_MIN entrypoint

This patch breaks down this document in sub-documents, which are now
included from the index file. The table of contents (ToC) reflects the
new documents hierarchy. The depth of the ToC has been reduced to
simplify the index page. Here is what it looks like now:

Arm Fixed Virtual Platforms (FVP)
Fixed Virtual Platform (FVP) Support
Arm FVP Platform Specific Build Options
Running on the Foundation FVP
Running on the AEMv8 Base FVP
Running on the Cortex-A57-A53 Base FVP
Running on the Cortex-A32 Base FVP (AArch32)
Booting Firmware Update images
Booting an EL3 payload
Booting a preloaded kernel image (Base FVP)

Apart from moving information around in separate files, this patch also
makes the following minor changes to the contents:

- Add a brief introduction about FVPs in the index page.
- Change some of the titles names for conciseness.

Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
Change-Id: Icb650e0ec2c7a86ccd6e7eea4e16a84c41442c96

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