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/rk3399_ARM-atf/plat/mediatek/mt8183/drivers/emi_mpu/
H A Demi_mpu.c25 unsigned long start, unsigned long end, in emi_mpu_set_region_protection() argument
31 if (end <= start) { in emi_mpu_set_region_protection()
38 start = EMI_PHY_OFFSET & 0xffff; in emi_mpu_set_region_protection()
42 start = start - EMI_PHY_OFFSET; in emi_mpu_set_region_protection()
47 start = start >> 16; in emi_mpu_set_region_protection()
53 mmio_write_32(EMI_MPU_SA0, start); in emi_mpu_set_region_protection()
60 mmio_write_32(EMI_MPU_SA1, start); in emi_mpu_set_region_protection()
67 mmio_write_32(EMI_MPU_SA2, start); in emi_mpu_set_region_protection()
74 mmio_write_32(EMI_MPU_SA3, start); in emi_mpu_set_region_protection()
81 mmio_write_32(EMI_MPU_SA4, start); in emi_mpu_set_region_protection()
[all …]
/rk3399_ARM-atf/plat/mediatek/mt8186/drivers/emi_mpu/
H A Demi_mpu.c21 static int _emi_mpu_set_protection(unsigned int start, unsigned int end, in _emi_mpu_set_protection() argument
27 region = (start >> 24) & 0xFF; in _emi_mpu_set_protection()
28 start &= EMI_MPU_START_MASK; in _emi_mpu_set_protection()
52 if ((start >= DRAM_OFFSET) && (end >= start)) { in _emi_mpu_set_protection()
53 start -= DRAM_OFFSET; in _emi_mpu_set_protection()
60 mmio_write_32(EMI_MPU_SA(region), start); in _emi_mpu_set_protection()
65 mmio_write_32(SUB_EMI_MPU_SA(region), start); in _emi_mpu_set_protection()
74 unsigned int start, end; in emi_mpu_set_protection() local
82 start = (unsigned int)(region_info->start >> EMI_MPU_ALIGN_BITS) | in emi_mpu_set_protection()
88 if (_emi_mpu_set_protection(start, end, region_info->apc[i]) < 0) { in emi_mpu_set_protection()
[all …]
/rk3399_ARM-atf/plat/mediatek/mt8192/drivers/emi_mpu/
H A Demi_mpu.c19 unsigned long start, unsigned long end, in _emi_mpu_set_protection() argument
25 region = (start >> 24) & 0xFF; in _emi_mpu_set_protection()
26 start &= 0x00FFFFFF; in _emi_mpu_set_protection()
37 if ((start >= DRAM_OFFSET) && (end >= start)) { in _emi_mpu_set_protection()
38 start -= DRAM_OFFSET; in _emi_mpu_set_protection()
42 start, end); in _emi_mpu_set_protection()
46 mmio_write_32(EMI_MPU_SA(region), start); in _emi_mpu_set_protection()
74 unsigned long start, end; in emi_mpu_set_protection() local
80 start = (unsigned long)(region_info->start >> EMI_MPU_ALIGN_BITS) | in emi_mpu_set_protection()
86 _emi_mpu_set_protection(start, end, region_info->apc[i]); in emi_mpu_set_protection()
[all …]
/rk3399_ARM-atf/plat/mediatek/mt8195/drivers/emi_mpu/
H A Demi_mpu.c23 static int _emi_mpu_set_protection(unsigned int start, unsigned int end, in _emi_mpu_set_protection() argument
29 region = (start >> 24) & 0xFF; in _emi_mpu_set_protection()
30 start &= EMI_MPU_START_MASK; in _emi_mpu_set_protection()
54 if ((start >= DRAM_OFFSET) && (end >= start)) { in _emi_mpu_set_protection()
55 start -= DRAM_OFFSET; in _emi_mpu_set_protection()
62 mmio_write_32(EMI_MPU_SA(region), start); in _emi_mpu_set_protection()
67 mmio_write_32(SUB_EMI_MPU_SA(region), start); in _emi_mpu_set_protection()
76 unsigned int start, end; in emi_mpu_set_protection() local
84 start = (unsigned int)(region_info->start >> EMI_MPU_ALIGN_BITS) | in emi_mpu_set_protection()
90 _emi_mpu_set_protection(start, end, region_info->apc[i]); in emi_mpu_set_protection()
[all …]
/rk3399_ARM-atf/plat/mediatek/drivers/emi_mpu/
H A Demi_mpu_common.c25 static int _emi_mpu_set_protection(unsigned int start, unsigned int end, in _emi_mpu_set_protection() argument
31 region = (start >> 24) & 0xFF; in _emi_mpu_set_protection()
32 start &= EMI_MPU_START_MASK; in _emi_mpu_set_protection()
56 if ((start >= DRAM_OFFSET) && (end >= start)) { in _emi_mpu_set_protection()
57 start -= DRAM_OFFSET; in _emi_mpu_set_protection()
64 mmio_write_32(EMI_MPU_SA(region), start); in _emi_mpu_set_protection()
69 mmio_write_32(SUB_EMI_MPU_SA(region), start); in _emi_mpu_set_protection()
138 unsigned int start, end; in emi_mpu_set_protection() local
146 start = (unsigned int)(region_info->start >> EMI_MPU_ALIGN_BITS) | in emi_mpu_set_protection()
152 if (_emi_mpu_set_protection(start, end, region_info->apc[i]) < 0) { in emi_mpu_set_protection()
[all …]
/rk3399_ARM-atf/lib/extensions/ras/
H A Dras_common.c106 struct ras_interrupt *start = ras_interrupt_mappings.intrs; in assert_interrupts_sorted() local
111 last = start[0].intr_number; in assert_interrupts_sorted()
113 assert(start[i].intr_number > last); in assert_interrupts_sorted()
114 last = start[i].intr_number; in assert_interrupts_sorted()
129 int start, end, mid, ret __unused; in ras_interrupt_handler() local
141 start = 0; in ras_interrupt_handler()
143 while (start <= end) { in ras_interrupt_handler()
144 mid = ((end + start) / 2); in ras_interrupt_handler()
153 start = mid + 1; in ras_interrupt_handler()
/rk3399_ARM-atf/tools/memory/src/memory/
H A Dimage.py16 start: Optional[int] = None variable in Region
29 if self.start is None:
35 return self.start + self.length
44 if self.start is None:
47 return self.end - self.start
H A Dprinter.py101 val.start if val.start is not None else "?",
116 start: int = 12,
120 col_width = (self.term_size - start) // len(modules)
126 " " * start + "".join(self.format_args(*modules, fmt=f"^{col_width}"))
141 leading = f"{addr:{num_fmt}}" + " " if addr != last_addr else " " * start
181 node.start,
/rk3399_ARM-atf/lib/coreboot/
H A Dcoreboot_table.c94 coreboot_memory_t coreboot_get_memory_type(uintptr_t start, size_t size) in coreboot_get_memory_type() argument
103 if ((start >= range->start) && in coreboot_get_memory_type()
104 (start - range->start < range->size) && in coreboot_get_memory_type()
105 (size <= range->size - (start - range->start))) { in coreboot_get_memory_type()
/rk3399_ARM-atf/plat/mediatek/drivers/emi_mpu/mt8188/
H A Demi_mpu.c18 region_info.start = TZRAM_BASE; in set_emi_mpu_regions()
30 region_info.start = BL32_REGION_BASE; in set_emi_mpu_regions()
42 region_info.start = SCP_CORE0_REGION_BASE; in set_emi_mpu_regions()
53 region_info.start = SCP_CORE1_REGION_BASE; in set_emi_mpu_regions()
64 region_info.start = DSP_PROTECT_REGION_BASE; in set_emi_mpu_regions()
75 region_info.start = DRAM_START_ADDR; in set_emi_mpu_regions()
90 region_info.start = (unsigned long long)APUSYS_SEC_BUF_PA; in set_apu_emi_mpu_region()
136 region_info.start = phys_addr; in emi_mpu_optee_handler()
/rk3399_ARM-atf/plat/imx/imx8qx/
H A Dimx8qx_bl31_setup.c200 sc_faddr_t start, end; in imx8_partition_resources() local
249 err = sc_rm_get_memreg_info(ipc_handle, mr, &start, &end); in imx8_partition_resources()
253 NOTICE("Memreg %u 0x%" PRIx64 " -- 0x%" PRIx64 "\n", mr, start, end); in imx8_partition_resources()
254 if (BL31_BASE >= start && (BL31_LIMIT - 1) <= end) { in imx8_partition_resources()
260 err %d\n", start, end, err); in imx8_partition_resources()
266 err = sc_rm_get_memreg_info(ipc_handle, mr_record, &start, &end); in imx8_partition_resources()
280 if (start < (BL31_BASE - 1)) { in imx8_partition_resources()
281 err = sc_rm_memreg_alloc(ipc_handle, &mr, start, BL31_BASE - 1); in imx8_partition_resources()
284 start, (sc_faddr_t)BL31_BASE - 1); in imx8_partition_resources()
288 start, (sc_faddr_t)BL31_BASE - 1); in imx8_partition_resources()
/rk3399_ARM-atf/plat/rockchip/common/
H A Dplat_pm_helpers.c24 #define RGN_LEN(_rgn) (((_rgn)->end - (_rgn)->start) / (_rgn)->stride + 1)
57 __func__, max_len, rgns[0].start, total_len); in alloc_region_mem()
98 for (j = 0, addr = r->start; addr <= r->end; addr += r->stride, j++) in rockchip_reg_rgn_save()
118 for (j = 0, addr = r->start; addr <= r->end; addr += r->stride, j++) in rockchip_reg_rgn_restore()
141 for (addr = r->end; addr >= r->start; addr -= r->stride, j--) in rockchip_reg_rgn_restore_reverse()
211 rockchip_regs_dump(0x0, r->start, r->end, r->stride); in rockchip_dump_reg_rgns()
/rk3399_ARM-atf/lib/utils/
H A Dmem_region.c118 uintptr_t region_start, region_end, start, end; in mem_region_in_array_chk() local
130 start = tbl->base; in mem_region_in_array_chk()
131 end = start + (tbl->nbytes - 1); in mem_region_in_array_chk()
132 if ((region_start >= start) && (region_end <= end)) { in mem_region_in_array_chk()
/rk3399_ARM-atf/drivers/delay_timer/
H A Ddelay_timer.c30 uint32_t start, delta; in udelay() local
35 start = timer_ops->get_timer_value(); in udelay()
55 delta = start - timer_ops->get_timer_value(); in udelay()
/rk3399_ARM-atf/plat/imx/imx8m/
H A Dimx_hab.c66 enum hab_status (*check_target)(enum hab_target type, const void *start, size_t bytes);
67 void* (*authenticate_image)(uint8_t cid, long ivt_offset, void **start,
76 void* (*authenticate_image_no_dcd)(uint8_t cid, long ivt_offset, void **start,
79 enum hab_status (*authenticate_container)(uint8_t cid, long ivt_offset, void **start,
/rk3399_ARM-atf/plat/imx/imx8qm/
H A Dimx8qm_bl31_setup.c179 sc_faddr_t start, end; in mx8_partition_resources() local
263 err = sc_rm_get_memreg_info(ipc_handle, mr, &start, &end); in mx8_partition_resources()
266 NOTICE("Memreg %u 0x%" PRIx64 " -- 0x%" PRIx64 "\n", mr, start, end); in mx8_partition_resources()
267 if (BL31_BASE >= start && (BL31_LIMIT - 1) <= end) { in mx8_partition_resources()
273 err %d\n", start, end, err); in mx8_partition_resources()
279 err = sc_rm_get_memreg_info(ipc_handle, mr_record, &start, &end); in mx8_partition_resources()
293 if (start < (BL31_BASE - 1)) { in mx8_partition_resources()
294 err = sc_rm_memreg_alloc(ipc_handle, &mr, start, BL31_BASE - 1); in mx8_partition_resources()
297 start, (sc_faddr_t)BL31_BASE - 1); in mx8_partition_resources()
301 start, (sc_faddr_t)BL31_BASE - 1); in mx8_partition_resources()
/rk3399_ARM-atf/lib/libfdt/
H A Dfdt_wip.c51 static void fdt_nop_region_(void *start, int len) in fdt_nop_region_() argument
55 for (p = start; (char *)p < ((char *)start + len); p++) in fdt_nop_region_()
/rk3399_ARM-atf/include/lib/
H A Dcoreboot.h25 uint64_t start; member
42 coreboot_memory_t coreboot_get_memory_type(uintptr_t start, size_t size);
/rk3399_ARM-atf/plat/intel/soc/agilex5/soc/
H A Dagilex5_ddr.c136 static inline void ddr_init_inprogress(bool start) in ddr_init_inprogress() argument
138 if (start) { in ddr_init_inprogress()
207 value = ddr_info_set[i].start; in sdram_set_firewall_non_f2sdram()
235 value = ddr_info_set[i].start + ddr_info_set[i].size - 1; in sdram_set_firewall_non_f2sdram()
271 value = ddr_info_set[i].start; in sdram_set_firewall_f2sdram()
289 value = ddr_info_set[i].start + ddr_info_set[i].size - 1; in sdram_set_firewall_f2sdram()
406 ddr_info_set[0].start = DRAM_BASE; in agilex5_ddr_init()
/rk3399_ARM-atf/plat/rockchip/common/include/
H A Dplat_pm_helpers.h22 .start = (_base) + (_start), \
30 uint32_t start; member
/rk3399_ARM-atf/plat/mediatek/drivers/emi/
H A Demi_stub.c29 enum mtk_bl31_status emi_kp_set_protection(size_t start, size_t end, unsigned int region) in emi_kp_set_protection() argument
93 enum mtk_bl31_status emi_mpu_set_protection(uint32_t start, uint32_t end, in emi_mpu_set_protection() argument
/rk3399_ARM-atf/drivers/marvell/
H A Diob.c112 uint64_t start, end; in dump_iob() local
126 start = ((uint64_t)alr << ADDRESS_SHIFT); in dump_iob()
134 end = start + (16 << 20); in dump_iob()
138 start, end); in dump_iob()
/rk3399_ARM-atf/lib/fconf/
H A Dfconf.c59 IMPORT_SYM(struct fconf_populator *, __FCONF_POPULATOR_START__, start); in fconf_populate()
63 for (populator = start; populator != end; populator++) { in fconf_populate()
/rk3399_ARM-atf/include/services/
H A Drmm_el3_token_sign.h19 #define SET_MEMBER(member, start, end) \ argument
22 unsigned char reserved##end[((end) - (start))]; \
/rk3399_ARM-atf/drivers/tpm/
H A Dtpm2_cmds.c

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