| #
95b228fe |
| 28-Aug-2024 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge "feat(mt8188): update SVP region ID protection flow" into integration
|
| #
e66c4ea8 |
| 29-Jul-2024 |
Gavin Liu <gavin.liu@mediatek.com> |
feat(mt8188): update SVP region ID protection flow
- Extend the SVP region number from 1 to 10
- Mapping one region each time
Change-Id: I2dd517127018c71174f3d52a2118463370caf569
Signed-off-by: Gav
feat(mt8188): update SVP region ID protection flow
- Extend the SVP region number from 1 to 10
- Mapping one region each time
Change-Id: I2dd517127018c71174f3d52a2118463370caf569
Signed-off-by: Gavin Liu <gavin.liu@mediatek.com>
show more ...
|
| #
a4ba3cdc |
| 19-Jul-2024 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "fix(mt8188): remove BL32 region protection if SPD sets to none" into integration
|
| #
207c4470 |
| 11-Jul-2024 |
Yidi Lin <yidilin@chromium.org> |
fix(mt8188): remove BL32 region protection if SPD sets to none
When SPD is set to none, it means we don't run any secure OS on the
system. We should make this memory region available to kernel.
Cha
fix(mt8188): remove BL32 region protection if SPD sets to none
When SPD is set to none, it means we don't run any secure OS on the
system. We should make this memory region available to kernel.
Change-Id: Ia83ff4a7d25de38a5d845b7ee1367bafed43bbdd
Signed-off-by: Yidi Lin <yidilin@chromium.org>
show more ...
|
| #
31309da0 |
| 29-May-2024 |
Julius Werner <jwerner@chromium.org> |
Merge "feat(mt8188): update SVP region ID and permission" into integration
|
| #
3e8f9fd8 |
| 27-May-2024 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge "feat(mt8188): update the memory usage for SCP core0 and core1" into integration
|
| #
fc77c69a |
| 21-Feb-2024 |
Haohao Sun <haohao.sun@mediatek.corp-partner.google.com> |
feat(mt8188): update SVP region ID and permission
- Update SVP EMI-MPU region ID from 4 to 5 for resolving
the issue of duplicate region ID used by the DSP.
- For SVP EMI-MPU region, modify domain
feat(mt8188): update SVP region ID and permission
- Update SVP EMI-MPU region ID from 4 to 5 for resolving
the issue of duplicate region ID used by the DSP.
- For SVP EMI-MPU region, modify domain 1 and domain 6 APC from
FORBIDDEN to SEC_RW.
- Correct the calculation for the end address of SVP DRAM region.
- Add region 0 and region 1 for BL31 and BL32 memory protection.
- Add clear region protection API for SVP region.
Change-Id: Iaea348ad9be629e8a81cf579b148c6df66015b42
Signed-off-by: Haohao Sun <haohao.sun@mediatek.corp-partner.google.com>
show more ...
|
| #
83112aa2 |
| 09-May-2024 |
Jason Chen <Jason-ch.Chen@mediatek.com> |
feat(mt8188): update the memory usage for SCP core0 and core1
- Reduce core0 memory usage from 41MB to 8MB.
- Increase core1 memory to 160MB to fulfill user-specific features.
Change-Id: I35547e2ac
feat(mt8188): update the memory usage for SCP core0 and core1
- Reduce core0 memory usage from 41MB to 8MB.
- Increase core1 memory to 160MB to fulfill user-specific features.
Change-Id: I35547e2ac928945c244883d2333f921ce578bbd1
Signed-off-by: Jason Chen <Jason-ch.Chen@mediatek.com>
show more ...
|
| #
47dddbe7 |
| 17-Oct-2023 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge "feat(mt8188): add EMI MPU support for SCP and DSP" into integration
|
| #
013006f1 |
| 06-Jun-2023 |
Jason Chen <jason-ch.chen@mediatek.corp-partner.google.com> |
feat(mt8188): add EMI MPU support for SCP and DSP
1. Allow domain D8 (SCP c0) access to the region 0x50000000~0x528FFFFF.
2. Allow domain D8 (SCP c1) access to the region 0x70000000~0x729FFFFF.
3. A
feat(mt8188): add EMI MPU support for SCP and DSP
1. Allow domain D8 (SCP c0) access to the region 0x50000000~0x528FFFFF.
2. Allow domain D8 (SCP c1) access to the region 0x70000000~0x729FFFFF.
3. Allow domain D4 (DSP) access to the region 0x60000000~0x610FFFFF.
Change-Id: Iea92eebaea4d7dd2968cf51f41d07c2479168e7e
Signed-off-by: Jason Chen <Jason-ch.Chen@mediatek.com>
show more ...
|
| #
9de6b16f |
| 24-Aug-2023 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge "feat(mt8188): add support for SMC from OP-TEE" into integration
|
| #
34d9d619 |
| 01-Aug-2023 |
Dawei Chien <dawei.chien@mediatek.corp-partner.google.com> |
feat(mt8188): add support for SMC from OP-TEE
- Add MTK_SIP_SMC_FROM_S_EL1_TABLE to handle the SMC call from OP-TEE.
- Register optee for EMI MPU.
Change-Id: Ie94542f0e3966c4c25f2b7233b9355d41f8f36
feat(mt8188): add support for SMC from OP-TEE
- Add MTK_SIP_SMC_FROM_S_EL1_TABLE to handle the SMC call from OP-TEE.
- Register optee for EMI MPU.
Change-Id: Ie94542f0e3966c4c25f2b7233b9355d41f8f36a5
Signed-off-by: Dawei Chien <dawei.chien@mediatek.com>
Signed-off-by: Jason Chen <Jason-ch.Chen@mediatek.com>
show more ...
|
| #
4c8e1f9a |
| 06-Jun-2023 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge changes I21d65a88,I949cfce9,If4249f22,Id0451bd1,I9e930070, ... into integration
* changes:
feat(mediatek): add APU watchdog timeout control
feat(mt8188): add emi mpu protection for APU sec
Merge changes I21d65a88,I949cfce9,If4249f22,Id0451bd1,I9e930070, ... into integration
* changes:
feat(mediatek): add APU watchdog timeout control
feat(mt8188): add emi mpu protection for APU secure memory
feat(mt8188): add devapc setting of apusys rcx
feat(mt8188): add backup/restore function when power on/off
feat(mediatek): add APU bootup control smc call
feat(mt8188): enable apusys mailbox mpu protect
feat(mt8188): enable apusys domain remap
feat(mt8188): add apusys ao devapc setting
feat(mt8188): increase TZRAM_SIZE from 192KB to 256KB
show more ...
|
| #
176846a5 |
| 25-Apr-2023 |
Chungying Lu <chungying.lu@mediatek.corp-partner.google.com> |
feat(mt8188): add emi mpu protection for APU secure memory
Add emi mpu protection of APU secure memory.
Change-Id: I949cfce97565d8a313caae4ea41af60a171042a6
Signed-off-by: Chungying Lu <chungying.l
feat(mt8188): add emi mpu protection for APU secure memory
Add emi mpu protection of APU secure memory.
Change-Id: I949cfce97565d8a313caae4ea41af60a171042a6
Signed-off-by: Chungying Lu <chungying.lu@mediatek.com>
Signed-off-by: Karl Li <karl.li@mediatek.com>
show more ...
|
| #
60239450 |
| 22-Sep-2022 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "mediatek upstream" into integration
* changes:
refactor(mt8188): move platform_def.h to mt8188/include
feat(mt8188): add MCUSYS support
feat(mt8188): add armv8.2 supp
Merge changes from topic "mediatek upstream" into integration
* changes:
refactor(mt8188): move platform_def.h to mt8188/include
feat(mt8188): add MCUSYS support
feat(mt8188): add armv8.2 support
feat(mt8188): add DFD control in SiP service
feat(mt8188): add EMI MPU basic drivers
feat(mt8188): add DCM driver
feat(mt8188): add reset and poweroff functions
feat(mediatek): add more flexibility of mtk_pm.c
feat(mediatek): add more options for build helper
feat(mt8188): add LPM driver support
feat(mt8188): apply ERRATA for CA-78
fix(mediatek): remove unused cold_boot.[c|h]
fix(mediatek): wrap cold_boot.h with MTK_SIP_KERNEL_BOOT_ENABLE
feat(mt8186): add EMI MPU support for SCP and DSP
show more ...
|
| #
8454f0d6 |
| 05-Sep-2022 |
Dawei Chien <dawei.chien@mediatek.com> |
feat(mt8188): add EMI MPU basic drivers
EMI MPU stands for external memory interface memory protect unit.
MT8188 supports 32 regions and 16 domains.
Signed-off-by: Dawei Chien <dawei.chien@mediatek
feat(mt8188): add EMI MPU basic drivers
EMI MPU stands for external memory interface memory protect unit.
MT8188 supports 32 regions and 16 domains.
Signed-off-by: Dawei Chien <dawei.chien@mediatek.com>
Change-Id: I9bbeb355665401cc71dda6db22157d9d751570d1
show more ...
|