| /rk3399_ARM-atf/docs/resources/diagrams/plantuml/ |
| H A D | el3_spm_dfd.puml | 27 {rank="same" smmu, spmd} 38 rank="same" 49 {rank="same" spmc, bl31} 50 {rank="same" spmd, lsp}
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| H A D | tfa_dfd.puml | 40 rank="same"
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| H A D | spm_dfd.puml | 34 rank="same"
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| H A D | tfa_rse_dfd.puml | 41 rank="same"
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| H A D | tfa_arm_cca_dfd.puml | 41 rank="same"
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| /rk3399_ARM-atf/docs/threat_model/firmware_threat_model/ |
| H A D | threat_model_rse_interface.rst | 25 is the same as in the general TF-A threat-model document. 54 received. The caller of the API must do the same if data is not needed
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| H A D | threat_model_firmware_handoff.rst | 25 consumer are typically TF-A stages that remain within the same broader TF-A 30 Even so, it is safer to handle those threats in the same way. Doing so keeps 138 | | between stages. If the same TL is reused across |
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| /rk3399_ARM-atf/plat/arm/board/fvp/ |
| H A D | jmptbl.i | 7 # The index in the output file will be generated cumulatively in the same
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| /rk3399_ARM-atf/plat/arm/board/juno/ |
| H A D | jmptbl.i | 7 # The index in the output file will be generated cumulatively in the same
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| /rk3399_ARM-atf/drivers/ti/clk/ |
| H A D | ti_pll.c | 211 bool same; in ti_pll_consider() local 313 same = false; in ti_pll_consider() 320 same = true; in ti_pll_consider() 357 same = true; in ti_pll_consider() 375 if (!((bin == data->max_bin) && !same && !better)) { in ti_pll_consider() 378 if (!((bin == data->max_bin) && same && (fitness <= data->max_fitness))) { in ti_pll_consider()
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| /rk3399_ARM-atf/docs/perf/ |
| H A D | psci-performance-instr.rst | 57 state. Generally, this parameter takes the same form as the power_state 66 :param target_cpu: follows the same format as ``PSCI_STAT_RESIDENCY``. 67 :param power_state: follows the same format as ``PSCI_STAT_RESIDENCY``.
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| /rk3399_ARM-atf/docs/plat/ |
| H A D | rpi5.rst | 33 BL31 and BL33 in the same ``armstub`` image (e.g. TF-A + EDK2). 73 The boot process is essentially the same, the only notable difference being that
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| H A D | intel-agilex.rst | 29 Make all the repositories in the same ${BUILD\_PATH}.
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| H A D | intel-stratix10.rst | 29 Make all the repositories in the same ${BUILD\_PATH}.
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| /rk3399_ARM-atf/docs/plat/marvell/armada/ |
| H A D | uart-booting.rst | 48 target, which is the exactly same file as used for flashing. So when using CZ.NIC mox-imager there 85 A7K/A8K/CN913x uses same image ``flash-image.bin`` for both flashing and booting over UART.
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| H A D | porting.rst | 117 The parameters for the same type of comphy may vary even for the same 119 different HW characteristic than lanes from comphy-y to the same
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| /rk3399_ARM-atf/ |
| H A D | dco.txt | 25 by me, under the same open source license (unless I am
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| /rk3399_ARM-atf/docs/process/ |
| H A D | coding-style.rst | 226 Local variables and function parameters use the same format as function names: 274 ``switch`` so that they are in the same column. 421 For header files that are in the same directory as the source file that is 424 For header files that are **not** in the same directory as the source file that 481 function shall use the same names and type qualifiers".
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| H A D | platform-ports-policy.rst | 47 versions are the same.
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| /rk3399_ARM-atf/docs/security_advisories/ |
| H A D | security-advisory-tfv-5.rst | 47 The same issue exists for the equivalent AArch32 register, ``PMCR``, except that
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| H A D | security-advisory-tfv-2.rst | 39 may or may not have the same problem, depending on the platform.
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| /rk3399_ARM-atf/docs/design/ |
| H A D | reset-design.rst | 36 Therefore, all CPUs start at the same address (typically address 0) whenever 131 In this configuration, BL31 uses the same reset framework and code as the one 134 same way.
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| H A D | psci-pd-tree.rst | 18 a platform will use exactly the same MPIDRs as generated by the generic PSCI 141 for a core domain will be the same as the index returned by 145 core in the array is the same as the return value from these APIs.
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| /rk3399_ARM-atf/docs/components/ |
| H A D | numa-per-cpu.rst | 84 CPUs access different addresses that lie on the same cache line. Although the 88 write to different addresses within the same cache line, the line bounces 145 In assembly routines, the ``per_cpu_cur`` helper macro performs the same
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| /rk3399_ARM-atf/docs/about/ |
| H A D | lts.rst | 40 the risk of regression. At the same time the companies don't want to exclude 190 the LTS branch will be created at the same time as the TF-A November release, 203 diagram, at the same time LTS release candidate branch is made which is based 217 - Nov 2023: TF-A 2.10 is released. Not shown in the diagram, at the same time 313 will be cherry-picked from master branch to the LTS branch the same way it is done for TF-A. 341 #. The review criteria for LTS patches must be the same as TF-A patches
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