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Searched refs:region (Results 1 – 25 of 82) sorted by relevance

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/rk3399_ARM-atf/plat/mediatek/drivers/emi_mpu/
H A Demi_mpu_common.c29 unsigned int region; in _emi_mpu_set_protection() local
31 region = (start >> 24) & 0xFF; in _emi_mpu_set_protection()
36 if ((region >= EMI_MPU_REGION_NUM) || (dgroup > EMI_MPU_DGROUP_NUM)) { in _emi_mpu_set_protection()
42 if (region_lock_state[region] == LOCK) { in _emi_mpu_set_protection()
48 region_lock_state[region] = LOCK; in _emi_mpu_set_protection()
64 mmio_write_32(EMI_MPU_SA(region), start); in _emi_mpu_set_protection()
65 mmio_write_32(EMI_MPU_EA(region), end); in _emi_mpu_set_protection()
66 mmio_write_32(EMI_MPU_APC(region, dgroup), apc); in _emi_mpu_set_protection()
69 mmio_write_32(SUB_EMI_MPU_SA(region), start); in _emi_mpu_set_protection()
70 mmio_write_32(SUB_EMI_MPU_EA(region), end); in _emi_mpu_set_protection()
[all …]
H A Demi_mpu.h56 unsigned int region; member
72 int emi_mpu_clear_protection(unsigned int region);
/rk3399_ARM-atf/plat/nxp/common/setup/
H A Dls_common.c67 (void *) info_dram_regions->region[i].addr, in mmap_add_ddr_regions_statically()
68 (void *) (info_dram_regions->region[i].addr in mmap_add_ddr_regions_statically()
69 + info_dram_regions->region[i].size in mmap_add_ddr_regions_statically()
71 mmap_add_region(info_dram_regions->region[i].addr, in mmap_add_ddr_regions_statically()
72 info_dram_regions->region[i].addr, in mmap_add_ddr_regions_statically()
73 info_dram_regions->region[i].size, in mmap_add_ddr_regions_statically()
77 if (info_dram_regions->region[i].size > in mmap_add_ddr_regions_statically()
80 (void *) (info_dram_regions->region[i].addr in mmap_add_ddr_regions_statically()
81 + info_dram_regions->region[i].size), in mmap_add_ddr_regions_statically()
82 (void *) (info_dram_regions->region[i].addr in mmap_add_ddr_regions_statically()
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H A Dls_bl2_el3_setup.c42 dram_regions_info.region[reg_id].addr = NXP_DRAM0_ADDR; in populate_dram_regions_info()
43 dram_regions_info.region[reg_id].size = in populate_dram_regions_info()
47 if (dram_regions_info.region[reg_id].size != NXP_DRAM0_SIZE) { in populate_dram_regions_info()
51 dram_remain_size -= dram_regions_info.region[reg_id].size; in populate_dram_regions_info()
52 dram_regions_info.region[reg_id].size -= (NXP_SECURE_DRAM_SIZE in populate_dram_regions_info()
55 assert(dram_regions_info.region[reg_id].size > 0); in populate_dram_regions_info()
64 dram_regions_info.region[reg_id].addr = NXP_DRAM1_ADDR; in populate_dram_regions_info()
65 dram_regions_info.region[reg_id].size = in populate_dram_regions_info()
68 dram_remain_size -= dram_regions_info.region[reg_id].size; in populate_dram_regions_info()
74 dram_regions_info.region[reg_id].addr = NXP_DRAM1_ADDR; in populate_dram_regions_info()
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H A Dls_bl31_setup.c99 dram_regions_info.region[0].addr = 0x80000000; in bl31_early_platform_setup2()
100 dram_regions_info.region[0].size = 0x80000000; in bl31_early_platform_setup2()
101 dram_regions_info.region[1].addr = 0x880000000; in bl31_early_platform_setup2()
102 dram_regions_info.region[1].size = 0x80000000; in bl31_early_platform_setup2()
136 dram_regions_info.region[i].addr = in bl31_early_platform_setup2()
137 loc_dram_regions_info->region[i].addr; in bl31_early_platform_setup2()
138 dram_regions_info.region[i].size = in bl31_early_platform_setup2()
139 loc_dram_regions_info->region[i].size; in bl31_early_platform_setup2()
141 dram_regions_info.region[i].size); in bl31_early_platform_setup2()
/rk3399_ARM-atf/plat/mediatek/mt8192/drivers/emi_mpu/
H A Demi_mpu.c23 unsigned int region; in _emi_mpu_set_protection() local
25 region = (start >> 24) & 0xFF; in _emi_mpu_set_protection()
30 if ((region >= EMI_MPU_REGION_NUM) || (dgroup > EMI_MPU_DGROUP_NUM)) { in _emi_mpu_set_protection()
31 WARN("Region:%u or dgroup:%u is wrong!\n", region, dgroup); in _emi_mpu_set_protection()
46 mmio_write_32(EMI_MPU_SA(region), start); in _emi_mpu_set_protection()
47 mmio_write_32(EMI_MPU_EA(region), end); in _emi_mpu_set_protection()
48 mmio_write_32(EMI_MPU_APC(region, dgroup), apc); in _emi_mpu_set_protection()
57 int region, i; in dump_emi_mpu_regions() local
60 for (region = 0; region < 8; ++region) { in dump_emi_mpu_regions()
62 apc[i] = mmio_read_32(EMI_MPU_APC(region, i)); in dump_emi_mpu_regions()
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H A Demi_mpu.h43 #define EMI_MPU_SA(region) (EMI_MPU_SA0 + (region) * 4) argument
44 #define EMI_MPU_EA(region) (EMI_MPU_EA0 + (region) * 4) argument
47 #define EMI_MPU_APC(region, dgroup) (EMI_MPU_APC0 + (region) * 4 + \ argument
94 unsigned int region; member
/rk3399_ARM-atf/plat/mediatek/mt8195/drivers/emi_mpu/
H A Demi_mpu.c27 unsigned int region; in _emi_mpu_set_protection() local
29 region = (start >> 24) & 0xFF; in _emi_mpu_set_protection()
34 if ((region >= EMI_MPU_REGION_NUM) || (dgroup > EMI_MPU_DGROUP_NUM)) { in _emi_mpu_set_protection()
40 if (region_lock_state[region] == 1) { in _emi_mpu_set_protection()
46 region_lock_state[region] = 1; in _emi_mpu_set_protection()
62 mmio_write_32(EMI_MPU_SA(region), start); in _emi_mpu_set_protection()
63 mmio_write_32(EMI_MPU_EA(region), end); in _emi_mpu_set_protection()
64 mmio_write_32(EMI_MPU_APC(region, dgroup), apc); in _emi_mpu_set_protection()
67 mmio_write_32(SUB_EMI_MPU_SA(region), start); in _emi_mpu_set_protection()
68 mmio_write_32(SUB_EMI_MPU_EA(region), end); in _emi_mpu_set_protection()
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H A Demi_mpu.h18 #define EMI_MPU_SA(region) (EMI_MPU_SA0 + (region * 4)) argument
19 #define EMI_MPU_EA(region) (EMI_MPU_EA0 + (region * 4)) argument
21 #define EMI_MPU_APC(region, dgroup) (EMI_MPU_APC0 + (region * 4) + (dgroup * 0x100)) argument
33 #define SUB_EMI_MPU_SA(region) (SUB_EMI_MPU_SA0 + (region * 4)) argument
34 #define SUB_EMI_MPU_EA(region) (SUB_EMI_MPU_EA0 + (region * 4)) argument
36 #define SUB_EMI_MPU_APC(region, dgroup) (SUB_EMI_MPU_APC0 + (region * 4) + (dgroup * 0x100)) argument
92 unsigned int region; member
/rk3399_ARM-atf/plat/mediatek/drivers/emi_mpu/mt8188/
H A Demi_mpu_priv.h16 #define EMI_MPU_SA(region) (EMI_MPU_SA0 + (region * 4)) argument
17 #define EMI_MPU_EA(region) (EMI_MPU_EA0 + (region * 4)) argument
19 #define EMI_MPU_APC(region, dgroup) (EMI_MPU_APC0 + (region * 4) + (dgroup * 0x100)) argument
29 #define SUB_EMI_MPU_SA(region) (SUB_EMI_MPU_SA0 + (region * 4)) argument
30 #define SUB_EMI_MPU_EA(region) (SUB_EMI_MPU_EA0 + (region * 4)) argument
32 #define SUB_EMI_MPU_APC(region, dgroup) (SUB_EMI_MPU_APC0 + (region * 4) + (dgroup * 0x100)) argument
H A Demi_mpu.c20 region_info.region = BL31_EMI_REGION_ID; in set_emi_mpu_regions()
32 region_info.region = BL32_REGION_ID; in set_emi_mpu_regions()
44 region_info.region = SCP_CORE0_REGION_ID; in set_emi_mpu_regions()
55 region_info.region = SCP_CORE1_REGION_ID; in set_emi_mpu_regions()
66 region_info.region = DSP_PROTECT_REGION_ID; in set_emi_mpu_regions()
77 region_info.region = ALL_DEFAULT_REGION_ID; in set_emi_mpu_regions()
92 region_info.region = APUSYS_SEC_BUF_EMI_REGION_ID; in set_apu_emi_mpu_region()
138 region_info.region = zone_id; in emi_mpu_optee_handler()
/rk3399_ARM-atf/plat/mediatek/mt8186/drivers/emi_mpu/
H A Demi_mpu.c25 unsigned int region; in _emi_mpu_set_protection() local
27 region = (start >> 24) & 0xFF; in _emi_mpu_set_protection()
32 if ((region >= EMI_MPU_REGION_NUM) || (dgroup > EMI_MPU_DGROUP_NUM)) { in _emi_mpu_set_protection()
38 if (region_lock_state[region] == 1) { in _emi_mpu_set_protection()
44 region_lock_state[region] = 1; in _emi_mpu_set_protection()
60 mmio_write_32(EMI_MPU_SA(region), start); in _emi_mpu_set_protection()
61 mmio_write_32(EMI_MPU_EA(region), end); in _emi_mpu_set_protection()
62 mmio_write_32(EMI_MPU_APC(region, dgroup), apc); in _emi_mpu_set_protection()
65 mmio_write_32(SUB_EMI_MPU_SA(region), start); in _emi_mpu_set_protection()
66 mmio_write_32(SUB_EMI_MPU_EA(region), end); in _emi_mpu_set_protection()
[all …]
H A Demi_mpu.h18 #define EMI_MPU_SA(region) (EMI_MPU_SA0 + (region * 4)) argument
19 #define EMI_MPU_EA(region) (EMI_MPU_EA0 + (region * 4)) argument
21 #define EMI_MPU_APC(region, dgroup) (EMI_MPU_APC0 + (region * 4) + (dgroup * 0x100)) argument
33 #define SUB_EMI_MPU_SA(region) (SUB_EMI_MPU_SA0 + (region * 4)) argument
34 #define SUB_EMI_MPU_EA(region) (SUB_EMI_MPU_EA0 + (region * 4)) argument
36 #define SUB_EMI_MPU_APC(region, dgroup) (SUB_EMI_MPU_APC0 + (region * 4) + (dgroup * 0x100)) argument
92 unsigned int region; member
/rk3399_ARM-atf/drivers/arm/tzc/
H A Dtzc380.c32 static void tzc380_write_region_base_low(uintptr_t base, unsigned int region, in tzc380_write_region_base_low() argument
35 mmio_write_32(base + REGION_SETUP_LOW_OFF(region), val); in tzc380_write_region_base_low()
38 static void tzc380_write_region_base_high(uintptr_t base, unsigned int region, in tzc380_write_region_base_high() argument
41 mmio_write_32(base + REGION_SETUP_HIGH_OFF(region), val); in tzc380_write_region_base_high()
44 static void tzc380_write_region_attributes(uintptr_t base, unsigned int region, in tzc380_write_region_attributes() argument
47 mmio_write_32(base + REGION_ATTRIBUTES_OFF(region), val); in tzc380_write_region_attributes()
83 void tzc380_configure_region(uint8_t region, uintptr_t region_base, unsigned int attr) in tzc380_configure_region() argument
87 assert(region < tzc380.num_regions); in tzc380_configure_region()
89 tzc380_write_region_base_low(tzc380.base, region, addr_low(region_base)); in tzc380_configure_region()
90 tzc380_write_region_base_high(tzc380.base, region, addr_high(region_base)); in tzc380_configure_region()
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H A Dtzc400.c241 unsigned int region, in tzc400_configure_region() argument
256 (region < tzc400.num_regions)); in tzc400_configure_region()
270 _tzc400_configure_region(tzc400.base, filters, region, region_base, in tzc400_configure_region()
275 void tzc400_update_filters(unsigned int region, unsigned int filters) in tzc400_update_filters() argument
279 (region < tzc400.num_regions)); in tzc400_update_filters()
281 _tzc400_update_filters(tzc400.base, region, tzc400.num_filters, filters); in tzc400_update_filters()
/rk3399_ARM-atf/plat/mediatek/drivers/emi/
H A Demi_stub.c9 uint64_t emi_mpu_read_addr(unsigned int region, unsigned int offset) in emi_mpu_read_addr() argument
14 uint64_t emi_mpu_read_enable(unsigned int region) in emi_mpu_read_enable() argument
19 uint64_t emi_mpu_read_aid(unsigned int region, unsigned int aid_shift) in emi_mpu_read_aid() argument
29 enum mtk_bl31_status emi_kp_set_protection(size_t start, size_t end, unsigned int region) in emi_kp_set_protection() argument
39 enum mtk_bl31_status emi_clear_protection(unsigned int region) in emi_clear_protection() argument
49 uint64_t emi_mpu_check_region_info(unsigned int region, uint64_t *sa, uint64_t *ea) in emi_mpu_check_region_info() argument
84 enum mtk_bl31_status emi_mpu_set_aid(unsigned int region, unsigned int num) in emi_mpu_set_aid() argument
94 unsigned int region) in emi_mpu_set_protection() argument
H A Demi_ctrl.c46 static uint64_t emi_mpu_read_by_type(unsigned int reg_type, unsigned int region, in emi_mpu_read_by_type() argument
51 return emi_mpu_read_addr(region, 0x0); in emi_mpu_read_by_type()
53 return emi_mpu_read_addr(region, 0x8); in emi_mpu_read_by_type()
55 return emi_mpu_read_enable(region); in emi_mpu_read_by_type()
57 return emi_mpu_read_aid(region, aid_shift); in emi_mpu_read_by_type()
59 return emi_mpu_check_region_info(region, &smccc_ret->a1, &smccc_ret->a2); in emi_mpu_read_by_type()
/rk3399_ARM-atf/plat/hisilicon/hikey/
H A Dhikey_security.c51 static volatile struct rgn_map_reg *get_rgn_map_reg(uint32_t base, int region, int port) in get_rgn_map_reg() argument
53 uint64_t addr = base + 0x100 + 0x10 * region + 0x400 * (uint64_t)port; in get_rgn_map_reg()
57 static volatile struct rgn_attr_reg *get_rgn_attr_reg(uint32_t base, int region, in get_rgn_attr_reg() argument
60 uint64_t addr = base + 0x104 + 0x10 * region + 0x400 * (uint64_t)port; in get_rgn_attr_reg()
70 int region) in sec_protect() argument
78 assert(region > 0 && region < 16); in sec_protect()
91 rgn_map = get_rgn_map_reg(MDDRC_SECURITY_BASE, region, i); in sec_protect()
92 rgn_attr = get_rgn_attr_reg(MDDRC_SECURITY_BASE, region, i); in sec_protect()
/rk3399_ARM-atf/services/std_svc/drtm/
H A Ddrtm_res_address_map.c58 map->region[i].region_address = mmap[i].base_pa; in drtm_build_address_map()
61 map->region[i].region_size_type = 0; in drtm_build_address_map()
63 map->region[i].region_size_type, in drtm_build_address_map()
70 map->region[i].region_size_type, in drtm_build_address_map()
75 map->region[i].region_size_type, in drtm_build_address_map()
78 map->region[i].region_size_type, in drtm_build_address_map()
83 map->region[i].region_size_type, in drtm_build_address_map()
93 qsort(map->region, map->num_regions, sizeof(drtm_mem_region_t), in drtm_build_address_map()
/rk3399_ARM-atf/drivers/arm/css/sds/
H A Dsds_private.h88 #define IS_SDS_REGION_VALID(region) \ argument
89 (((((region_desc_t *)(region))->reg[0]) & SDS_REGION_SIGNATURE_MASK) == SDS_REGION_SIGNATURE)
90 #define GET_SDS_REGION_STRUCTURE_COUNT(region) \ argument
91 (((((region_desc_t *)(region))->reg[0]) >> SDS_REGION_STRUCT_COUNT_SHIFT)\
93 #define GET_SDS_REGION_SCHEMA_VERSION(region) \ argument
94 (((((region_desc_t *)(region))->reg[0]) >> SDS_REGION_SCH_MINOR_SHIFT)\
96 #define GET_SDS_REGION_SIZE(region) ((((region_desc_t *)(region))->reg[1])) argument
/rk3399_ARM-atf/plat/mediatek/include/
H A Dmtk_bl31_interface.h64 uint64_t emi_mpu_read_addr(unsigned int region, unsigned int offset);
65 uint64_t emi_mpu_read_enable(unsigned int region);
66 uint64_t emi_mpu_read_aid(unsigned int region, unsigned int aid_shift);
69 unsigned int region);
70 enum mtk_bl31_status emi_kp_set_protection(size_t start, size_t end, unsigned int region);
72 enum mtk_bl31_status emi_clear_protection(unsigned int region);
74 uint64_t emi_mpu_check_region_info(unsigned int region, uint64_t *sa, uint64_t *ea);
81 enum mtk_bl31_status emi_mpu_set_aid(unsigned int region, unsigned int num);
/rk3399_ARM-atf/tools/memory/src/memory/
H A Dmapparser.py30 region, _, attr = symbol.lower().strip("__").split("_")
33 self._footprint[region].start = self._symbols[symbol]
35 self._footprint[region].end = self._symbols[symbol]
37 self._footprint[region].length = self._symbols[symbol]
/rk3399_ARM-atf/drivers/st/rif/
H A Dstm32mp2_risaf.c96 addr = pdata->region[region_id].addr; in check_region_overlap()
97 length = pdata->region[region_id].len; in check_region_overlap()
98 instance = pdata->region[region_id].instance; in check_region_overlap()
101 if (pdata->region[i].instance != instance) { in check_region_overlap()
106 pdata->region[i].addr, pdata->region[i].len)) { in check_region_overlap()
186 if (pdata->region[n].instance != idx) { in risaf_conf_protreg()
190 value = pdata->region[n].cfg; in risaf_conf_protreg()
208 start_addr = pdata->region[n].addr; in risaf_conf_protreg()
209 end_addr = (start_addr - 1U) + pdata->region[n].len; in risaf_conf_protreg()
307 pdata->region[pdata->nregions].instance = inst; in risaf_register_region()
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/rk3399_ARM-atf/include/drivers/arm/
H A Dtzc400.h107 unsigned int region,
112 void tzc400_update_filters(unsigned int region, unsigned int filters);
132 unsigned int region, in tzc_configure_region() argument
138 tzc400_configure_region(filters, region, region_base, in tzc_configure_region()
/rk3399_ARM-atf/drivers/st/mce/
H A Dstm32_mce.c383 struct stm32_mce_region_s region; in fconf_populate_mce() local
385 region.start_address = fdt32_to_cpu(conf_list->id_attr[i * MCE_REGION_PARAMS]); in fconf_populate_mce()
387 region.end_address = region.start_address + size - 1U; in fconf_populate_mce()
388 region.encrypt_mode = fdt32_to_cpu(conf_list->id_attr[i * MCE_REGION_PARAMS + 2U]); in fconf_populate_mce()
391 region.start_address, size, region.encrypt_mode); in fconf_populate_mce()
393 if (stm32_mce_configure_region(i, &region) != 0) { in fconf_populate_mce()

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