| /rk3399_ARM-atf/plat/rockchip/common/ |
| H A D | plat_pm_helpers.c | 43 struct reg_region *r = rgns; in alloc_region_mem() local
47 for (i = 0; i < rgn_num; i++, r++) { in alloc_region_mem()
49 r->buf = &buf[total_len]; in alloc_region_mem()
51 len = RGN_LEN(r); in alloc_region_mem()
90 struct reg_region *r; in rockchip_reg_rgn_save() local
97 r = &rgns[i]; in rockchip_reg_rgn_save()
98 for (j = 0, addr = r->start; addr <= r->end; addr += r->stride, j++) in rockchip_reg_rgn_save()
99 r->buf[j] = mmio_read_32(addr); in rockchip_reg_rgn_save()
110 struct reg_region *r; in rockchip_reg_rgn_restore() local
117 r = &rgns[i]; in rockchip_reg_rgn_restore()
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| /rk3399_ARM-atf/lib/compiler-rt/builtins/ |
| H A D | udivmoddi4.c | 35 udwords r; in __udivmoddi4() local
70 r.s.high = n.s.high % d.s.high; in __udivmoddi4()
71 r.s.low = 0; in __udivmoddi4()
72 *rem = r.all; in __udivmoddi4()
81 r.s.low = n.s.low; in __udivmoddi4()
82 r.s.high = n.s.high & (d.s.high - 1); in __udivmoddi4()
83 *rem = r.all; in __udivmoddi4()
103 r.s.high = n.s.high >> sr; in __udivmoddi4()
104 r.s.low = (n.s.high << (n_uword_bits - sr)) | (n.s.low >> sr); in __udivmoddi4()
130 r.s.high = 0; in __udivmoddi4()
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| H A D | int_div_impl.inc | 27 fixuint_t r = n >> sr;
31 r = (r << 1) | (n >> (N - 1));
35 // if (r >= d) r -= d, carry = 1;
36 const fixint_t s = (fixint_t)(d - r - 1) >> (N - 1);
38 r -= d & s;
56 fixuint_t r = n >> sr;
60 r = (r << 1) | (n >> (N - 1));
64 // if (r >= d) r -= d, carry = 1;
65 const fixint_t s = (fixint_t)(d - r - 1) >> (N - 1);
67 r -= d & s;
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| H A D | int_types.h | 109 twords r; in make_ti() local
110 r.s.high = (du_int)h; in make_ti()
111 r.s.low = (du_int)l; in make_ti()
112 return r.all; in make_ti()
116 utwords r; in make_tu() local
117 r.s.high = h; in make_tu()
118 r.s.low = l; in make_tu()
119 return r.all; in make_tu()
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| H A D | divmoddi4.c | 24 du_int r; in __divmoddi4() local
25 di_int q = (__udivmoddi4(a, b, &r) ^ s_b) - s_b; // negate if s_b == -1 in __divmoddi4()
26 *rem = (r ^ s_a) - s_a; // negate if s_a == -1 in __divmoddi4()
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| H A D | assembly.h | 184 #define JMP(r) bx r argument
185 #define JMPc(r, c) bx##c r argument
187 #define JMP(r) mov pc, r argument
188 #define JMPc(r, c) mov##c pc, r argument
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| /rk3399_ARM-atf/plat/mediatek/mt8186/drivers/mcdi/ |
| H A D | mt_cpu_pm_cpc.h | 18 #define CPUIDLE_SRAM_REG(r) (0x11B000 + (r)) argument
47 #define cpusys_resp(r) (((r) >> CPUSYS_RESP_OFS) & CPC_PROT_RESP_MASK) argument
48 #define mcusys_resp(r) (((r) >> MCUSYS_RESP_OFS) & CPC_PROT_RESP_MASK) argument
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| /rk3399_ARM-atf/plat/mediatek/mt8192/drivers/mcdi/ |
| H A D | mt_cpu_pm_cpc.h | 18 #define CPUIDLE_SRAM_REG(r) (uint32_t)(MTK_MCDI_SRAM_BASE + (r)) argument
47 #define cpusys_resp(r) (((r) >> CPUSYS_RESP_OFS) & CPC_PROT_RESP_MASK) argument
48 #define mcusys_resp(r) (((r) >> MCUSYS_RESP_OFS) & CPC_PROT_RESP_MASK) argument
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| /rk3399_ARM-atf/plat/mediatek/mt8195/drivers/mcdi/ |
| H A D | mt_cpu_pm_cpc.h | 18 #define CPUIDLE_SRAM_REG(r) (uint32_t)(MTK_MCDI_SRAM_BASE + (r)) argument
47 #define cpusys_resp(r) (((r) >> CPUSYS_RESP_OFS) & CPC_PROT_RESP_MASK) argument
48 #define mcusys_resp(r) (((r) >> MCUSYS_RESP_OFS) & CPC_PROT_RESP_MASK) argument
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| /rk3399_ARM-atf/lib/utils/ |
| H A D | mem_region.c | 62 int r; in clear_map_dyn_mem_regions() local
80 r = mmap_add_dynamic_region(begin, va, chunk, attr); in clear_map_dyn_mem_regions()
81 if (r != 0) { in clear_map_dyn_mem_regions()
83 "mmap_add_dynamic_region", r); in clear_map_dyn_mem_regions()
89 r = mmap_remove_dynamic_region(va, chunk); in clear_map_dyn_mem_regions()
90 if (r != 0) { in clear_map_dyn_mem_regions()
92 "mmap_remove_dynamic_region", r); in clear_map_dyn_mem_regions()
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| /rk3399_ARM-atf/drivers/renesas/common/emmc/ |
| H A D | emmc_std.h | 20 #define SETR_64(r, v) (*(volatile uint64_t *)(r) = (v)) argument
21 #define GETR_64(r) (*(volatile uint64_t *)(r)) argument
24 #define SETR_32(r, v) (*(volatile uint32_t *)(r) = (v)) argument
25 #define GETR_32(r) (*(volatile uint32_t *)(r)) argument
28 #define SETR_16(r, v) (*(volatile uint16_t *)(r) = (v)) argument
29 #define GETR_16(r) (*(volatile uint16_t *)(r)) argument
32 #define SETR_8(r, v) (*(volatile uint8_t *)(r) = (v)) argument
33 #define GETR_8(r) (*(volatile uint8_t *)(r)) argument
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| /rk3399_ARM-atf/lib/aarch32/ |
| H A D | arm32_aeabi_divmod.c | 24 unsigned int r; /* computed remainder */ member
64 qr->r = 0xFFFFFFFF; /* division by 0 */ in division_qr()
82 qr->r = n; in division_qr()
95 qr->r = -qr->r; in uint_div_qr()
113 return ret_uidivmod_values(qr.q, qr.r); in __aeabi_uidivmod()
155 return ret_idivmod_values(qr.q, qr.r); in __aeabi_idivmod()
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| /rk3399_ARM-atf/lib/debugfs/ |
| H A D | devfip.c | 121 int i, r; in fipgen() local
148 r = get_entry(&nc, &entry); in fipgen()
149 if (r <= 0) { in fipgen()
150 return r; in fipgen()
246 int r, n, t; in fipmount() local
270 r = devtab[cspec->index]->read(cspec, &hname, sizeof(hname)); in fipmount()
271 if (r < 0) { in fipmount()
275 if ((r != sizeof(hname)) || (hname != TOC_HEADER_NAME)) { in fipmount()
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| /rk3399_ARM-atf/include/lib/cpus/ |
| H A D | errata.h | 113 #define CPU_REV(r, p) ((r << 4) | p) argument
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| /rk3399_ARM-atf/plat/mediatek/drivers/cpu_pm/cpcv3_2/ |
| H A D | mt_cpu_pm_cpc.h | 18 #define CPUIDLE_SRAM_REG(r) (CPU_IDLE_SRAM_BASE + (r)) argument
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| /rk3399_ARM-atf/include/lib/ |
| H A D | utils_def.h | 102 #define ROUND_UP_2EVAL(n, r) ((((n) + (r) - 1) / (r)) * (r)) argument
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| /rk3399_ARM-atf/tools/memory/src/memory/ |
| H A D | mapparser.py | 28 expr = r".*(.?R.M)_REGION.*(START|END|LENGTH)"
45 pattern = r"\b(0x\w*)\s*(\w*)\s="
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| H A D | summary.py | 57 _RE_OBJECT_FILE: Pattern[str] = re.compile(r"^(.+\/.+\.o(bj)?)$")
59 r"((^.+" + r"" + r"lib.+\.a)\((.+\.o(bj)?)\))$"
61 _RE_STD_SECTION: Pattern[str] = re.compile(r"^\s+.*0x(\w{8,16})\s+0x(\w+)\s(.+)$")
63 r"^\s*\*fill\*\s+0x(\w{8,16})\s+0x(\w+).*$"
65 _RE_TRANS_FILE: Pattern[str] = re.compile(r"^(.+\/|.+\.ltrans.o(bj)?)$")
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| /rk3399_ARM-atf/plat/xilinx/zynqmp/aarch64/ |
| H A D | zynqmp_common.c | 385 uint32_t r; in zynqmp_get_bootmode() local
388 ret = pm_mmio_read(CRL_APB_BOOT_MODE_USER, &r, SECURE); in zynqmp_get_bootmode()
391 r = mmio_read_32(CRL_APB_BOOT_MODE_USER); in zynqmp_get_bootmode()
394 return r & CRL_APB_BOOT_MODE_MASK; in zynqmp_get_bootmode()
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| /rk3399_ARM-atf/fdts/ |
| H A D | fvp-defs-dynamiq.dtsi | 28 * r - MPID
30 #define CPU(n, r) \ argument
31 CPU##n:cpu@r## { \
34 reg = <0x0 0x##r>; \
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| /rk3399_ARM-atf/plat/mediatek/drivers/cpu_pm/cpcv5_4/ |
| H A D | mt_cpu_pm_cpc.h | 18 #define CPUIDLE_SRAM_REG(r) (0x11B000 + (r)) argument
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| /rk3399_ARM-atf/tools/nxp/create_pbl/ |
| H A D | README | 18 -r <RCW file-name> - name of RCW binary file.
42 -r RCW binary file.
50 …./create_pbl -r <RCW file> -i <bl2.bin> -c <chassis_no> -b <boot_source = sd/qspi/nor> -d <Destina…
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| /rk3399_ARM-atf/plat/renesas/common/include/ |
| H A D | plat.ld.S | 14 PRAM (r): ORIGIN = BL31_LIMIT - DEVICE_SRAM_SIZE, LENGTH = DEVICE_SRAM_SIZE
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| /rk3399_ARM-atf/plat/renesas/rcar_gen5/include/ |
| H A D | plat.ld.S | 16 PRAM (r) : ORIGIN = BL31_LIMIT - (DEVICE_SRAM_SIZE + DEVICE_SRAM_DATA_SIZE),
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| /rk3399_ARM-atf/plat/renesas/rcar_gen4/include/ |
| H A D | plat.ld.S | 16 PRAM (r) : ORIGIN = BL31_LIMIT - (DEVICE_SRAM_SIZE + DEVICE_SRAM_DATA_SIZE),
|