xref: /rk3399_ARM-atf/plat/renesas/rcar_gen5/include/plat.ld.S (revision 7cab2c233b38cf2a63d37d31da73f1d82f5efc3c)
1*f180a3b7SHieu Nguyen/*
2*f180a3b7SHieu Nguyen * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
3*f180a3b7SHieu Nguyen * Copyright (c) 2025, Renesas Electronics Corporation. All rights reserved.
4*f180a3b7SHieu Nguyen *
5*f180a3b7SHieu Nguyen * SPDX-License-Identifier: BSD-3-Clause
6*f180a3b7SHieu Nguyen */
7*f180a3b7SHieu Nguyen#ifndef RCAR_PLAT_LD_S
8*f180a3b7SHieu Nguyen#define RCAR_PLAT_LD_S
9*f180a3b7SHieu Nguyen
10*f180a3b7SHieu Nguyen#include <lib/xlat_tables/xlat_tables_defs.h>
11*f180a3b7SHieu Nguyen#include <platform_def.h>
12*f180a3b7SHieu Nguyen
13*f180a3b7SHieu NguyenMEMORY {
14*f180a3b7SHieu Nguyen    SRAM      (rwx): ORIGIN = DEVICE_SRAM_BASE, LENGTH = DEVICE_SRAM_SIZE
15*f180a3b7SHieu Nguyen    SRAM_DATA (rwx): ORIGIN = DEVICE_SRAM_DATA_BASE, LENGTH = DEVICE_SRAM_DATA_SIZE
16*f180a3b7SHieu Nguyen    PRAM      (r)  : ORIGIN = BL31_LIMIT - (DEVICE_SRAM_SIZE + DEVICE_SRAM_DATA_SIZE),
17*f180a3b7SHieu Nguyen                     LENGTH = DEVICE_SRAM_SIZE + DEVICE_SRAM_DATA_SIZE
18*f180a3b7SHieu Nguyen}
19*f180a3b7SHieu Nguyen
20*f180a3b7SHieu NguyenSECTIONS
21*f180a3b7SHieu Nguyen{
22*f180a3b7SHieu Nguyen	/* SRAM_COPY is in PRAM (RO) */
23*f180a3b7SHieu Nguyen	. = BL31_LIMIT - (DEVICE_SRAM_SIZE + DEVICE_SRAM_DATA_SIZE);
24*f180a3b7SHieu Nguyen	__SRAM_COPY_START__ = .;
25*f180a3b7SHieu Nguyen
26*f180a3b7SHieu Nguyen	.system_ram : {
27*f180a3b7SHieu Nguyen		/* system ram start is in SRAM */
28*f180a3b7SHieu Nguyen		__system_ram_start__ = .;
29*f180a3b7SHieu Nguyen		*(.system_ram)
30*f180a3b7SHieu Nguyen	        __system_ram_end__ = .;
31*f180a3b7SHieu Nguyen	} >SRAM AT>PRAM
32*f180a3b7SHieu Nguyen
33*f180a3b7SHieu Nguyen	/* SRAM variable is in PRAM (RW) */
34*f180a3b7SHieu Nguyen	. = BL31_LIMIT - DEVICE_SRAM_DATA_SIZE;
35*f180a3b7SHieu Nguyen
36*f180a3b7SHieu Nguyen	.system_ram_data : {
37*f180a3b7SHieu Nguyen		__system_ram_data_start__ = .;
38*f180a3b7SHieu Nguyen		*(.system_ram_data)
39*f180a3b7SHieu Nguyen	        __system_ram_data_end__ = .;
40*f180a3b7SHieu Nguyen	} >SRAM_DATA AT>PRAM
41*f180a3b7SHieu Nguyen
42*f180a3b7SHieu Nguyen
43*f180a3b7SHieu Nguyen    ASSERT(__BL31_END__ <= (BL31_LIMIT - (DEVICE_SRAM_SIZE + DEVICE_SRAM_DATA_SIZE)),
44*f180a3b7SHieu Nguyen    "BL31 image too large - writing on top of SRAM!")
45*f180a3b7SHieu Nguyen}
46*f180a3b7SHieu Nguyen
47*f180a3b7SHieu Nguyen#endif /* RCAR_PLAT_LD_S */
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