Home
last modified time | relevance | path

Searched refs:pmic (Results 1 – 25 of 35) sorted by relevance

12

/rk3399_ARM-atf/plat/allwinner/sun50i_h616/
H A Dsunxi_power.c38 } pmic; variable
124 pmic = UNKNOWN; in pmic_bus_init()
131 pmic = UNKNOWN; in pmic_bus_init()
154 pmic = AXP305; in sunxi_pmic_setup()
157 if (pmic == UNKNOWN) { in sunxi_pmic_setup()
160 pmic = AXP313; in sunxi_pmic_setup()
164 if (pmic == UNKNOWN) { in sunxi_pmic_setup()
167 pmic = AXP717; in sunxi_pmic_setup()
171 if (pmic == UNKNOWN) { in sunxi_pmic_setup()
203 if (pmic == AXP305) { in sunxi_pmic_setup()
[all …]
/rk3399_ARM-atf/drivers/st/pmic/
H A Dstpmic2.c167 int stpmic2_register_read(struct pmic_handle_s *pmic, in stpmic2_register_read() argument
170 int ret = stm32_i2c_mem_read(pmic->i2c_handle, in stpmic2_register_read()
171 pmic->i2c_addr, in stpmic2_register_read()
182 int stpmic2_register_write(struct pmic_handle_s *pmic, in stpmic2_register_write() argument
186 int ret = stm32_i2c_mem_write(pmic->i2c_handle, in stpmic2_register_write()
187 pmic->i2c_addr, in stpmic2_register_write()
198 int stpmic2_register_update(struct pmic_handle_s *pmic, in stpmic2_register_update() argument
204 status = stpmic2_register_read(pmic, register_id, &val); in stpmic2_register_update()
214 return stpmic2_register_write(pmic, register_id, val); in stpmic2_register_update()
217 int stpmic2_regulator_set_state(struct pmic_handle_s *pmic, in stpmic2_regulator_set_state() argument
[all …]
/rk3399_ARM-atf/include/drivers/st/
H A Dstpmic2.h329 int stpmic2_register_read(struct pmic_handle_s *pmic,
331 int stpmic2_register_write(struct pmic_handle_s *pmic,
333 int stpmic2_register_update(struct pmic_handle_s *pmic,
336 int stpmic2_regulator_set_state(struct pmic_handle_s *pmic,
338 int stpmic2_regulator_get_state(struct pmic_handle_s *pmic,
341 int stpmic2_regulator_levels_mv(struct pmic_handle_s *pmic,
344 int stpmic2_regulator_get_voltage(struct pmic_handle_s *pmic,
346 int stpmic2_regulator_set_voltage(struct pmic_handle_s *pmic,
349 void stpmic2_dump_regulators(struct pmic_handle_s *pmic);
351 int stpmic2_get_version(struct pmic_handle_s *pmic, uint8_t *val);
[all …]
/rk3399_ARM-atf/plat/allwinner/sun50i_a64/
H A Dsunxi_power.c28 } pmic; variable
133 pmic = REF_DESIGN_H5; in sunxi_pmic_setup()
137 pmic = GENERIC_A64; in sunxi_pmic_setup()
149 pmic = AXP803_RSB; in sunxi_pmic_setup()
166 switch (pmic) { in sunxi_power_down()
/rk3399_ARM-atf/plat/allwinner/sun50i_h6/
H A Dsunxi_power.c28 } pmic; variable
90 pmic = AXP805; in sunxi_pmic_setup()
103 switch (pmic) { in sunxi_power_down()
/rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8196/
H A Dmt_vcore_dvfsrc_plat_def.h17 #define VCORE_PMIC_TO_UV(pmic) \ argument
18 (((pmic) * VCORE_STEP_UV) + VCORE_BASE_UV)
26 #define VCORE_PMIC_TO_UV(pmic) \ argument
27 (((pmic) * VCORE_STEP_UV) + VCORE_BASE_UV)
H A Dmt_plat_spm_setting.c28 #define PMIC_VAL_TO_VOLT(pmic) (((pmic) * 500) + VCORE_BASE_UV) argument
H A Dmt_spm_vcorefs.c33 #define VCORE_PMIC_TO_UV(pmic) \ argument
34 (((pmic) * VCORE_STEP_UV) + VCORE_BASE_UV)
41 #define VSRAM_PMIC_TO_UV(pmic) \ argument
42 (((pmic) * VSRAM_STEP_UV) + VSRAM_BASE_UV)
/rk3399_ARM-atf/plat/mediatek/drivers/pmic/
H A Drules.mk9 MODULE := pmic
18 LOCAL_SRCS-y += ${LOCAL_DIR}/pmic.c
/rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8189/
H A Dmt_spm_pmic_lp.c31 #define PMIC_VAL_TO_VCORE(pmic) (((pmic) * 625) + VCORE_BASE_UV) argument
39 #define PMIC_VAL_TO_VSRAM_CORE(pmic) (((pmic) * 625) + VSRAM_CORE_BASE_UV) argument
H A Dmt_vcore_dvfsrc_plat_def.h14 #define VCORE_PMIC_TO_UV(pmic) (((pmic) * VCORE_STEP_UV) + VCORE_BASE_UV) argument
H A Dmt_plat_spm_setting.c68 #define PMIC_VAL_TO_VOLT(pmic) (((pmic) * 625) + VCORE_BASE_UV) argument
/rk3399_ARM-atf/plat/mediatek/mt8195/
H A Dplatform.mk17 -I${MTK_PLAT}/drivers/pmic/ \
32 -I${MTK_PLAT_SOC}/drivers/pmic/ \
63 ${MTK_PLAT}/drivers/pmic/pmic.c \
/rk3399_ARM-atf/plat/mediatek/mt8192/
H A Dplatform.mk15 -I${MTK_PLAT}/drivers/pmic/ \
31 -I${MTK_PLAT_SOC}/drivers/pmic/ \
60 ${MTK_PLAT}/drivers/pmic/pmic.c \
/rk3399_ARM-atf/plat/mediatek/mt8183/
H A Dplatform.mk20 -I${MTK_PLAT_SOC}/drivers/pmic/ \
55 ${MTK_PLAT_SOC}/drivers/pmic/pmic.c \
/rk3399_ARM-atf/plat/mediatek/mt8186/
H A Dplatform.mk31 -I${MTK_PLAT_SOC}/drivers/pmic/ \
79 ${MTK_PLAT_SOC}/drivers/pmic/pmic.c \
/rk3399_ARM-atf/plat/mediatek/mt8192/drivers/spm/
H A Dmt_spm_vcorefs.h39 #define __vcore_pmic_to_uv(pmic) \ argument
40 (((pmic) * _VCORE_STEP_UV) + _VCORE_BASE_UV)
H A Dmt_spm_pmic_wrap.c22 #define PMIC_VAL_TO_VOLT(pmic) (((pmic) * 625) + VCORE_BASE_UV) argument
/rk3399_ARM-atf/plat/mediatek/mt8195/drivers/spm/
H A Dmt_spm_pmic_wrap.c22 #define PMIC_VAL_TO_VOLT(pmic) (((pmic) * 625) + VCORE_BASE_UV) argument
H A Dmt_spm_vcorefs.h61 #define __vcore_pmic_to_uv(pmic) \ argument
62 (((pmic) * _VCORE_STEP_UV) + _VCORE_BASE_UV)
/rk3399_ARM-atf/plat/mediatek/mt8183/drivers/spm/
H A Dspm_pmic_wrap.c22 #define PMIC_VAL_TO_VOLT(pmic) (((pmic) * 625) + VCORE_BASE_UV) argument
/rk3399_ARM-atf/plat/mediatek/mt8173/
H A Dplatform.mk15 -I${MTK_PLAT_SOC}/drivers/pmic/ \
/rk3399_ARM-atf/plat/mediatek/mt8188/
H A Dplatform.mk40 MODULES-y += $(MTK_PLAT)/drivers/pmic
/rk3399_ARM-atf/plat/mediatek/mt8189/
H A Dplatform.mk47 MODULES-$(CONFIG_MTK_PMIC) += $(MTK_PLAT)/drivers/pmic
/rk3399_ARM-atf/plat/mediatek/mt8196/
H A Dplatform.mk63 MODULES-$(CONFIG_MTK_PMIC) += $(MTK_PLAT)/drivers/pmic

12