17d116dccSCC Ma# 22f3f5939SLeon Chen# Copyright (c) 2015-2022, ARM Limited and Contributors. All rights reserved. 37d116dccSCC Ma# 482cb2c1aSdp-arm# SPDX-License-Identifier: BSD-3-Clause 57d116dccSCC Ma# 67d116dccSCC Ma 77d116dccSCC MaMTK_PLAT := plat/mediatek 87d116dccSCC MaMTK_PLAT_SOC := ${MTK_PLAT}/${PLAT} 97d116dccSCC Ma 107d116dccSCC MaPLAT_INCLUDES := -I${MTK_PLAT}/common/ \ 112f3f5939SLeon Chen -I${MTK_PLAT}/include/ \ 128bc20038SKoan-Sin Tan -Iinclude/plat/arm/common/aarch64 \ 137ace1cc0SYi Zheng -I${MTK_PLAT_SOC}/drivers/crypt/ \ 147d116dccSCC Ma -I${MTK_PLAT_SOC}/drivers/mtcmos/ \ 157d116dccSCC Ma -I${MTK_PLAT_SOC}/drivers/pmic/ \ 167d116dccSCC Ma -I${MTK_PLAT_SOC}/drivers/rtc/ \ 177d116dccSCC Ma -I${MTK_PLAT_SOC}/drivers/spm/ \ 187d116dccSCC Ma -I${MTK_PLAT_SOC}/drivers/timer/ \ 19e9cf1bccSJulius Werner -I${MTK_PLAT_SOC}/drivers/wdt/ \ 207d116dccSCC Ma -I${MTK_PLAT_SOC}/include/ 217d116dccSCC Ma 223e4b8fdcSSoby MathewPLAT_BL_COMMON_SOURCES := lib/xlat_tables/xlat_tables_common.c \ 233e4b8fdcSSoby Mathew lib/xlat_tables/aarch64/xlat_tables.c \ 24*35d18d8dSBoyan Karatotev plat/common/plat_gicv2_base.c \ 25d1d06275Skenny liang plat/common/plat_gicv2.c \ 26d1d06275Skenny liang plat/common/aarch64/crash_console_helpers.S 277d116dccSCC Ma 28cbdc72b5SJulius WernerBL31_SOURCES += common/desc_image_load.c \ 29cbdc72b5SJulius Werner drivers/arm/cci/cci.c \ 308bc20038SKoan-Sin Tan drivers/arm/gic/common/gic_common.c \ 318bc20038SKoan-Sin Tan drivers/arm/gic/v2/gicv2_main.c \ 328bc20038SKoan-Sin Tan drivers/arm/gic/v2/gicv2_helpers.c \ 337d116dccSCC Ma drivers/delay_timer/delay_timer.c \ 341d0b990eSAntonio Nino Diaz drivers/delay_timer/generic_delay_timer.c \ 35d1d06275Skenny liang drivers/ti/uart/aarch64/16550_console.S \ 367d116dccSCC Ma lib/cpus/aarch64/aem_generic.S \ 377d116dccSCC Ma lib/cpus/aarch64/cortex_a53.S \ 387d116dccSCC Ma lib/cpus/aarch64/cortex_a57.S \ 397d116dccSCC Ma lib/cpus/aarch64/cortex_a72.S \ 40cf906b2aSLeon Chen ${MTK_PLAT}/common/mtk_plat_common.c \ 417d116dccSCC Ma ${MTK_PLAT}/common/mtk_sip_svc.c \ 423374752fSBo-Chen Chen ${MTK_PLAT}/drivers/pmic_wrap/pmic_wrap_init.c \ 433374752fSBo-Chen Chen ${MTK_PLAT}/drivers/rtc/rtc_common.c \ 447d116dccSCC Ma ${MTK_PLAT_SOC}/aarch64/plat_helpers.S \ 457d116dccSCC Ma ${MTK_PLAT_SOC}/aarch64/platform_common.c \ 467d116dccSCC Ma ${MTK_PLAT_SOC}/bl31_plat_setup.c \ 477ace1cc0SYi Zheng ${MTK_PLAT_SOC}/drivers/crypt/crypt.c \ 487d116dccSCC Ma ${MTK_PLAT_SOC}/drivers/mtcmos/mtcmos.c \ 497d116dccSCC Ma ${MTK_PLAT_SOC}/drivers/rtc/rtc.c \ 507d116dccSCC Ma ${MTK_PLAT_SOC}/drivers/spm/spm.c \ 517d116dccSCC Ma ${MTK_PLAT_SOC}/drivers/spm/spm_hotplug.c \ 527d116dccSCC Ma ${MTK_PLAT_SOC}/drivers/spm/spm_mcdi.c \ 537d116dccSCC Ma ${MTK_PLAT_SOC}/drivers/spm/spm_suspend.c \ 547d116dccSCC Ma ${MTK_PLAT_SOC}/drivers/timer/mt_cpuxgpt.c \ 55e9cf1bccSJulius Werner ${MTK_PLAT_SOC}/drivers/wdt/wdt.c \ 567d116dccSCC Ma ${MTK_PLAT_SOC}/plat_pm.c \ 577d116dccSCC Ma ${MTK_PLAT_SOC}/plat_sip_calls.c \ 587d116dccSCC Ma ${MTK_PLAT_SOC}/plat_topology.c \ 597d116dccSCC Ma ${MTK_PLAT_SOC}/power_tracer.c \ 607d116dccSCC Ma ${MTK_PLAT_SOC}/scu.c 617d116dccSCC Ma 627d116dccSCC Ma# Enable workarounds for selected Cortex-A53 erratas. 637d116dccSCC MaERRATA_A53_826319 := 1 647d116dccSCC MaERRATA_A53_836870 := 1 659a770b94SAndre PrzywaraERRATA_A53_855873 := 1 667d116dccSCC Ma 677d116dccSCC Ma# indicate the reset vector address can be programmed 687d116dccSCC MaPROGRAMMABLE_RESET_ADDRESS := 1 69cf906b2aSLeon Chen 70cf906b2aSLeon Chen$(eval $(call add_define,MTK_SIP_SET_AUTHORIZED_SECURE_REG_ENABLE)) 713872fc2dSDavid Cunado 723872fc2dSDavid Cunado# Do not enable SVE 733872fc2dSDavid CunadoENABLE_SVE_FOR_NS := 0 74