Searched refs:__builtin_ctz (Results 1 – 14 of 14) sorted by relevance
173 return __builtin_ctz(SCR_IRQ_BIT); in plat_interrupt_type_to_line()175 return __builtin_ctz(SCR_FIQ_BIT); in plat_interrupt_type_to_line()184 return __builtin_ctz(SCR_FIQ_BIT); in plat_interrupt_type_to_line()186 return __builtin_ctz(SCR_IRQ_BIT); in plat_interrupt_type_to_line()194 return __builtin_ctz(SCR_FIQ_BIT); in plat_interrupt_type_to_line()
152 return __builtin_ctz(SCR_IRQ_BIT); in plat_interrupt_type_to_line()159 return ((gicv2_is_fiq_enabled() != 0U) ? __builtin_ctz(SCR_FIQ_BIT) : in plat_interrupt_type_to_line()160 __builtin_ctz(SCR_IRQ_BIT)); in plat_interrupt_type_to_line()
126 tgt = __builtin_ctz((uintptr_t)cpu.state.on); in qti_watchdog_set_target()130 tgt = __builtin_ctz((uintptr_t)cpu.state.interruptible); in qti_watchdog_set_target()142 tgt = __builtin_ctz((uintptr_t)cpu.state.on); in qti_watchdog_set_target()
23 #define __builtin_ctz(a) __ctzsi2(a) macro
122 static int __inline __builtin_ctz(uint32_t value) { in __builtin_ctz() function
29 #define ctzsi __builtin_ctz
238 return __builtin_ctz(SCR_IRQ_BIT); in plat_interrupt_type_to_line()241 return __builtin_ctz(SCR_FIQ_BIT); in plat_interrupt_type_to_line()
166 uint32_t block_sh = __builtin_ctz(nbpages_per_block) + 1U; in spi_nand_load_page()184 uint32_t page_sh = __builtin_ctz(spinand_dev.nand_dev->page_size) + 1U; in spi_nand_read_from_cache()
214 idx = (uint32_t)__builtin_ctz(lowest_set); in pm_client_set_wakeup_sources()
86 return (int) __builtin_ctz(pe_data->active_pri_bits); in get_pe_highest_active_idx()
74 idx = (uint32_t)__builtin_ctz(lowest_set); in pm_client_set_wakeup_sources()
357 __builtin_ctz(plat_dma_prot_feat->dma_protection_support)) { in drtm_dl_check_features_sanity()
18 #define FIELD_GET(mask, reg) (((reg) & (mask)) >> __builtin_ctz(mask))
587 data_ctrl |= __builtin_ctz(arg_size) << SDMMC_DCTRLR_DBLOCKSIZE_SHIFT; in stm32_sdmmc2_prepare()