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Searched refs:PLAT_SOCFPGA_AGILEX (Results 1 – 7 of 7) sorted by relevance

/rk3399_ARM-atf/plat/intel/soc/common/
H A Dsocfpga_delay_timer.c14 #if PLATFORM_MODEL == PLAT_SOCFPGA_AGILEX
/rk3399_ARM-atf/plat/intel/soc/agilex/include/
H A Dsocfpga_plat_def.h17 #define PLATFORM_MODEL PLAT_SOCFPGA_AGILEX
/rk3399_ARM-atf/plat/intel/soc/common/include/
H A Dplatform_def.h20 #define PLAT_SOCFPGA_AGILEX 2 macro
H A Dsocfpga_handoff.h92 #elif PLATFORM_MODEL == PLAT_SOCFPGA_AGILEX
/rk3399_ARM-atf/plat/intel/soc/common/soc/
H A Dsocfpga_firewall.c24 (PLATFORM_MODEL == PLAT_SOCFPGA_AGILEX) || \ in enable_ns_peripheral_access()
H A Dsocfpga_reset_manager.c79 #if (PLATFORM_MODEL == PLAT_SOCFPGA_AGILEX) || (PLATFORM_MODEL == PLAT_SOCFPGA_AGILEX5) in deassert_peripheral_reset()
/rk3399_ARM-atf/plat/intel/soc/common/aarch64/
H A Dplat_helpers.S58 (PLATFORM_MODEL == PLAT_SOCFPGA_AGILEX) || \