| /rk3399_ARM-atf/plat/st/stm32mp1/ |
| H A D | plat_bl2_mem_params_desc.c | 46 .ep_info.spsr = SPSR_MODE32(MODE32_svc, SPSR_T_ARM,
122 .ep_info.spsr = SPSR_MODE32(MODE32_svc, SPSR_T_ARM,
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| /rk3399_ARM-atf/plat/imx/imx7/common/ |
| H A D | imx7_bl2_el3_common.c | 43 return SPSR_MODE32(MODE32_svc, SPSR_T_ARM, SPSR_E_LITTLE, in imx7_get_spsr_for_bl32_entry()
49 return SPSR_MODE32(MODE32_svc, in imx7_get_spsr_for_bl33_entry()
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| /rk3399_ARM-atf/bl2/aarch32/ |
| H A D | bl2_run_next_image.S | 39 cps #MODE32_svc
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| /rk3399_ARM-atf/services/spd/opteed/ |
| H A D | opteed_common.c | 51 optee_entry_point->spsr = SPSR_MODE32(MODE32_svc, SPSR_T_ARM, in opteed_init_optee_ep_state()
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| /rk3399_ARM-atf/include/arch/aarch32/ |
| H A D | smccc_macros.S | 43 cps #MODE32_svc
185 cps #MODE32_svc
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| H A D | arch_helpers.h | 408 #define IS_IN_SVC() (GET_M32(read_cpsr()) == MODE32_svc)
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| H A D | arch.h | 426 #define MODE32_svc U(0x13) macro
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| /rk3399_ARM-atf/plat/arm/common/aarch64/ |
| H A D | execution_state_switch.c | 128 el = from_el2 ? MODE32_hyp : MODE32_svc; in arm_execution_state_switch()
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| /rk3399_ARM-atf/services/spd/tlkd/ |
| H A D | tlkd_common.c | 100 spsr = SPSR_MODE32(MODE32_svc, in tlkd_init_tlk_ep_state()
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| /rk3399_ARM-atf/plat/hisilicon/poplar/ |
| H A D | bl2_plat_setup.c | 88 mode = (hyp_status) ? MODE32_hyp : MODE32_svc; in poplar_get_spsr_for_bl33_entry()
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| /rk3399_ARM-atf/bl1/aarch32/ |
| H A D | bl1_context_mgmt.c | 105 unsigned int security_state, mode = MODE32_svc; in bl1_prepare_next_image()
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| H A D | bl1_exceptions.S | 77 cps #MODE32_svc
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| /rk3399_ARM-atf/plat/arm/common/ |
| H A D | arm_common.c | 100 mode = (hyp_status) ? MODE32_hyp : MODE32_svc; in arm_get_spsr()
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| /rk3399_ARM-atf/plat/qemu/common/ |
| H A D | qemu_bl2_setup.c | 197 return SPSR_MODE32(MODE32_svc, SPSR_T_ARM, SPSR_E_LITTLE, in qemu_get_spsr_for_bl32_entry()
221 spsr = SPSR_MODE32(MODE32_svc, in qemu_get_spsr_for_bl33_entry()
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| /rk3399_ARM-atf/services/std_svc/errata_abi/ |
| H A D | errata_abi_main.c | 221 if ((read_el_state == (MODE32_svc)) || (read_el_state == MODE32_sys)) { in validate_spsr_mode()
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| /rk3399_ARM-atf/plat/nxp/common/setup/ |
| H A D | ls_bl2_el3_setup.c | 130 mode = (hyp_status) ? MODE32_hyp : MODE32_svc; in ls_get_spsr_for_bl33_entry()
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| /rk3399_ARM-atf/plat/hisilicon/hikey/ |
| H A D | hikey_bl2_setup.c | 105 mode = (hyp_status) ? MODE32_hyp : MODE32_svc; in hikey_get_spsr_for_bl33_entry()
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| /rk3399_ARM-atf/plat/xilinx/common/ |
| H A D | plat_startup.c | 269 bl32->spsr = (uint32_t)SPSR_MODE32(MODE32_svc, SPSR_T_ARM, in xbl_handover()
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| /rk3399_ARM-atf/plat/imx/common/ |
| H A D | imx_sip_handler.c | 321 mode = MODE32_svc; in imx_kernel_entry_handler()
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| /rk3399_ARM-atf/services/spd/trusty/ |
| H A D | trusty.c | 481 ep_info->spsr = SPSR_MODE32(MODE32_svc, SPSR_T_ARM, in trusty_setup()
521 spsr |= MODE32_svc << MODE32_SHIFT; in trusty_setup()
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| /rk3399_ARM-atf/plat/hisilicon/hikey960/ |
| H A D | hikey960_bl2_setup.c | 199 mode = (hyp_status) ? MODE32_hyp : MODE32_svc; in hikey960_get_spsr_for_bl33_entry()
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| /rk3399_ARM-atf/lib/cpus/aarch64/ |
| H A D | wa_cve_2017_5715_bpiall.S | 66 movz w8, SPSR_MODE32(MODE32_svc, SPSR_T_ARM, SPSR_E_LITTLE, SPSR_AIF_MASK)
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| /rk3399_ARM-atf/lib/psci/ |
| H A D | psci_common.c | 910 MODE32_hyp : MODE32_svc; in psci_get_ns_ep_info()
957 mode = scr & SCR_HCE_BIT ? MODE32_hyp : MODE32_svc; in psci_get_ns_ep_info()
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| /rk3399_ARM-atf/services/std_svc/spmd/ |
| H A D | spmd_main.c | 556 spmc_ep_info->spsr = SPSR_MODE32(MODE32_svc, SPSR_T_ARM, in spmd_spmc_init()
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| /rk3399_ARM-atf/include/arch/aarch64/ |
| H A D | arch.h | 1097 #define MODE32_svc U(0x3) macro
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