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Searched refs:phys_to_virt (Results 1 – 25 of 63) sorted by relevance

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/optee_os/core/arch/arm/plat-sunxi/
H A Dpsci.c72 vaddr_t base = (vaddr_t)phys_to_virt(SUNXI_PRCM_BASE, MEM_AREA_IO_SEC, in psci_cpu_on()
74 vaddr_t cpucfg = (vaddr_t)phys_to_virt(SUNXI_CPUCFG_BASE, in psci_cpu_on()
135 vaddr_t base = (vaddr_t)phys_to_virt(SUNXI_PRCM_BASE, MEM_AREA_IO_SEC, in psci_cpu_off()
137 vaddr_t cpucfg = (vaddr_t)phys_to_virt(SUNXI_CPUCFG_BASE, in psci_cpu_off()
H A Dmain.c103 vaddr_t v = (vaddr_t)phys_to_virt(SUNXI_TZPC_BASE, MEM_AREA_IO_SEC, in tzpc_init()
153 return (vaddr_t)phys_to_virt(SUNXI_SMC_BASE, MEM_AREA_IO_SEC, in smc_base()
/optee_os/core/drivers/
H A Dhi16xx_rng.c42 vaddr_t alg = (vaddr_t)phys_to_virt(ALG_SC_BASE, MEM_AREA_IO_SEC, in hi16xx_rng_init()
44 vaddr_t rng = (vaddr_t)phys_to_virt(RNG_BASE, MEM_AREA_IO_SEC, in hi16xx_rng_init()
79 r = (vaddr_t)phys_to_virt(RNG_BASE, MEM_AREA_IO_SEC, 1) + in hw_get_random_bytes()
H A Drockchip_otp.c46 vaddr_t base = (vaddr_t)phys_to_virt(OTP_S_BASE, MEM_AREA_IO_SEC, in rockchip_otp_read_secure()
109 vaddr_t base = (vaddr_t)phys_to_virt(OTP_S_BASE, MEM_AREA_IO_SEC, in rockchip_otp_write_secure()
H A Dbcm_hwrng.c74 bcm_hwrng_base = (vaddr_t)phys_to_virt(HWRNG_BASE, MEM_AREA_IO_SEC, in bcm_hwrng_init()
/optee_os/core/arch/arm/kernel/
H A Dtee_l2cc_mutex.c45 va = phys_to_virt(l2cc_mutex_pa, MEM_AREA_NSEC_SHM, MUTEX_SZ); in l2cc_mutex_alloc()
118 va = phys_to_virt(addr, MEM_AREA_NSEC_SHM, MUTEX_SZ); in tee_set_l2cc_mutex()
/optee_os/core/lib/scmi-server/
H A Dscmi_server.c22 return (uintptr_t)phys_to_virt(pa, MEM_AREA_IO_SEC, sz); in smt_phys_to_virt()
24 return (uintptr_t)phys_to_virt(pa, MEM_AREA_IO_NSEC, sz); in smt_phys_to_virt()
/optee_os/core/arch/arm/plat-versal/
H A Dmain.c63 vaddr_t plm_rtca = (vaddr_t)phys_to_virt(PLM_RTCA, MEM_AREA_IO_SEC, in platform_banner()
93 vaddr_t plm_rtca = (vaddr_t)phys_to_virt(PLM_RTCA, MEM_AREA_IO_SEC, in plat_rpmb_key_is_ready()
/optee_os/core/arch/arm/plat-zynq7k/
H A Dmain.c104 va = phys_to_virt(PL310_BASE, MEM_AREA_IO_SEC, 1); in pl310_base()
171 va = (vaddr_t)phys_to_virt(SLCR_BASE, in write_slcr()
192 va = (vaddr_t)phys_to_virt(SLCR_BASE, in read_slcr()
/optee_os/core/pta/bcm/
H A Delog.c97 src_vaddr = (vaddr_t)phys_to_virt((uintptr_t)src_paddr + offset, in pta_elog_load_nitro_fw()
166 src_vaddr = (vaddr_t)phys_to_virt((uintptr_t)src_paddr + offset, in pta_elog_nitro_crash_dump()
202 src_vaddr = (vaddr_t)phys_to_virt(src_paddr, MEM_AREA_RAM_NSEC, sz); in pta_elog_dump()
/optee_os/core/drivers/crypto/caam/hal/imx_8ulp/
H A Dhal_clk.c14 vaddr_t pcc3_base = (vaddr_t)phys_to_virt(PCC3_BASE, MEM_AREA_IO_SEC, in caam_hal_clk_enable()
/optee_os/core/drivers/crypto/caam/hal/imx_6_7/
H A Dhal_clk_mx7ulp.c14 vaddr_t pcc2_base = (vaddr_t)phys_to_virt(PCC2_BASE, MEM_AREA_IO_SEC, in caam_hal_clk_enable()
H A Dhal_clk_mx7.c14 vaddr_t ccm_base = (vaddr_t)phys_to_virt(CCM_BASE, MEM_AREA_IO_SEC, 1); in caam_hal_clk_enable()
H A Dhal_clk_mx6.c14 vaddr_t ccm_base = (vaddr_t)phys_to_virt(CCM_BASE, MEM_AREA_IO_SEC, in caam_hal_clk_enable()
/optee_os/core/drivers/bnxt/
H A Dbnxt_images.c101 phys_to_virt(QSPI_BNXT_IMG, MEM_AREA_IO_NSEC, in get_bnxt_images_info()
111 (vaddr_t)phys_to_virt(QSPI_BSPD_ADDR, in get_bnxt_images_info()
H A Dbnxt.c218 (vaddr_t)phys_to_virt(NIC400_BNXT_IDM_IO_CONTROL_DIRECT, in bnxt_init()
221 (vaddr_t)phys_to_virt(BNXT_INDIRECT_BASE, in bnxt_init()
/optee_os/core/arch/arm/plat-ti/
H A Dti_pl310.c23 va = phys_to_virt(PL310_BASE, MEM_AREA_IO_SEC, in pl310_base()
H A Dmain.c80 plat_boot_args = phys_to_virt(boot_arg_nsec_entry, MEM_AREA_IO_SEC, 1); in init_sec_mon()
114 plat_boot_args = phys_to_virt(boot_arg_nsec_entry, MEM_AREA_IO_SEC, 1); in early_init_huk()
H A Dsm_platform_handler_a15.c28 va = phys_to_virt(WUGEN_MPU_BASE, MEM_AREA_IO_SEC, in wugen_mpu_base()
/optee_os/core/arch/arm/plat-sam/
H A Dsam_sfr.c28 va = phys_to_virt(SFR_BASE, MEM_AREA_IO_SEC, 1); in sam_sfr_base()
H A Dsam_pl310.c52 va = phys_to_virt(PL310_BASE, MEM_AREA_IO_SEC, 1); in pl310_base()
/optee_os/core/arch/arm/plat-stm/
H A Drng_support.c29 va = phys_to_virt(RNG_BASE, MEM_AREA_IO_SEC, RNG_SIZE); in rng_base()
/optee_os/core/arch/arm/plat-marvell/
H A Dmain.c106 void *huk = phys_to_virt(PLAT_MARVELL_FUSF_FUSE_BASE + in tee_otp_get_hw_unique_key()
/optee_os/core/pta/tests/
H A Dinvoke.c49 v = phys_to_virt(p, MEM_AREA_TS_VASPACE, size); in test_v2p2v()
51 v = phys_to_virt(p, MEM_AREA_NSEC_SHM, size); in test_v2p2v()
53 v = phys_to_virt(p, MEM_AREA_SDP_MEM, size); in test_v2p2v()
55 v = phys_to_virt(p, MEM_AREA_SHM_VASPACE, size); in test_v2p2v()
/optee_os/core/arch/arm/plat-vexpress/
H A Dmain.c246 va = phys_to_virt(TZC400_BASE, MEM_AREA_IO_SEC, TZC400_REG_SIZE); in init_tzc400()
270 mailbox = phys_to_virt(SECRAM_BASE, MEM_AREA_IO_SEC, in release_secondary_early_hpen()

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