11bb92983SJerome Forissier // SPDX-License-Identifier: BSD-2-Clause 219d8ffe4SAndrew F. Davis /* 3*d83a652aSAndrew Davis * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/ 4*d83a652aSAndrew Davis * Andrew Davis <afd@ti.com> 519d8ffe4SAndrew F. Davis */ 619d8ffe4SAndrew F. Davis 719d8ffe4SAndrew F. Davis #include <arm32.h> 819d8ffe4SAndrew F. Davis #include <io.h> 965401337SJens Wiklander #include <kernel/boot.h> 1019d8ffe4SAndrew F. Davis #include <kernel/tz_ssvce_def.h> 1119d8ffe4SAndrew F. Davis #include <kernel/tz_ssvce_pl310.h> 1219d8ffe4SAndrew F. Davis #include <mm/core_memprot.h> 1319d8ffe4SAndrew F. Davis #include <platform_config.h> 1419d8ffe4SAndrew F. Davis 15a5e82dc7SJerome Forissier register_phys_mem_pgdir(MEM_AREA_IO_SEC, PL310_BASE, PL310_SIZE); 1619d8ffe4SAndrew F. Davis pl310_base(void)1719d8ffe4SAndrew F. Davisvaddr_t pl310_base(void) 1819d8ffe4SAndrew F. Davis { 1923660121SJerome Forissier static void *va; 2019d8ffe4SAndrew F. Davis 2119d8ffe4SAndrew F. Davis if (cpu_mmu_enabled()) { 2219d8ffe4SAndrew F. Davis if (!va) 23c2e4eb43SAnton Rybakov va = phys_to_virt(PL310_BASE, MEM_AREA_IO_SEC, 24c2e4eb43SAnton Rybakov PL310_SIZE); 2519d8ffe4SAndrew F. Davis return (vaddr_t)va; 2619d8ffe4SAndrew F. Davis } 2719d8ffe4SAndrew F. Davis 2819d8ffe4SAndrew F. Davis return PL310_BASE; 2919d8ffe4SAndrew F. Davis } 3019d8ffe4SAndrew F. Davis 3119d8ffe4SAndrew F. Davis /* ROM handles initial setup for us */ arm_cl2_config(vaddr_t pl310_base)3219d8ffe4SAndrew F. Davisvoid arm_cl2_config(vaddr_t pl310_base) 3319d8ffe4SAndrew F. Davis { 3419d8ffe4SAndrew F. Davis (void)pl310_base; 3519d8ffe4SAndrew F. Davis } 3619d8ffe4SAndrew F. Davis 3719d8ffe4SAndrew F. Davis /* We provide platform services that expect the cache to be disabled on boot */ arm_cl2_enable(vaddr_t pl310_base)3819d8ffe4SAndrew F. Davisvoid arm_cl2_enable(vaddr_t pl310_base) 3919d8ffe4SAndrew F. Davis { 4019d8ffe4SAndrew F. Davis (void)pl310_base; 4119d8ffe4SAndrew F. Davis } 42